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authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-04-07 05:07:20 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-04-07 05:07:20 -0400
commitb3e3bf2ef2c74f5ce5c19510edbbb9bfc1d249c2 (patch)
tree0fb24ebf81227b9f05e44f717a8c4997d837b667 /arch/x86
parentfbf47635315ab308c9b58a1ea0906e711a9228de (diff)
parentf22e6e847115abc3a0e2ad7bb18d243d42275af1 (diff)
Merge 4.0-rc7 into tty-next
We want the fixes in here as well, also to help out with merge issues. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel.c10
-rw-r--r--arch/x86/kernel/entry_64.S34
-rw-r--r--arch/x86/kernel/kgdb.c2
-rw-r--r--arch/x86/kernel/reboot.c10
-rw-r--r--arch/x86/kvm/ioapic.c4
-rw-r--r--arch/x86/kvm/lapic.c3
-rw-r--r--arch/x86/kvm/vmx.c7
-rw-r--r--arch/x86/xen/p2m.c10
8 files changed, 63 insertions, 17 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 498b6d967138..258990688a5e 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -212,11 +212,11 @@ static struct event_constraint intel_hsw_event_constraints[] = {
212 INTEL_UEVENT_CONSTRAINT(0x01c0, 0x2), /* INST_RETIRED.PREC_DIST */ 212 INTEL_UEVENT_CONSTRAINT(0x01c0, 0x2), /* INST_RETIRED.PREC_DIST */
213 INTEL_EVENT_CONSTRAINT(0xcd, 0x8), /* MEM_TRANS_RETIRED.LOAD_LATENCY */ 213 INTEL_EVENT_CONSTRAINT(0xcd, 0x8), /* MEM_TRANS_RETIRED.LOAD_LATENCY */
214 /* CYCLE_ACTIVITY.CYCLES_L1D_PENDING */ 214 /* CYCLE_ACTIVITY.CYCLES_L1D_PENDING */
215 INTEL_EVENT_CONSTRAINT(0x08a3, 0x4), 215 INTEL_UEVENT_CONSTRAINT(0x08a3, 0x4),
216 /* CYCLE_ACTIVITY.STALLS_L1D_PENDING */ 216 /* CYCLE_ACTIVITY.STALLS_L1D_PENDING */
217 INTEL_EVENT_CONSTRAINT(0x0ca3, 0x4), 217 INTEL_UEVENT_CONSTRAINT(0x0ca3, 0x4),
218 /* CYCLE_ACTIVITY.CYCLES_NO_EXECUTE */ 218 /* CYCLE_ACTIVITY.CYCLES_NO_EXECUTE */
219 INTEL_EVENT_CONSTRAINT(0x04a3, 0xf), 219 INTEL_UEVENT_CONSTRAINT(0x04a3, 0xf),
220 EVENT_CONSTRAINT_END 220 EVENT_CONSTRAINT_END
221}; 221};
222 222
@@ -1649,11 +1649,11 @@ intel_get_event_constraints(struct cpu_hw_events *cpuc, struct perf_event *event
1649 if (c) 1649 if (c)
1650 return c; 1650 return c;
1651 1651
1652 c = intel_pebs_constraints(event); 1652 c = intel_shared_regs_constraints(cpuc, event);
1653 if (c) 1653 if (c)
1654 return c; 1654 return c;
1655 1655
1656 c = intel_shared_regs_constraints(cpuc, event); 1656 c = intel_pebs_constraints(event);
1657 if (c) 1657 if (c)
1658 return c; 1658 return c;
1659 1659
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
index 1d74d161687c..f0095a76c182 100644
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -364,12 +364,21 @@ system_call_fastpath:
364 * Has incomplete stack frame and undefined top of stack. 364 * Has incomplete stack frame and undefined top of stack.
365 */ 365 */
366ret_from_sys_call: 366ret_from_sys_call:
367 testl $_TIF_ALLWORK_MASK,TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET)
368 jnz int_ret_from_sys_call_fixup /* Go the the slow path */
369
370 LOCKDEP_SYS_EXIT 367 LOCKDEP_SYS_EXIT
371 DISABLE_INTERRUPTS(CLBR_NONE) 368 DISABLE_INTERRUPTS(CLBR_NONE)
372 TRACE_IRQS_OFF 369 TRACE_IRQS_OFF
370
371 /*
372 * We must check ti flags with interrupts (or at least preemption)
373 * off because we must *never* return to userspace without
374 * processing exit work that is enqueued if we're preempted here.
375 * In particular, returning to userspace with any of the one-shot
376 * flags (TIF_NOTIFY_RESUME, TIF_USER_RETURN_NOTIFY, etc) set is
377 * very bad.
378 */
379 testl $_TIF_ALLWORK_MASK,TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET)
380 jnz int_ret_from_sys_call_fixup /* Go the the slow path */
381
373 CFI_REMEMBER_STATE 382 CFI_REMEMBER_STATE
374 /* 383 /*
375 * sysretq will re-enable interrupts: 384 * sysretq will re-enable interrupts:
@@ -386,7 +395,7 @@ ret_from_sys_call:
386 395
387int_ret_from_sys_call_fixup: 396int_ret_from_sys_call_fixup:
388 FIXUP_TOP_OF_STACK %r11, -ARGOFFSET 397 FIXUP_TOP_OF_STACK %r11, -ARGOFFSET
389 jmp int_ret_from_sys_call 398 jmp int_ret_from_sys_call_irqs_off
390 399
391 /* Do syscall tracing */ 400 /* Do syscall tracing */
392tracesys: 401tracesys:
@@ -432,6 +441,7 @@ tracesys_phase2:
432GLOBAL(int_ret_from_sys_call) 441GLOBAL(int_ret_from_sys_call)
433 DISABLE_INTERRUPTS(CLBR_NONE) 442 DISABLE_INTERRUPTS(CLBR_NONE)
434 TRACE_IRQS_OFF 443 TRACE_IRQS_OFF
444int_ret_from_sys_call_irqs_off:
435 movl $_TIF_ALLWORK_MASK,%edi 445 movl $_TIF_ALLWORK_MASK,%edi
436 /* edi: mask to check */ 446 /* edi: mask to check */
437GLOBAL(int_with_check) 447GLOBAL(int_with_check)
@@ -789,7 +799,21 @@ retint_swapgs: /* return to user-space */
789 cmpq %r11,(EFLAGS-ARGOFFSET)(%rsp) /* R11 == RFLAGS */ 799 cmpq %r11,(EFLAGS-ARGOFFSET)(%rsp) /* R11 == RFLAGS */
790 jne opportunistic_sysret_failed 800 jne opportunistic_sysret_failed
791 801
792 testq $X86_EFLAGS_RF,%r11 /* sysret can't restore RF */ 802 /*
803 * SYSRET can't restore RF. SYSRET can restore TF, but unlike IRET,
804 * restoring TF results in a trap from userspace immediately after
805 * SYSRET. This would cause an infinite loop whenever #DB happens
806 * with register state that satisfies the opportunistic SYSRET
807 * conditions. For example, single-stepping this user code:
808 *
809 * movq $stuck_here,%rcx
810 * pushfq
811 * popq %r11
812 * stuck_here:
813 *
814 * would never get past 'stuck_here'.
815 */
816 testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11
793 jnz opportunistic_sysret_failed 817 jnz opportunistic_sysret_failed
794 818
795 /* nothing to check for RSP */ 819 /* nothing to check for RSP */
diff --git a/arch/x86/kernel/kgdb.c b/arch/x86/kernel/kgdb.c
index 7ec1d5f8d283..25ecd56cefa8 100644
--- a/arch/x86/kernel/kgdb.c
+++ b/arch/x86/kernel/kgdb.c
@@ -72,7 +72,7 @@ struct dbg_reg_def_t dbg_reg_def[DBG_MAX_REG_NUM] =
72 { "bx", 8, offsetof(struct pt_regs, bx) }, 72 { "bx", 8, offsetof(struct pt_regs, bx) },
73 { "cx", 8, offsetof(struct pt_regs, cx) }, 73 { "cx", 8, offsetof(struct pt_regs, cx) },
74 { "dx", 8, offsetof(struct pt_regs, dx) }, 74 { "dx", 8, offsetof(struct pt_regs, dx) },
75 { "si", 8, offsetof(struct pt_regs, dx) }, 75 { "si", 8, offsetof(struct pt_regs, si) },
76 { "di", 8, offsetof(struct pt_regs, di) }, 76 { "di", 8, offsetof(struct pt_regs, di) },
77 { "bp", 8, offsetof(struct pt_regs, bp) }, 77 { "bp", 8, offsetof(struct pt_regs, bp) },
78 { "sp", 8, offsetof(struct pt_regs, sp) }, 78 { "sp", 8, offsetof(struct pt_regs, sp) },
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c
index bae6c609888e..86db4bcd7ce5 100644
--- a/arch/x86/kernel/reboot.c
+++ b/arch/x86/kernel/reboot.c
@@ -183,6 +183,16 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = {
183 }, 183 },
184 }, 184 },
185 185
186 /* ASRock */
187 { /* Handle problems with rebooting on ASRock Q1900DC-ITX */
188 .callback = set_pci_reboot,
189 .ident = "ASRock Q1900DC-ITX",
190 .matches = {
191 DMI_MATCH(DMI_BOARD_VENDOR, "ASRock"),
192 DMI_MATCH(DMI_BOARD_NAME, "Q1900DC-ITX"),
193 },
194 },
195
186 /* ASUS */ 196 /* ASUS */
187 { /* Handle problems with rebooting on ASUS P4S800 */ 197 { /* Handle problems with rebooting on ASUS P4S800 */
188 .callback = set_bios_reboot, 198 .callback = set_bios_reboot,
diff --git a/arch/x86/kvm/ioapic.c b/arch/x86/kvm/ioapic.c
index b1947e0f3e10..46d4449772bc 100644
--- a/arch/x86/kvm/ioapic.c
+++ b/arch/x86/kvm/ioapic.c
@@ -422,6 +422,7 @@ static void __kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu,
422 struct kvm_ioapic *ioapic, int vector, int trigger_mode) 422 struct kvm_ioapic *ioapic, int vector, int trigger_mode)
423{ 423{
424 int i; 424 int i;
425 struct kvm_lapic *apic = vcpu->arch.apic;
425 426
426 for (i = 0; i < IOAPIC_NUM_PINS; i++) { 427 for (i = 0; i < IOAPIC_NUM_PINS; i++) {
427 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i]; 428 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
@@ -443,7 +444,8 @@ static void __kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu,
443 kvm_notify_acked_irq(ioapic->kvm, KVM_IRQCHIP_IOAPIC, i); 444 kvm_notify_acked_irq(ioapic->kvm, KVM_IRQCHIP_IOAPIC, i);
444 spin_lock(&ioapic->lock); 445 spin_lock(&ioapic->lock);
445 446
446 if (trigger_mode != IOAPIC_LEVEL_TRIG) 447 if (trigger_mode != IOAPIC_LEVEL_TRIG ||
448 kvm_apic_get_reg(apic, APIC_SPIV) & APIC_SPIV_DIRECTED_EOI)
447 continue; 449 continue;
448 450
449 ASSERT(ent->fields.trig_mode == IOAPIC_LEVEL_TRIG); 451 ASSERT(ent->fields.trig_mode == IOAPIC_LEVEL_TRIG);
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index bd4e34de24c7..4ee827d7bf36 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -833,8 +833,7 @@ int kvm_apic_compare_prio(struct kvm_vcpu *vcpu1, struct kvm_vcpu *vcpu2)
833 833
834static void kvm_ioapic_send_eoi(struct kvm_lapic *apic, int vector) 834static void kvm_ioapic_send_eoi(struct kvm_lapic *apic, int vector)
835{ 835{
836 if (!(kvm_apic_get_reg(apic, APIC_SPIV) & APIC_SPIV_DIRECTED_EOI) && 836 if (kvm_ioapic_handles_vector(apic->vcpu->kvm, vector)) {
837 kvm_ioapic_handles_vector(apic->vcpu->kvm, vector)) {
838 int trigger_mode; 837 int trigger_mode;
839 if (apic_test_vector(vector, apic->regs + APIC_TMR)) 838 if (apic_test_vector(vector, apic->regs + APIC_TMR))
840 trigger_mode = IOAPIC_LEVEL_TRIG; 839 trigger_mode = IOAPIC_LEVEL_TRIG;
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 10a481b7674d..ae4f6d35d19c 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -2479,8 +2479,7 @@ static void nested_vmx_setup_ctls_msrs(struct vcpu_vmx *vmx)
2479 if (enable_ept) { 2479 if (enable_ept) {
2480 /* nested EPT: emulate EPT also to L1 */ 2480 /* nested EPT: emulate EPT also to L1 */
2481 vmx->nested.nested_vmx_secondary_ctls_high |= 2481 vmx->nested.nested_vmx_secondary_ctls_high |=
2482 SECONDARY_EXEC_ENABLE_EPT | 2482 SECONDARY_EXEC_ENABLE_EPT;
2483 SECONDARY_EXEC_UNRESTRICTED_GUEST;
2484 vmx->nested.nested_vmx_ept_caps = VMX_EPT_PAGE_WALK_4_BIT | 2483 vmx->nested.nested_vmx_ept_caps = VMX_EPT_PAGE_WALK_4_BIT |
2485 VMX_EPTP_WB_BIT | VMX_EPT_2MB_PAGE_BIT | 2484 VMX_EPTP_WB_BIT | VMX_EPT_2MB_PAGE_BIT |
2486 VMX_EPT_INVEPT_BIT; 2485 VMX_EPT_INVEPT_BIT;
@@ -2494,6 +2493,10 @@ static void nested_vmx_setup_ctls_msrs(struct vcpu_vmx *vmx)
2494 } else 2493 } else
2495 vmx->nested.nested_vmx_ept_caps = 0; 2494 vmx->nested.nested_vmx_ept_caps = 0;
2496 2495
2496 if (enable_unrestricted_guest)
2497 vmx->nested.nested_vmx_secondary_ctls_high |=
2498 SECONDARY_EXEC_UNRESTRICTED_GUEST;
2499
2497 /* miscellaneous data */ 2500 /* miscellaneous data */
2498 rdmsr(MSR_IA32_VMX_MISC, 2501 rdmsr(MSR_IA32_VMX_MISC,
2499 vmx->nested.nested_vmx_misc_low, 2502 vmx->nested.nested_vmx_misc_low,
diff --git a/arch/x86/xen/p2m.c b/arch/x86/xen/p2m.c
index 9f93af56a5fc..b47124d4cd67 100644
--- a/arch/x86/xen/p2m.c
+++ b/arch/x86/xen/p2m.c
@@ -91,6 +91,12 @@ EXPORT_SYMBOL_GPL(xen_p2m_size);
91unsigned long xen_max_p2m_pfn __read_mostly; 91unsigned long xen_max_p2m_pfn __read_mostly;
92EXPORT_SYMBOL_GPL(xen_max_p2m_pfn); 92EXPORT_SYMBOL_GPL(xen_max_p2m_pfn);
93 93
94#ifdef CONFIG_XEN_BALLOON_MEMORY_HOTPLUG_LIMIT
95#define P2M_LIMIT CONFIG_XEN_BALLOON_MEMORY_HOTPLUG_LIMIT
96#else
97#define P2M_LIMIT 0
98#endif
99
94static DEFINE_SPINLOCK(p2m_update_lock); 100static DEFINE_SPINLOCK(p2m_update_lock);
95 101
96static unsigned long *p2m_mid_missing_mfn; 102static unsigned long *p2m_mid_missing_mfn;
@@ -385,9 +391,11 @@ static void __init xen_rebuild_p2m_list(unsigned long *p2m)
385void __init xen_vmalloc_p2m_tree(void) 391void __init xen_vmalloc_p2m_tree(void)
386{ 392{
387 static struct vm_struct vm; 393 static struct vm_struct vm;
394 unsigned long p2m_limit;
388 395
396 p2m_limit = (phys_addr_t)P2M_LIMIT * 1024 * 1024 * 1024 / PAGE_SIZE;
389 vm.flags = VM_ALLOC; 397 vm.flags = VM_ALLOC;
390 vm.size = ALIGN(sizeof(unsigned long) * xen_max_p2m_pfn, 398 vm.size = ALIGN(sizeof(unsigned long) * max(xen_max_p2m_pfn, p2m_limit),
391 PMD_SIZE * PMDS_PER_MID_PAGE); 399 PMD_SIZE * PMDS_PER_MID_PAGE);
392 vm_area_register_early(&vm, PMD_SIZE * PMDS_PER_MID_PAGE); 400 vm_area_register_early(&vm, PMD_SIZE * PMDS_PER_MID_PAGE);
393 pr_notice("p2m virtual area at %p, size is %lx\n", vm.addr, vm.size); 401 pr_notice("p2m virtual area at %p, size is %lx\n", vm.addr, vm.size);