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author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2009-03-23 22:38:30 -0400 |
---|---|---|
committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2009-03-23 22:38:30 -0400 |
commit | 9e41d9597e7825ec20d690013d32bcec5f3fe16a (patch) | |
tree | ac6fea59e9a4a1c2183d6bbd6ffa760680673afb /arch/x86 | |
parent | 77ecfe8d427f554fabbf258e9d789f1d4c3afd63 (diff) | |
parent | 8e0ee43bc2c3e19db56a4adaa9a9b04ce885cd84 (diff) |
Merge commit 'origin/master' into next
Diffstat (limited to 'arch/x86')
-rw-r--r-- | arch/x86/kernel/kprobes.c | 3 | ||||
-rw-r--r-- | arch/x86/kernel/tsc.c | 110 | ||||
-rw-r--r-- | arch/x86/mm/kmmio.c | 15 | ||||
-rw-r--r-- | arch/x86/mm/pageattr.c | 11 |
4 files changed, 87 insertions, 52 deletions
diff --git a/arch/x86/kernel/kprobes.c b/arch/x86/kernel/kprobes.c index e948b28a5a9a..4558dd3918cf 100644 --- a/arch/x86/kernel/kprobes.c +++ b/arch/x86/kernel/kprobes.c | |||
@@ -193,6 +193,9 @@ static int __kprobes can_boost(kprobe_opcode_t *opcodes) | |||
193 | kprobe_opcode_t opcode; | 193 | kprobe_opcode_t opcode; |
194 | kprobe_opcode_t *orig_opcodes = opcodes; | 194 | kprobe_opcode_t *orig_opcodes = opcodes; |
195 | 195 | ||
196 | if (search_exception_tables(opcodes)) | ||
197 | return 0; /* Page fault may occur on this address. */ | ||
198 | |||
196 | retry: | 199 | retry: |
197 | if (opcodes - orig_opcodes > MAX_INSN_SIZE - 1) | 200 | if (opcodes - orig_opcodes > MAX_INSN_SIZE - 1) |
198 | return 0; | 201 | return 0; |
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 599e58168631..d5cebb52d45b 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c | |||
@@ -273,30 +273,43 @@ static unsigned long pit_calibrate_tsc(u32 latch, unsigned long ms, int loopmin) | |||
273 | * use the TSC value at the transitions to calculate a pretty | 273 | * use the TSC value at the transitions to calculate a pretty |
274 | * good value for the TSC frequencty. | 274 | * good value for the TSC frequencty. |
275 | */ | 275 | */ |
276 | static inline int pit_expect_msb(unsigned char val) | 276 | static inline int pit_expect_msb(unsigned char val, u64 *tscp, unsigned long *deltap) |
277 | { | 277 | { |
278 | int count = 0; | 278 | int count; |
279 | u64 tsc = 0; | ||
279 | 280 | ||
280 | for (count = 0; count < 50000; count++) { | 281 | for (count = 0; count < 50000; count++) { |
281 | /* Ignore LSB */ | 282 | /* Ignore LSB */ |
282 | inb(0x42); | 283 | inb(0x42); |
283 | if (inb(0x42) != val) | 284 | if (inb(0x42) != val) |
284 | break; | 285 | break; |
286 | tsc = get_cycles(); | ||
285 | } | 287 | } |
286 | return count > 50; | 288 | *deltap = get_cycles() - tsc; |
289 | *tscp = tsc; | ||
290 | |||
291 | /* | ||
292 | * We require _some_ success, but the quality control | ||
293 | * will be based on the error terms on the TSC values. | ||
294 | */ | ||
295 | return count > 5; | ||
287 | } | 296 | } |
288 | 297 | ||
289 | /* | 298 | /* |
290 | * How many MSB values do we want to see? We aim for a | 299 | * How many MSB values do we want to see? We aim for |
291 | * 15ms calibration, which assuming a 2us counter read | 300 | * a maximum error rate of 500ppm (in practice the |
292 | * error should give us roughly 150 ppm precision for | 301 | * real error is much smaller), but refuse to spend |
293 | * the calibration. | 302 | * more than 25ms on it. |
294 | */ | 303 | */ |
295 | #define QUICK_PIT_MS 15 | 304 | #define MAX_QUICK_PIT_MS 25 |
296 | #define QUICK_PIT_ITERATIONS (QUICK_PIT_MS * PIT_TICK_RATE / 1000 / 256) | 305 | #define MAX_QUICK_PIT_ITERATIONS (MAX_QUICK_PIT_MS * PIT_TICK_RATE / 1000 / 256) |
297 | 306 | ||
298 | static unsigned long quick_pit_calibrate(void) | 307 | static unsigned long quick_pit_calibrate(void) |
299 | { | 308 | { |
309 | int i; | ||
310 | u64 tsc, delta; | ||
311 | unsigned long d1, d2; | ||
312 | |||
300 | /* Set the Gate high, disable speaker */ | 313 | /* Set the Gate high, disable speaker */ |
301 | outb((inb(0x61) & ~0x02) | 0x01, 0x61); | 314 | outb((inb(0x61) & ~0x02) | 0x01, 0x61); |
302 | 315 | ||
@@ -315,45 +328,52 @@ static unsigned long quick_pit_calibrate(void) | |||
315 | outb(0xff, 0x42); | 328 | outb(0xff, 0x42); |
316 | outb(0xff, 0x42); | 329 | outb(0xff, 0x42); |
317 | 330 | ||
318 | if (pit_expect_msb(0xff)) { | 331 | /* |
319 | int i; | 332 | * The PIT starts counting at the next edge, so we |
320 | u64 t1, t2, delta; | 333 | * need to delay for a microsecond. The easiest way |
321 | unsigned char expect = 0xfe; | 334 | * to do that is to just read back the 16-bit counter |
322 | 335 | * once from the PIT. | |
323 | t1 = get_cycles(); | 336 | */ |
324 | for (i = 0; i < QUICK_PIT_ITERATIONS; i++, expect--) { | 337 | inb(0x42); |
325 | if (!pit_expect_msb(expect)) | 338 | inb(0x42); |
326 | goto failed; | 339 | |
340 | if (pit_expect_msb(0xff, &tsc, &d1)) { | ||
341 | for (i = 1; i <= MAX_QUICK_PIT_ITERATIONS; i++) { | ||
342 | if (!pit_expect_msb(0xff-i, &delta, &d2)) | ||
343 | break; | ||
344 | |||
345 | /* | ||
346 | * Iterate until the error is less than 500 ppm | ||
347 | */ | ||
348 | delta -= tsc; | ||
349 | if (d1+d2 < delta >> 11) | ||
350 | goto success; | ||
327 | } | 351 | } |
328 | t2 = get_cycles(); | ||
329 | |||
330 | /* | ||
331 | * Make sure we can rely on the second TSC timestamp: | ||
332 | */ | ||
333 | if (!pit_expect_msb(expect)) | ||
334 | goto failed; | ||
335 | |||
336 | /* | ||
337 | * Ok, if we get here, then we've seen the | ||
338 | * MSB of the PIT decrement QUICK_PIT_ITERATIONS | ||
339 | * times, and each MSB had many hits, so we never | ||
340 | * had any sudden jumps. | ||
341 | * | ||
342 | * As a result, we can depend on there not being | ||
343 | * any odd delays anywhere, and the TSC reads are | ||
344 | * reliable. | ||
345 | * | ||
346 | * kHz = ticks / time-in-seconds / 1000; | ||
347 | * kHz = (t2 - t1) / (QPI * 256 / PIT_TICK_RATE) / 1000 | ||
348 | * kHz = ((t2 - t1) * PIT_TICK_RATE) / (QPI * 256 * 1000) | ||
349 | */ | ||
350 | delta = (t2 - t1)*PIT_TICK_RATE; | ||
351 | do_div(delta, QUICK_PIT_ITERATIONS*256*1000); | ||
352 | printk("Fast TSC calibration using PIT\n"); | ||
353 | return delta; | ||
354 | } | 352 | } |
355 | failed: | 353 | printk("Fast TSC calibration failed\n"); |
356 | return 0; | 354 | return 0; |
355 | |||
356 | success: | ||
357 | /* | ||
358 | * Ok, if we get here, then we've seen the | ||
359 | * MSB of the PIT decrement 'i' times, and the | ||
360 | * error has shrunk to less than 500 ppm. | ||
361 | * | ||
362 | * As a result, we can depend on there not being | ||
363 | * any odd delays anywhere, and the TSC reads are | ||
364 | * reliable (within the error). We also adjust the | ||
365 | * delta to the middle of the error bars, just | ||
366 | * because it looks nicer. | ||
367 | * | ||
368 | * kHz = ticks / time-in-seconds / 1000; | ||
369 | * kHz = (t2 - t1) / (I * 256 / PIT_TICK_RATE) / 1000 | ||
370 | * kHz = ((t2 - t1) * PIT_TICK_RATE) / (I * 256 * 1000) | ||
371 | */ | ||
372 | delta += (long)(d2 - d1)/2; | ||
373 | delta *= PIT_TICK_RATE; | ||
374 | do_div(delta, i*256*1000); | ||
375 | printk("Fast TSC calibration using PIT\n"); | ||
376 | return delta; | ||
357 | } | 377 | } |
358 | 378 | ||
359 | /** | 379 | /** |
diff --git a/arch/x86/mm/kmmio.c b/arch/x86/mm/kmmio.c index 9f205030d9aa..6a518dd08a36 100644 --- a/arch/x86/mm/kmmio.c +++ b/arch/x86/mm/kmmio.c | |||
@@ -451,23 +451,24 @@ static void rcu_free_kmmio_fault_pages(struct rcu_head *head) | |||
451 | 451 | ||
452 | static void remove_kmmio_fault_pages(struct rcu_head *head) | 452 | static void remove_kmmio_fault_pages(struct rcu_head *head) |
453 | { | 453 | { |
454 | struct kmmio_delayed_release *dr = container_of( | 454 | struct kmmio_delayed_release *dr = |
455 | head, | 455 | container_of(head, struct kmmio_delayed_release, rcu); |
456 | struct kmmio_delayed_release, | ||
457 | rcu); | ||
458 | struct kmmio_fault_page *p = dr->release_list; | 456 | struct kmmio_fault_page *p = dr->release_list; |
459 | struct kmmio_fault_page **prevp = &dr->release_list; | 457 | struct kmmio_fault_page **prevp = &dr->release_list; |
460 | unsigned long flags; | 458 | unsigned long flags; |
459 | |||
461 | spin_lock_irqsave(&kmmio_lock, flags); | 460 | spin_lock_irqsave(&kmmio_lock, flags); |
462 | while (p) { | 461 | while (p) { |
463 | if (!p->count) | 462 | if (!p->count) { |
464 | list_del_rcu(&p->list); | 463 | list_del_rcu(&p->list); |
465 | else | 464 | prevp = &p->release_next; |
465 | } else { | ||
466 | *prevp = p->release_next; | 466 | *prevp = p->release_next; |
467 | prevp = &p->release_next; | 467 | } |
468 | p = p->release_next; | 468 | p = p->release_next; |
469 | } | 469 | } |
470 | spin_unlock_irqrestore(&kmmio_lock, flags); | 470 | spin_unlock_irqrestore(&kmmio_lock, flags); |
471 | |||
471 | /* This is the real RCU destroy call. */ | 472 | /* This is the real RCU destroy call. */ |
472 | call_rcu(&dr->rcu, rcu_free_kmmio_fault_pages); | 473 | call_rcu(&dr->rcu, rcu_free_kmmio_fault_pages); |
473 | } | 474 | } |
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c index 7be47d1a97e4..7233bd7e357b 100644 --- a/arch/x86/mm/pageattr.c +++ b/arch/x86/mm/pageattr.c | |||
@@ -515,6 +515,17 @@ static int split_large_page(pte_t *kpte, unsigned long address) | |||
515 | * primary protection behavior: | 515 | * primary protection behavior: |
516 | */ | 516 | */ |
517 | __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE))); | 517 | __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE))); |
518 | |||
519 | /* | ||
520 | * Intel Atom errata AAH41 workaround. | ||
521 | * | ||
522 | * The real fix should be in hw or in a microcode update, but | ||
523 | * we also probabilistically try to reduce the window of having | ||
524 | * a large TLB mixed with 4K TLBs while instruction fetches are | ||
525 | * going on. | ||
526 | */ | ||
527 | __flush_tlb_all(); | ||
528 | |||
518 | base = NULL; | 529 | base = NULL; |
519 | 530 | ||
520 | out_unlock: | 531 | out_unlock: |