diff options
author | Stephane Eranian <eranian@google.com> | 2014-11-17 14:06:53 -0500 |
---|---|---|
committer | Ingo Molnar <mingo@kernel.org> | 2015-04-02 11:33:08 -0400 |
commit | 9a5e3fb52ae5458c8bf1a67129b96c39b541a582 (patch) | |
tree | 41feb0486d9b66f1f92faba52feee1fc5e256cae /arch/x86 | |
parent | c2b078e78ace39710356a7bb6b984177d942a699 (diff) |
perf/x86: Rename x86_pmu::er_flags to 'flags'
Because it will be used for more than just tracking the
presence of extra registers.
Signed-off-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: bp@alien8.de
Cc: jolsa@redhat.com
Cc: kan.liang@intel.com
Cc: maria.n.dimakopoulou@gmail.com
Link: http://lkml.kernel.org/r/1416251225-17721-2-git-send-email-eranian@google.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86')
-rw-r--r-- | arch/x86/kernel/cpu/perf_event.h | 9 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/perf_event_intel.c | 24 |
2 files changed, 18 insertions, 15 deletions
diff --git a/arch/x86/kernel/cpu/perf_event.h b/arch/x86/kernel/cpu/perf_event.h index eaebfd707016..5264010c9a08 100644 --- a/arch/x86/kernel/cpu/perf_event.h +++ b/arch/x86/kernel/cpu/perf_event.h | |||
@@ -521,7 +521,7 @@ struct x86_pmu { | |||
521 | * Extra registers for events | 521 | * Extra registers for events |
522 | */ | 522 | */ |
523 | struct extra_reg *extra_regs; | 523 | struct extra_reg *extra_regs; |
524 | unsigned int er_flags; | 524 | unsigned int flags; |
525 | 525 | ||
526 | /* | 526 | /* |
527 | * Intel host/guest support (KVM) | 527 | * Intel host/guest support (KVM) |
@@ -545,8 +545,11 @@ do { \ | |||
545 | x86_pmu.quirks = &__quirk; \ | 545 | x86_pmu.quirks = &__quirk; \ |
546 | } while (0) | 546 | } while (0) |
547 | 547 | ||
548 | #define ERF_NO_HT_SHARING 1 | 548 | /* |
549 | #define ERF_HAS_RSP_1 2 | 549 | * x86_pmu flags |
550 | */ | ||
551 | #define PMU_FL_NO_HT_SHARING 0x1 /* no hyper-threading resource sharing */ | ||
552 | #define PMU_FL_HAS_RSP_1 0x2 /* has 2 equivalent offcore_rsp regs */ | ||
550 | 553 | ||
551 | #define EVENT_VAR(_id) event_attr_##_id | 554 | #define EVENT_VAR(_id) event_attr_##_id |
552 | #define EVENT_PTR(_id) &event_attr_##_id.attr.attr | 555 | #define EVENT_PTR(_id) &event_attr_##_id.attr.attr |
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c index 1c78f44f4f93..e85988e2ecc7 100644 --- a/arch/x86/kernel/cpu/perf_event_intel.c +++ b/arch/x86/kernel/cpu/perf_event_intel.c | |||
@@ -1667,7 +1667,7 @@ intel_bts_constraints(struct perf_event *event) | |||
1667 | 1667 | ||
1668 | static int intel_alt_er(int idx) | 1668 | static int intel_alt_er(int idx) |
1669 | { | 1669 | { |
1670 | if (!(x86_pmu.er_flags & ERF_HAS_RSP_1)) | 1670 | if (!(x86_pmu.flags & PMU_FL_HAS_RSP_1)) |
1671 | return idx; | 1671 | return idx; |
1672 | 1672 | ||
1673 | if (idx == EXTRA_REG_RSP_0) | 1673 | if (idx == EXTRA_REG_RSP_0) |
@@ -2250,7 +2250,7 @@ static void intel_pmu_cpu_starting(int cpu) | |||
2250 | if (!cpuc->shared_regs) | 2250 | if (!cpuc->shared_regs) |
2251 | return; | 2251 | return; |
2252 | 2252 | ||
2253 | if (!(x86_pmu.er_flags & ERF_NO_HT_SHARING)) { | 2253 | if (!(x86_pmu.flags & PMU_FL_NO_HT_SHARING)) { |
2254 | for_each_cpu(i, topology_thread_cpumask(cpu)) { | 2254 | for_each_cpu(i, topology_thread_cpumask(cpu)) { |
2255 | struct intel_shared_regs *pc; | 2255 | struct intel_shared_regs *pc; |
2256 | 2256 | ||
@@ -2671,7 +2671,7 @@ __init int intel_pmu_init(void) | |||
2671 | x86_pmu.event_constraints = intel_slm_event_constraints; | 2671 | x86_pmu.event_constraints = intel_slm_event_constraints; |
2672 | x86_pmu.pebs_constraints = intel_slm_pebs_event_constraints; | 2672 | x86_pmu.pebs_constraints = intel_slm_pebs_event_constraints; |
2673 | x86_pmu.extra_regs = intel_slm_extra_regs; | 2673 | x86_pmu.extra_regs = intel_slm_extra_regs; |
2674 | x86_pmu.er_flags |= ERF_HAS_RSP_1; | 2674 | x86_pmu.flags |= PMU_FL_HAS_RSP_1; |
2675 | pr_cont("Silvermont events, "); | 2675 | pr_cont("Silvermont events, "); |
2676 | break; | 2676 | break; |
2677 | 2677 | ||
@@ -2689,7 +2689,7 @@ __init int intel_pmu_init(void) | |||
2689 | x86_pmu.enable_all = intel_pmu_nhm_enable_all; | 2689 | x86_pmu.enable_all = intel_pmu_nhm_enable_all; |
2690 | x86_pmu.pebs_constraints = intel_westmere_pebs_event_constraints; | 2690 | x86_pmu.pebs_constraints = intel_westmere_pebs_event_constraints; |
2691 | x86_pmu.extra_regs = intel_westmere_extra_regs; | 2691 | x86_pmu.extra_regs = intel_westmere_extra_regs; |
2692 | x86_pmu.er_flags |= ERF_HAS_RSP_1; | 2692 | x86_pmu.flags |= PMU_FL_HAS_RSP_1; |
2693 | 2693 | ||
2694 | x86_pmu.cpu_events = nhm_events_attrs; | 2694 | x86_pmu.cpu_events = nhm_events_attrs; |
2695 | 2695 | ||
@@ -2721,8 +2721,8 @@ __init int intel_pmu_init(void) | |||
2721 | else | 2721 | else |
2722 | x86_pmu.extra_regs = intel_snb_extra_regs; | 2722 | x86_pmu.extra_regs = intel_snb_extra_regs; |
2723 | /* all extra regs are per-cpu when HT is on */ | 2723 | /* all extra regs are per-cpu when HT is on */ |
2724 | x86_pmu.er_flags |= ERF_HAS_RSP_1; | 2724 | x86_pmu.flags |= PMU_FL_HAS_RSP_1; |
2725 | x86_pmu.er_flags |= ERF_NO_HT_SHARING; | 2725 | x86_pmu.flags |= PMU_FL_NO_HT_SHARING; |
2726 | 2726 | ||
2727 | x86_pmu.cpu_events = snb_events_attrs; | 2727 | x86_pmu.cpu_events = snb_events_attrs; |
2728 | 2728 | ||
@@ -2756,8 +2756,8 @@ __init int intel_pmu_init(void) | |||
2756 | else | 2756 | else |
2757 | x86_pmu.extra_regs = intel_snb_extra_regs; | 2757 | x86_pmu.extra_regs = intel_snb_extra_regs; |
2758 | /* all extra regs are per-cpu when HT is on */ | 2758 | /* all extra regs are per-cpu when HT is on */ |
2759 | x86_pmu.er_flags |= ERF_HAS_RSP_1; | 2759 | x86_pmu.flags |= PMU_FL_HAS_RSP_1; |
2760 | x86_pmu.er_flags |= ERF_NO_HT_SHARING; | 2760 | x86_pmu.flags |= PMU_FL_NO_HT_SHARING; |
2761 | 2761 | ||
2762 | x86_pmu.cpu_events = snb_events_attrs; | 2762 | x86_pmu.cpu_events = snb_events_attrs; |
2763 | 2763 | ||
@@ -2784,8 +2784,8 @@ __init int intel_pmu_init(void) | |||
2784 | x86_pmu.extra_regs = intel_snbep_extra_regs; | 2784 | x86_pmu.extra_regs = intel_snbep_extra_regs; |
2785 | x86_pmu.pebs_aliases = intel_pebs_aliases_snb; | 2785 | x86_pmu.pebs_aliases = intel_pebs_aliases_snb; |
2786 | /* all extra regs are per-cpu when HT is on */ | 2786 | /* all extra regs are per-cpu when HT is on */ |
2787 | x86_pmu.er_flags |= ERF_HAS_RSP_1; | 2787 | x86_pmu.flags |= PMU_FL_HAS_RSP_1; |
2788 | x86_pmu.er_flags |= ERF_NO_HT_SHARING; | 2788 | x86_pmu.flags |= PMU_FL_NO_HT_SHARING; |
2789 | 2789 | ||
2790 | x86_pmu.hw_config = hsw_hw_config; | 2790 | x86_pmu.hw_config = hsw_hw_config; |
2791 | x86_pmu.get_event_constraints = hsw_get_event_constraints; | 2791 | x86_pmu.get_event_constraints = hsw_get_event_constraints; |
@@ -2817,8 +2817,8 @@ __init int intel_pmu_init(void) | |||
2817 | x86_pmu.extra_regs = intel_snbep_extra_regs; | 2817 | x86_pmu.extra_regs = intel_snbep_extra_regs; |
2818 | x86_pmu.pebs_aliases = intel_pebs_aliases_snb; | 2818 | x86_pmu.pebs_aliases = intel_pebs_aliases_snb; |
2819 | /* all extra regs are per-cpu when HT is on */ | 2819 | /* all extra regs are per-cpu when HT is on */ |
2820 | x86_pmu.er_flags |= ERF_HAS_RSP_1; | 2820 | x86_pmu.flags |= PMU_FL_HAS_RSP_1; |
2821 | x86_pmu.er_flags |= ERF_NO_HT_SHARING; | 2821 | x86_pmu.flags |= PMU_FL_NO_HT_SHARING; |
2822 | 2822 | ||
2823 | x86_pmu.hw_config = hsw_hw_config; | 2823 | x86_pmu.hw_config = hsw_hw_config; |
2824 | x86_pmu.get_event_constraints = hsw_get_event_constraints; | 2824 | x86_pmu.get_event_constraints = hsw_get_event_constraints; |