Merge branch 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci

* 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci: (80 commits)
  x86/PCI: Expand the x86_msi_ops to have a restore MSIs.
  PCI: Increase resource array mask bit size in pcim_iomap_regions()
  PCI: DEVICE_COUNT_RESOURCE should be equal to PCI_NUM_RESOURCES
  PCI: pci_ids: add device ids for STA2X11 device (aka ConneXT)
  PNP: work around Dell 1536/1546 BIOS MMCONFIG bug that breaks USB
  x86/PCI: amd: factor out MMCONFIG discovery
  PCI: Enable ATS at the device state restore
  PCI: msi: fix imbalanced refcount of msi irq sysfs objects
  PCI: kconfig: English typo in pci/pcie/Kconfig
  PCI/PM/Runtime: make PCI traces quieter
  PCI: remove pci_create_bus()
  xtensa/PCI: convert to pci_scan_root_bus() for correct root bus resources
  x86/PCI: convert to pci_create_root_bus() and pci_scan_root_bus()
  x86/PCI: use pci_scan_bus() instead of pci_scan_bus_parented()
  x86/PCI: read Broadcom CNB20LE host bridge info before PCI scan
  sparc32, leon/PCI: convert to pci_scan_root_bus() for correct root bus resources
  sparc/PCI: convert to pci_create_root_bus()
  sh/PCI: convert to pci_scan_root_bus() for correct root bus resources
  powerpc/PCI: convert to pci_create_root_bus()
  powerpc/PCI: split PHB part out of pcibios_map_io_space()
  ...

Fix up conflicts in drivers/pci/msi.c and include/linux/pci_regs.h due
to the same patches being applied in other branches.

15 files changed, 184 insertions, 119 deletions

diff --git a/arch/x86/include/asm/amd_nb.h b/arch/x86/include/asm/amd_nb.h
index 8e41071704a5..49ad773f4b9f 100644
--- a/arch/x86/include/asm/amd_nb.h
+++ b/arch/x86/include/asm/amd_nb.h
@@ -1,6 +1,7 @@
 #ifndef _ASM_X86_AMD_NB_H
 #define _ASM_X86_AMD_NB_H
 
+#include <linux/ioport.h>
 #include <linux/pci.h>
 
 struct amd_nb_bus_dev_range {
@@ -13,6 +14,7 @@ extern const struct pci_device_id amd_nb_misc_ids[];
 extern const struct amd_nb_bus_dev_range amd_nb_bus_dev_ranges[];
 
 extern bool early_is_amd_nb(u32 value);
+extern struct resource *amd_get_mmconfig_range(struct resource *res);
 extern int amd_cache_northbridges(void);
 extern void amd_flush_garts(void);
 extern int amd_numa_init(void);
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index d498943b906c..df75d07571ce 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -112,19 +112,28 @@ static inline void x86_teardown_msi_irq(unsigned int irq)
 {
         x86_msi.teardown_msi_irq(irq);
 }
+static inline void x86_restore_msi_irqs(struct pci_dev *dev, int irq)
+{
+        x86_msi.restore_msi_irqs(dev, irq);
+}
 #define arch_setup_msi_irqs x86_setup_msi_irqs
 #define arch_teardown_msi_irqs x86_teardown_msi_irqs
 #define arch_teardown_msi_irq x86_teardown_msi_irq
+#define arch_restore_msi_irqs x86_restore_msi_irqs
 /* implemented in arch/x86/kernel/apic/io_apic. */
 int native_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
 void native_teardown_msi_irq(unsigned int irq);
+void native_restore_msi_irqs(struct pci_dev *dev, int irq);
 /* default to the implementation in drivers/lib/msi.c */
 #define HAVE_DEFAULT_MSI_TEARDOWN_IRQS
+#define HAVE_DEFAULT_MSI_RESTORE_IRQS
 void default_teardown_msi_irqs(struct pci_dev *dev);
+void default_restore_msi_irqs(struct pci_dev *dev, int irq);
 #else
 #define native_setup_msi_irqs           NULL
 #define native_teardown_msi_irq         NULL
 #define default_teardown_msi_irqs       NULL
+#define default_restore_msi_irqs        NULL
 #endif
 
 #define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys)
diff --git a/arch/x86/include/asm/pci_x86.h b/arch/x86/include/asm/pci_x86.h
index e38197806853..b3a531746026 100644
--- a/arch/x86/include/asm/pci_x86.h
+++ b/arch/x86/include/asm/pci_x86.h
@@ -44,8 +44,6 @@ enum pci_bf_sort_state {
 
 /* pci-i386.c */
 
-extern unsigned int pcibios_max_latency;
-
 void pcibios_resource_survey(void);
 void pcibios_set_cache_line_size(void);
 
diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h
index 800f77c60051..b9676ae37ada 100644
--- a/arch/x86/include/asm/topology.h
+++ b/arch/x86/include/asm/topology.h
@@ -172,7 +172,7 @@ static inline void arch_fix_phys_package_id(int num, u32 slot)
 }
 
 struct pci_bus;
-void x86_pci_root_bus_res_quirks(struct pci_bus *b);
+void x86_pci_root_bus_resources(int bus, struct list_head *resources);
 
 #ifdef CONFIG_SMP
 #define mc_capable()    ((boot_cpu_data.x86_max_cores > 1) && \
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index 1ac860a09849..517d4767ffdd 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -179,6 +179,7 @@ struct x86_msi_ops {
         int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type);
         void (*teardown_msi_irq)(unsigned int irq);
         void (*teardown_msi_irqs)(struct pci_dev *dev);
+        void (*restore_msi_irqs)(struct pci_dev *dev, int irq);
 };
 
 extern struct x86_init_ops x86_init;
diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
index 013c1810ce72..be16854591cc 100644
--- a/arch/x86/kernel/amd_nb.c
+++ b/arch/x86/kernel/amd_nb.c
@@ -119,6 +119,37 @@ bool __init early_is_amd_nb(u32 device)
         return false;
 }
 
+struct resource *amd_get_mmconfig_range(struct resource *res)
+{
+        u32 address;
+        u64 base, msr;
+        unsigned segn_busn_bits;
+
+        if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD)
+                return NULL;
+
+        /* assume all cpus from fam10h have mmconfig */
+        if (boot_cpu_data.x86 < 0x10)
+                return NULL;
+
+        address = MSR_FAM10H_MMIO_CONF_BASE;
+        rdmsrl(address, msr);
+
+        /* mmconfig is not enabled */
+        if (!(msr & FAM10H_MMIO_CONF_ENABLE))
+                return NULL;
+
+        base = msr & (FAM10H_MMIO_CONF_BASE_MASK<<FAM10H_MMIO_CONF_BASE_SHIFT);
+
+        segn_busn_bits = (msr >> FAM10H_MMIO_CONF_BUSRANGE_SHIFT) &
+                         FAM10H_MMIO_CONF_BUSRANGE_MASK;
+
+        res->flags = IORESOURCE_MEM;
+        res->start = base;
+        res->end = base + (1ULL<<(segn_busn_bits + 20)) - 1;
+        return res;
+}
+
 int amd_get_subcaches(int cpu)
 {
         struct pci_dev *link = node_to_amd_nb(amd_get_nb_id(cpu))->link;
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
index 91f83e21b989..947a06ccc673 100644
--- a/arch/x86/kernel/x86_init.c
+++ b/arch/x86/kernel/x86_init.c
@@ -115,4 +115,5 @@ struct x86_msi_ops x86_msi = {
         .setup_msi_irqs = native_setup_msi_irqs,
         .teardown_msi_irq = native_teardown_msi_irq,
         .teardown_msi_irqs = default_teardown_msi_irqs,
+        .restore_msi_irqs = default_restore_msi_irqs,
 };
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c
index 404f21a3ff9e..a312e76063a7 100644
--- a/arch/x86/pci/acpi.c
+++ b/arch/x86/pci/acpi.c
@@ -12,7 +12,7 @@ struct pci_root_info {
         char *name;
         unsigned int res_num;
         struct resource *res;
-        struct pci_bus *bus;
+        struct list_head *resources;
         int busnum;
 };
 
@@ -24,6 +24,12 @@ static int __init set_use_crs(const struct dmi_system_id *id)
         return 0;
 }
 
+static int __init set_nouse_crs(const struct dmi_system_id *id)
+{
+        pci_use_crs = false;
+        return 0;
+}
+
 static const struct dmi_system_id pci_use_crs_table[] __initconst = {
         /* http://bugzilla.kernel.org/show_bug.cgi?id=14183 */
         {
@@ -54,6 +60,29 @@ static const struct dmi_system_id pci_use_crs_table[] __initconst = {
                         DMI_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."),
                 },
         },
+
+        /* Now for the blacklist.. */
+
+        /* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */
+        {
+                .callback = set_nouse_crs,
+                .ident = "Dell Studio 1557",
+                .matches = {
+                        DMI_MATCH(DMI_BOARD_VENDOR, "Dell Inc."),
+                        DMI_MATCH(DMI_PRODUCT_NAME, "Studio 1557"),
+                        DMI_MATCH(DMI_BIOS_VERSION, "A09"),
+                },
+        },
+        /* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */
+        {
+                .callback = set_nouse_crs,
+                .ident = "Thinkpad SL510",
+                .matches = {
+                        DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
+                        DMI_MATCH(DMI_BOARD_NAME, "2847DFG"),
+                        DMI_MATCH(DMI_BIOS_VERSION, "6JET85WW (1.43 )"),
+                },
+        },
         {}
 };
 
@@ -149,7 +178,7 @@ setup_resource(struct acpi_resource *acpi_res, void *data)
         struct acpi_resource_address64 addr;
         acpi_status status;
         unsigned long flags;
-        u64 start, end;
+        u64 start, orig_end, end;
 
         status = resource_to_addr(acpi_res, &addr);
         if (!ACPI_SUCCESS(status))
@@ -165,7 +194,21 @@ setup_resource(struct acpi_resource *acpi_res, void *data)
                 return AE_OK;
 
         start = addr.minimum + addr.translation_offset;
-        end = addr.maximum + addr.translation_offset;
+        orig_end = end = addr.maximum + addr.translation_offset;
+
+        /* Exclude non-addressable range or non-addressable portion of range */
+        end = min(end, (u64)iomem_resource.end);
+        if (end <= start) {
+                dev_info(&info->bridge->dev,
+                        "host bridge window [%#llx-%#llx] "
+                        "(ignored, not CPU addressable)\n", start, orig_end);
+                return AE_OK;
+        } else if (orig_end != end) {
+                dev_info(&info->bridge->dev,
+                        "host bridge window [%#llx-%#llx] "
+                        "([%#llx-%#llx] ignored, not CPU addressable)\n", 
+                        start, orig_end, end + 1, orig_end);
+        }
 
         res = &info->res[info->res_num];
         res->name = info->name;
@@ -261,23 +304,20 @@ static void add_resources(struct pci_root_info *info)
                                  "ignoring host bridge window %pR (conflicts with %s %pR)\n",
                                  res, conflict->name, conflict);
                 else
-                        pci_bus_add_resource(info->bus, res, 0);
+                        pci_add_resource(info->resources, res);
         }
 }
 
 static void
 get_current_resources(struct acpi_device *device, int busnum,
-                        int domain, struct pci_bus *bus)
+                      int domain, struct list_head *resources)
 {
         struct pci_root_info info;
         size_t size;
 
-        if (pci_use_crs)
-                pci_bus_remove_resources(bus);
-
         info.bridge = device;
-        info.bus = bus;
         info.res_num = 0;
+        info.resources = resources;
         acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_resource,
                                 &info);
         if (!info.res_num)
@@ -286,7 +326,7 @@ get_current_resources(struct acpi_device *device, int busnum,
         size = sizeof(*info.res) * info.res_num;
         info.res = kmalloc(size, GFP_KERNEL);
         if (!info.res)
-                goto res_alloc_fail;
+                return;
 
         info.name = kasprintf(GFP_KERNEL, "PCI Bus %04x:%02x", domain, busnum);
         if (!info.name)
@@ -301,8 +341,6 @@ get_current_resources(struct acpi_device *device, int busnum,
 
 name_alloc_fail:
         kfree(info.res);
-res_alloc_fail:
-        return;
 }
 
 struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root)
@@ -310,6 +348,7 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root)
         struct acpi_device *device = root->device;
         int domain = root->segment;
         int busnum = root->secondary.start;
+        LIST_HEAD(resources);
         struct pci_bus *bus;
         struct pci_sysdata *sd;
         int node;
@@ -364,11 +403,15 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root)
                 memcpy(bus->sysdata, sd, sizeof(*sd));
                 kfree(sd);
         } else {
-                bus = pci_create_bus(NULL, busnum, &pci_root_ops, sd);
-                if (bus) {
-                        get_current_resources(device, busnum, domain, bus);
+                get_current_resources(device, busnum, domain, &resources);
+                if (list_empty(&resources))
+                        x86_pci_root_bus_resources(busnum, &resources);
+                bus = pci_create_root_bus(NULL, busnum, &pci_root_ops, sd,
+                                          &resources);
+                if (bus)
                         bus->subordinate = pci_scan_child_bus(bus);
-                }
+                else
+                        pci_free_resource_list(&resources);
         }
 
         /* After the PCI-E bus has been walked and all devices discovered,
diff --git a/arch/x86/pci/amd_bus.c b/arch/x86/pci/amd_bus.c
index 026e4931d162..0567df3890e1 100644
--- a/arch/x86/pci/amd_bus.c
+++ b/arch/x86/pci/amd_bus.c
@@ -30,34 +30,6 @@ static struct pci_hostbridge_probe pci_probes[] __initdata = {
         { 0, 0x18, PCI_VENDOR_ID_AMD, 0x1300 },
 };
 
-static u64 __initdata fam10h_mmconf_start;
-static u64 __initdata fam10h_mmconf_end;
-static void __init get_pci_mmcfg_amd_fam10h_range(void)
-{
-        u32 address;
-        u64 base, msr;
-        unsigned segn_busn_bits;
-
-        /* assume all cpus from fam10h have mmconf */
-        if (boot_cpu_data.x86 < 0x10)
-                return;
-
-        address = MSR_FAM10H_MMIO_CONF_BASE;
-        rdmsrl(address, msr);
-
-        /* mmconfig is not enable */
-        if (!(msr & FAM10H_MMIO_CONF_ENABLE))
-                return;
-
-        base = msr & (FAM10H_MMIO_CONF_BASE_MASK<<FAM10H_MMIO_CONF_BASE_SHIFT);
-
-        segn_busn_bits = (msr >> FAM10H_MMIO_CONF_BUSRANGE_SHIFT) &
-                         FAM10H_MMIO_CONF_BUSRANGE_MASK;
-
-        fam10h_mmconf_start = base;
-        fam10h_mmconf_end = base + (1ULL<<(segn_busn_bits + 20)) - 1;
-}
-
 #define RANGE_NUM 16
 
 /**
@@ -85,6 +57,9 @@ static int __init early_fill_mp_bus_info(void)
         u64 val;
         u32 address;
         bool found;
+        struct resource fam10h_mmconf_res, *fam10h_mmconf;
+        u64 fam10h_mmconf_start;
+        u64 fam10h_mmconf_end;
 
         if (!early_pci_allowed())
                 return -1;
@@ -211,12 +186,17 @@ static int __init early_fill_mp_bus_info(void)
                 subtract_range(range, RANGE_NUM, 0, end);
 
         /* get mmconfig */
-        get_pci_mmcfg_amd_fam10h_range();
+        fam10h_mmconf = amd_get_mmconfig_range(&fam10h_mmconf_res);
         /* need to take out mmconf range */
-        if (fam10h_mmconf_end) {
-                printk(KERN_DEBUG "Fam 10h mmconf [%llx, %llx]\n", fam10h_mmconf_start, fam10h_mmconf_end);
+        if (fam10h_mmconf) {
+                printk(KERN_DEBUG "Fam 10h mmconf %pR\n", fam10h_mmconf);
+                fam10h_mmconf_start = fam10h_mmconf->start;
+                fam10h_mmconf_end = fam10h_mmconf->end;
                 subtract_range(range, RANGE_NUM, fam10h_mmconf_start,
                                  fam10h_mmconf_end + 1);
+        } else {
+                fam10h_mmconf_start = 0;
+                fam10h_mmconf_end = 0;
         }
 
         /* mmio resource */
@@ -403,7 +383,6 @@ static void __init pci_enable_pci_io_ecs(void)
                         ++n;
                 }
         }
-        pr_info("Extended Config Space enabled on %u nodes\n", n);
 #endif
 }
 
diff --git a/arch/x86/pci/broadcom_bus.c b/arch/x86/pci/broadcom_bus.c
index ab8269b0da29..f3a7c569a403 100644
--- a/arch/x86/pci/broadcom_bus.c
+++ b/arch/x86/pci/broadcom_bus.c
@@ -15,10 +15,11 @@
 #include <linux/pci.h>
 #include <linux/init.h>
 #include <asm/pci_x86.h>
+#include <asm/pci-direct.h>
 
 #include "bus_numa.h"
 
-static void __devinit cnb20le_res(struct pci_dev *dev)
+static void __init cnb20le_res(u8 bus, u8 slot, u8 func)
 {
         struct pci_root_info *info;
         struct resource res;
@@ -26,21 +27,12 @@ static void __devinit cnb20le_res(struct pci_dev *dev)
         u8 fbus, lbus;
         int i;
 
-#ifdef CONFIG_ACPI
-        /*
-         * We should get host bridge information from ACPI unless the BIOS
-         * doesn't support it.
-         */
-        if (acpi_os_get_root_pointer())
-                return;
-#endif
-
         info = &pci_root_info[pci_root_num];
         pci_root_num++;
 
         /* read the PCI bus numbers */
-        pci_read_config_byte(dev, 0x44, &fbus);
-        pci_read_config_byte(dev, 0x45, &lbus);
+        fbus = read_pci_config_byte(bus, slot, func, 0x44);
+        lbus = read_pci_config_byte(bus, slot, func, 0x45);
         info->bus_min = fbus;
         info->bus_max = lbus;
 
@@ -59,8 +51,8 @@ static void __devinit cnb20le_res(struct pci_dev *dev)
         }
 
         /* read the non-prefetchable memory window */
-        pci_read_config_word(dev, 0xc0, &word1);
-        pci_read_config_word(dev, 0xc2, &word2);
+        word1 = read_pci_config_16(bus, slot, func, 0xc0);
+        word2 = read_pci_config_16(bus, slot, func, 0xc2);
         if (word1 != word2) {
                 res.start = (word1 << 16) | 0x0000;
                 res.end   = (word2 << 16) | 0xffff;
@@ -69,8 +61,8 @@ static void __devinit cnb20le_res(struct pci_dev *dev)
         }
 
         /* read the prefetchable memory window */
-        pci_read_config_word(dev, 0xc4, &word1);
-        pci_read_config_word(dev, 0xc6, &word2);
+        word1 = read_pci_config_16(bus, slot, func, 0xc4);
+        word2 = read_pci_config_16(bus, slot, func, 0xc6);
         if (word1 != word2) {
                 res.start = (word1 << 16) | 0x0000;
                 res.end   = (word2 << 16) | 0xffff;
@@ -79,8 +71,8 @@ static void __devinit cnb20le_res(struct pci_dev *dev)
         }
 
         /* read the IO port window */
-        pci_read_config_word(dev, 0xd0, &word1);
-        pci_read_config_word(dev, 0xd2, &word2);
+        word1 = read_pci_config_16(bus, slot, func, 0xd0);
+        word2 = read_pci_config_16(bus, slot, func, 0xd2);
         if (word1 != word2) {
                 res.start = word1;
                 res.end   = word2;
@@ -92,13 +84,37 @@ static void __devinit cnb20le_res(struct pci_dev *dev)
         res.start = fbus;
         res.end   = lbus;
         res.flags = IORESOURCE_BUS;
-        dev_info(&dev->dev, "CNB20LE PCI Host Bridge (domain %04x %pR)\n",
-                            pci_domain_nr(dev->bus), &res);
+        printk(KERN_INFO "CNB20LE PCI Host Bridge (domain 0000 %pR)\n", &res);
 
         for (i = 0; i < info->res_num; i++)
-                dev_info(&dev->dev, "host bridge window %pR\n", &info->res[i]);
+                printk(KERN_INFO "host bridge window %pR\n", &info->res[i]);
 }
 
-DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_LE,
-                        cnb20le_res);
+static int __init broadcom_postcore_init(void)
+{
+        u8 bus = 0, slot = 0;
+        u32 id;
+        u16 vendor, device;
+
+#ifdef CONFIG_ACPI
+        /*
+         * We should get host bridge information from ACPI unless the BIOS
+         * doesn't support it.
+         */
+        if (acpi_os_get_root_pointer())
+                return 0;
+#endif
+
+        id = read_pci_config(bus, slot, 0, PCI_VENDOR_ID);
+        vendor = id & 0xffff;
+        device = (id >> 16) & 0xffff;
+
+        if (vendor == PCI_VENDOR_ID_SERVERWORKS &&
+            device == PCI_DEVICE_ID_SERVERWORKS_LE) {
+                cnb20le_res(bus, slot, 0);
+                cnb20le_res(bus, slot, 1);
+        }
+        return 0;
+}
 
+postcore_initcall(broadcom_postcore_init);
diff --git a/arch/x86/pci/bus_numa.c b/arch/x86/pci/bus_numa.c
index 64a122883896..fd3f65510e9d 100644
--- a/arch/x86/pci/bus_numa.c
+++ b/arch/x86/pci/bus_numa.c
@@ -7,45 +7,50 @@
 int pci_root_num;
 struct pci_root_info pci_root_info[PCI_ROOT_NR];
 
-void x86_pci_root_bus_res_quirks(struct pci_bus *b)
+void x86_pci_root_bus_resources(int bus, struct list_head *resources)
 {
         int i;
         int j;
         struct pci_root_info *info;
 
-        /* don't go for it if _CRS is used already */
-        if (b->resource[0] != &ioport_resource ||
-            b->resource[1] != &iomem_resource)
-                return;
-
         if (!pci_root_num)
-                return;
+                goto default_resources;
 
         for (i = 0; i < pci_root_num; i++) {
-                if (pci_root_info[i].bus_min == b->number)
+                if (pci_root_info[i].bus_min == bus)
                         break;
         }
 
         if (i == pci_root_num)
-                return;
+                goto default_resources;
 
-        printk(KERN_DEBUG "PCI: peer root bus %02x res updated from pci conf\n",
-                        b->number);
+        printk(KERN_DEBUG "PCI: root bus %02x: hardware-probed resources\n",
+               bus);
 
-        pci_bus_remove_resources(b);
         info = &pci_root_info[i];
         for (j = 0; j < info->res_num; j++) {
                 struct resource *res;
                 struct resource *root;
 
                 res = &info->res[j];
-                pci_bus_add_resource(b, res, 0);
+                pci_add_resource(resources, res);
                 if (res->flags & IORESOURCE_IO)
                         root = &ioport_resource;
                 else
                         root = &iomem_resource;
                 insert_resource(root, res);
         }
+        return;
+
+default_resources:
+        /*
+         * We don't have any host bridge aperture information from the
+         * "native host bridge drivers," e.g., amd_bus or broadcom_bus,
+         * so fall back to the defaults historically used by pci_create_bus().
+         */
+        printk(KERN_DEBUG "PCI: root bus %02x: using default resources\n", bus);
+        pci_add_resource(resources, &ioport_resource);
+        pci_add_resource(resources, &iomem_resource);
 }
 
 void __devinit update_res(struct pci_root_info *info, resource_size_t start,
diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c
index 7962ccb4d9b2..323481e06ef8 100644
--- a/arch/x86/pci/common.c
+++ b/arch/x86/pci/common.c
@@ -164,9 +164,6 @@ void __devinit pcibios_fixup_bus(struct pci_bus *b)
 {
         struct pci_dev *dev;
 
-        /* root bus? */
-        if (!b->parent)
-                x86_pci_root_bus_res_quirks(b);
         pci_read_bridge_bases(b);
         list_for_each_entry(dev, &b->devices, bus_list)
                 pcibios_fixup_device_resources(dev);
@@ -433,6 +430,7 @@ void __init dmi_check_pciprobe(void)
 
 struct pci_bus * __devinit pcibios_scan_root(int busnum)
 {
+        LIST_HEAD(resources);
         struct pci_bus *bus = NULL;
         struct pci_sysdata *sd;
 
@@ -456,9 +454,12 @@ struct pci_bus * __devinit pcibios_scan_root(int busnum)
         sd->node = get_mp_bus_to_node(busnum);
 
         printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busnum);
-        bus = pci_scan_bus_parented(NULL, busnum, &pci_root_ops, sd);
-        if (!bus)
+        x86_pci_root_bus_resources(busnum, &resources);
+        bus = pci_scan_root_bus(NULL, busnum, &pci_root_ops, sd, &resources);
+        if (!bus) {
+                pci_free_resource_list(&resources);
                 kfree(sd);
+        }
 
         return bus;
 }
@@ -639,6 +640,7 @@ int pci_ext_cfg_avail(struct pci_dev *dev)
 
 struct pci_bus * __devinit pci_scan_bus_on_node(int busno, struct pci_ops *ops, int node)
 {
+        LIST_HEAD(resources);
         struct pci_bus *bus = NULL;
         struct pci_sysdata *sd;
 
@@ -653,9 +655,12 @@ struct pci_bus * __devinit pci_scan_bus_on_node(int busno, struct pci_ops *ops,
                 return NULL;
         }
         sd->node = node;
-        bus = pci_scan_bus(busno, ops, sd);
-        if (!bus)
+        x86_pci_root_bus_resources(busno, &resources);
+        bus = pci_scan_root_bus(NULL, busno, ops, sd, &resources);
+        if (!bus) {
+                pci_free_resource_list(&resources);
                 kfree(sd);
+        }
 
         return bus;
 }
diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c
index 794b092d01ae..91821a1a0c3a 100644
--- a/arch/x86/pci/i386.c
+++ b/arch/x86/pci/i386.c
@@ -254,26 +254,6 @@ void __init pcibios_resource_survey(void)
  */
 fs_initcall(pcibios_assign_resources);
 
-/*
- *  If we set up a device for bus mastering, we need to check the latency
- *  timer as certain crappy BIOSes forget to set it properly.
- */
-unsigned int pcibios_max_latency = 255;
-
-void pcibios_set_master(struct pci_dev *dev)
-{
-        u8 lat;
-        pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
-        if (lat < 16)
-                lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
-        else if (lat > pcibios_max_latency)
-                lat = pcibios_max_latency;
-        else
-                return;
-        dev_printk(KERN_DEBUG, &dev->dev, "setting latency timer to %d\n", lat);
-        pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
-}
-
 static const struct vm_operations_struct pci_mmap_ops = {
         .access = generic_access_phys,
 };
diff --git a/arch/x86/pci/legacy.c b/arch/x86/pci/legacy.c
index 2c2aeabc2609..a1df191129d3 100644
--- a/arch/x86/pci/legacy.c
+++ b/arch/x86/pci/legacy.c
@@ -31,9 +31,6 @@ int __init pci_legacy_init(void)
 
         printk("PCI: Probing PCI hardware\n");
         pci_root_bus = pcibios_scan_root(0);
-        if (pci_root_bus)
-                pci_bus_add_devices(pci_root_bus);
-
         return 0;
 }
 
diff --git a/arch/x86/pci/numaq_32.c b/arch/x86/pci/numaq_32.c
index 51abf02f9226..83e125b95ca6 100644
--- a/arch/x86/pci/numaq_32.c
+++ b/arch/x86/pci/numaq_32.c
@@ -153,8 +153,6 @@ int __init pci_numaq_init(void)
         raw_pci_ops = &pci_direct_conf1_mq;
 
         pci_root_bus = pcibios_scan_root(0);
-        if (pci_root_bus)
-                pci_bus_add_devices(pci_root_bus);
         if (num_online_nodes() > 1)
                 for_each_online_node(quad) {
                         if (quad == 0)