x86: ce4100: allow second UART usage

The current CE4100 and 8250_pci code have both a limitation preventing the
registration and usage of CE4100's second UART. This patch changes the
platform code fixing up the UART port to work on a relative UART port
base address, as well as the 8250_pci code to make it register 2 UART ports
for CE4100 and pass the port index down to all consumers.

Signed-off-by: Florian Fainelli <ffainelli@freebox.fr>
Acked-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

1 files changed, 3 insertions, 0 deletions

diff --git a/arch/x86/platform/ce4100/ce4100.c b/arch/x86/platform/ce4100/ce4100.c
index 4c61b52191eb..0dcc30e9df8c 100644
--- a/arch/x86/platform/ce4100/ce4100.c
+++ b/arch/x86/platform/ce4100/ce4100.c
@@ -92,8 +92,11 @@ static void ce4100_serial_fixup(int port, struct uart_port *up,
                 up->membase =
                         (void __iomem *)__fix_to_virt(FIX_EARLYCON_MEM_BASE);
                 up->membase += up->mapbase & ~PAGE_MASK;
+                up->mapbase += port * 0x100;
+                up->membase += port * 0x100;
                 up->iotype   = UPIO_MEM32;
                 up->regshift = 2;
+                up->irq = 4;
         }
 #endif
         up->iobase = 0;