Merge branch 'x86/amd-nb' into x86/apic-cleanups

Reason: apic cleanup series depends on x86/apic, x86/amd-nb x86/platform

Conflicts:
	arch/x86/include/asm/io_apic.h

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

7 files changed, 530 insertions, 41 deletions

diff --git a/arch/x86/pci/Makefile b/arch/x86/pci/Makefile
index a0207a7fdf39..effd96e33f16 100644
--- a/arch/x86/pci/Makefile
+++ b/arch/x86/pci/Makefile
@@ -4,6 +4,7 @@ obj-$(CONFIG_PCI_BIOS)		+= pcbios.o
 obj-$(CONFIG_PCI_MMCONFIG)      += mmconfig_$(BITS).o direct.o mmconfig-shared.o
 obj-$(CONFIG_PCI_DIRECT)        += direct.o
 obj-$(CONFIG_PCI_OLPC)          += olpc.o
+obj-$(CONFIG_PCI_XEN)           += xen.o
 
 obj-y                           += fixup.o
 obj-$(CONFIG_ACPI)              += acpi.o
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c
index 15466c096ba5..0972315c3860 100644
--- a/arch/x86/pci/acpi.c
+++ b/arch/x86/pci/acpi.c
@@ -138,7 +138,6 @@ setup_resource(struct acpi_resource *acpi_res, void *data)
         struct acpi_resource_address64 addr;
         acpi_status status;
         unsigned long flags;
-        struct resource *root, *conflict;
         u64 start, end;
 
         status = resource_to_addr(acpi_res, &addr);
@@ -146,12 +145,10 @@ setup_resource(struct acpi_resource *acpi_res, void *data)
                 return AE_OK;
 
         if (addr.resource_type == ACPI_MEMORY_RANGE) {
-                root = &iomem_resource;
                 flags = IORESOURCE_MEM;
                 if (addr.info.mem.caching == ACPI_PREFETCHABLE_MEMORY)
                         flags |= IORESOURCE_PREFETCH;
         } else if (addr.resource_type == ACPI_IO_RANGE) {
-                root = &ioport_resource;
                 flags = IORESOURCE_IO;
         } else
                 return AE_OK;
@@ -172,25 +169,90 @@ setup_resource(struct acpi_resource *acpi_res, void *data)
                 return AE_OK;
         }
 
-        conflict = insert_resource_conflict(root, res);
-        if (conflict) {
-                dev_err(&info->bridge->dev,
-                        "address space collision: host bridge window %pR "
-                        "conflicts with %s %pR\n",
-                        res, conflict->name, conflict);
-        } else {
-                pci_bus_add_resource(info->bus, res, 0);
-                info->res_num++;
-                if (addr.translation_offset)
-                        dev_info(&info->bridge->dev, "host bridge window %pR "
-                                 "(PCI address [%#llx-%#llx])\n",
-                                 res, res->start - addr.translation_offset,
-                                 res->end - addr.translation_offset);
+        info->res_num++;
+        if (addr.translation_offset)
+                dev_info(&info->bridge->dev, "host bridge window %pR "
+                         "(PCI address [%#llx-%#llx])\n",
+                         res, res->start - addr.translation_offset,
+                         res->end - addr.translation_offset);
+        else
+                dev_info(&info->bridge->dev, "host bridge window %pR\n", res);
+
+        return AE_OK;
+}
+
+static bool resource_contains(struct resource *res, resource_size_t point)
+{
+        if (res->start <= point && point <= res->end)
+                return true;
+        return false;
+}
+
+static void coalesce_windows(struct pci_root_info *info, int type)
+{
+        int i, j;
+        struct resource *res1, *res2;
+
+        for (i = 0; i < info->res_num; i++) {
+                res1 = &info->res[i];
+                if (!(res1->flags & type))
+                        continue;
+
+                for (j = i + 1; j < info->res_num; j++) {
+                        res2 = &info->res[j];
+                        if (!(res2->flags & type))
+                                continue;
+
+                        /*
+                         * I don't like throwing away windows because then
+                         * our resources no longer match the ACPI _CRS, but
+                         * the kernel resource tree doesn't allow overlaps.
+                         */
+                        if (resource_contains(res1, res2->start) ||
+                            resource_contains(res1, res2->end) ||
+                            resource_contains(res2, res1->start) ||
+                            resource_contains(res2, res1->end)) {
+                                res1->start = min(res1->start, res2->start);
+                                res1->end = max(res1->end, res2->end);
+                                dev_info(&info->bridge->dev,
+                                         "host bridge window expanded to %pR; %pR ignored\n",
+                                         res1, res2);
+                                res2->flags = 0;
+                        }
+                }
+        }
+}
+
+static void add_resources(struct pci_root_info *info)
+{
+        int i;
+        struct resource *res, *root, *conflict;
+
+        if (!pci_use_crs)
+                return;
+
+        coalesce_windows(info, IORESOURCE_MEM);
+        coalesce_windows(info, IORESOURCE_IO);
+
+        for (i = 0; i < info->res_num; i++) {
+                res = &info->res[i];
+
+                if (res->flags & IORESOURCE_MEM)
+                        root = &iomem_resource;
+                else if (res->flags & IORESOURCE_IO)
+                        root = &ioport_resource;
                 else
-                        dev_info(&info->bridge->dev,
-                                 "host bridge window %pR\n", res);
+                        continue;
+
+                conflict = insert_resource_conflict(root, res);
+                if (conflict)
+                        dev_err(&info->bridge->dev,
+                                "address space collision: host bridge window %pR "
+                                "conflicts with %s %pR\n",
+                                res, conflict->name, conflict);
+                else
+                        pci_bus_add_resource(info->bus, res, 0);
         }
-        return AE_OK;
 }
 
 static void
@@ -224,6 +286,7 @@ get_current_resources(struct acpi_device *device, int busnum,
         acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource,
                                 &info);
 
+        add_resources(&info);
         return;
 
 name_alloc_fail:
diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c
index a0772af64efb..f7c8a399978c 100644
--- a/arch/x86/pci/common.c
+++ b/arch/x86/pci/common.c
@@ -421,16 +421,10 @@ struct pci_bus * __devinit pcibios_scan_root(int busnum)
 
         return bus;
 }
-
-int __init pcibios_init(void)
+void __init pcibios_set_cache_line_size(void)
 {
         struct cpuinfo_x86 *c = &boot_cpu_data;
 
-        if (!raw_pci_ops) {
-                printk(KERN_WARNING "PCI: System does not support PCI\n");
-                return 0;
-        }
-
         /*
          * Set PCI cacheline size to that of the CPU if the CPU has reported it.
          * (For older CPUs that don't support cpuid, we se it to 32 bytes
@@ -445,7 +439,16 @@ int __init pcibios_init(void)
                 pci_dfl_cache_line_size = 32 >> 2;
                 printk(KERN_DEBUG "PCI: Unknown cacheline size. Setting to 32 bytes\n");
         }
+}
+
+int __init pcibios_init(void)
+{
+        if (!raw_pci_ops) {
+                printk(KERN_WARNING "PCI: System does not support PCI\n");
+                return 0;
+        }
 
+        pcibios_set_cache_line_size();
         pcibios_resource_survey();
 
         if (pci_bf_sort >= pci_force_bf)
diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c
index 55253095be84..c4bb261c106e 100644
--- a/arch/x86/pci/i386.c
+++ b/arch/x86/pci/i386.c
@@ -65,16 +65,21 @@ pcibios_align_resource(void *data, const struct resource *res,
                         resource_size_t size, resource_size_t align)
 {
         struct pci_dev *dev = data;
-        resource_size_t start = res->start;
+        resource_size_t start = round_down(res->end - size + 1, align);
 
         if (res->flags & IORESOURCE_IO) {
-                if (skip_isa_ioresource_align(dev))
-                        return start;
-                if (start & 0x300)
-                        start = (start + 0x3ff) & ~0x3ff;
+
+                /*
+                 * If we're avoiding ISA aliases, the largest contiguous I/O
+                 * port space is 256 bytes.  Clearing bits 9 and 10 preserves
+                 * all 256-byte and smaller alignments, so the result will
+                 * still be correctly aligned.
+                 */
+                if (!skip_isa_ioresource_align(dev))
+                        start &= ~0x300;
         } else if (res->flags & IORESOURCE_MEM) {
                 if (start < BIOS_END)
-                        start = BIOS_END;
+                        start = res->end;       /* fail; no space */
         }
         return start;
 }
@@ -311,6 +316,8 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
                  */
                 prot |= _PAGE_CACHE_UC_MINUS;
 
+        prot |= _PAGE_IOMAP;    /* creating a mapping for IO */
+
         vma->vm_page_prot = __pgprot(prot);
 
         if (io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
diff --git a/arch/x86/pci/irq.c b/arch/x86/pci/irq.c
index f547ee05f715..9f9bfb705cf9 100644
--- a/arch/x86/pci/irq.c
+++ b/arch/x86/pci/irq.c
@@ -584,27 +584,28 @@ static __init int intel_router_probe(struct irq_router *r, struct pci_dev *route
         case PCI_DEVICE_ID_INTEL_ICH9_3:
         case PCI_DEVICE_ID_INTEL_ICH9_4:
         case PCI_DEVICE_ID_INTEL_ICH9_5:
-        case PCI_DEVICE_ID_INTEL_TOLAPAI_0:
+        case PCI_DEVICE_ID_INTEL_EP80579_0:
         case PCI_DEVICE_ID_INTEL_ICH10_0:
         case PCI_DEVICE_ID_INTEL_ICH10_1:
         case PCI_DEVICE_ID_INTEL_ICH10_2:
         case PCI_DEVICE_ID_INTEL_ICH10_3:
+        case PCI_DEVICE_ID_INTEL_PATSBURG_LPC:
                 r->name = "PIIX/ICH";
                 r->get = pirq_piix_get;
                 r->set = pirq_piix_set;
                 return 1;
         }
 
-        if ((device >= PCI_DEVICE_ID_INTEL_PCH_LPC_MIN) && 
-                (device <= PCI_DEVICE_ID_INTEL_PCH_LPC_MAX)) {
+        if ((device >= PCI_DEVICE_ID_INTEL_5_3400_SERIES_LPC_MIN) && 
+                (device <= PCI_DEVICE_ID_INTEL_5_3400_SERIES_LPC_MAX)) {
                 r->name = "PIIX/ICH";
                 r->get = pirq_piix_get;
                 r->set = pirq_piix_set;
                 return 1;
         }
 
-        if ((device >= PCI_DEVICE_ID_INTEL_CPT_LPC_MIN) && 
-                (device <= PCI_DEVICE_ID_INTEL_CPT_LPC_MAX)) {
+        if ((device >= PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN) && 
+                (device <= PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX)) {
                 r->name = "PIIX/ICH";
                 r->get = pirq_piix_get;
                 r->set = pirq_piix_set;
diff --git a/arch/x86/pci/mmconfig-shared.c b/arch/x86/pci/mmconfig-shared.c
index a918553ebc75..e282886616a0 100644
--- a/arch/x86/pci/mmconfig-shared.c
+++ b/arch/x86/pci/mmconfig-shared.c
@@ -65,7 +65,6 @@ static __init struct pci_mmcfg_region *pci_mmconfig_add(int segment, int start,
                                                         int end, u64 addr)
 {
         struct pci_mmcfg_region *new;
-        int num_buses;
         struct resource *res;
 
         if (addr == 0)
@@ -82,10 +81,9 @@ static __init struct pci_mmcfg_region *pci_mmconfig_add(int segment, int start,
 
         list_add_sorted(new);
 
-        num_buses = end - start + 1;
         res = &new->res;
         res->start = addr + PCI_MMCFG_BUS_OFFSET(start);
-        res->end = addr + PCI_MMCFG_BUS_OFFSET(num_buses) - 1;
+        res->end = addr + PCI_MMCFG_BUS_OFFSET(end + 1) - 1;
         res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
         snprintf(new->name, PCI_MMCFG_RESOURCE_NAME_LEN,
                  "PCI MMCONFIG %04x [bus %02x-%02x]", segment, start, end);
diff --git a/arch/x86/pci/xen.c b/arch/x86/pci/xen.c
new file mode 100644
index 000000000000..d7b5109f7a9c
--- /dev/null
+++ b/arch/x86/pci/xen.c
@@ -0,0 +1,416 @@
+/*
+ * Xen PCI Frontend Stub - puts some "dummy" functions in to the Linux
+ *                         x86 PCI core to support the Xen PCI Frontend
+ *
+ *   Author: Ryan Wilson <hap9@epoch.ncsc.mil>
+ */
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <linux/acpi.h>
+
+#include <linux/io.h>
+#include <asm/io_apic.h>
+#include <asm/pci_x86.h>
+
+#include <asm/xen/hypervisor.h>
+
+#include <xen/features.h>
+#include <xen/events.h>
+#include <asm/xen/pci.h>
+
+#ifdef CONFIG_ACPI
+static int xen_hvm_register_pirq(u32 gsi, int triggering)
+{
+        int rc, irq;
+        struct physdev_map_pirq map_irq;
+        int shareable = 0;
+        char *name;
+
+        if (!xen_hvm_domain())
+                return -1;
+
+        map_irq.domid = DOMID_SELF;
+        map_irq.type = MAP_PIRQ_TYPE_GSI;
+        map_irq.index = gsi;
+        map_irq.pirq = -1;
+
+        rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
+        if (rc) {
+                printk(KERN_WARNING "xen map irq failed %d\n", rc);
+                return -1;
+        }
+
+        if (triggering == ACPI_EDGE_SENSITIVE) {
+                shareable = 0;
+                name = "ioapic-edge";
+        } else {
+                shareable = 1;
+                name = "ioapic-level";
+        }
+
+        irq = xen_map_pirq_gsi(map_irq.pirq, gsi, shareable, name);
+
+        printk(KERN_DEBUG "xen: --> irq=%d, pirq=%d\n", irq, map_irq.pirq);
+
+        return irq;
+}
+
+static int acpi_register_gsi_xen_hvm(struct device *dev, u32 gsi,
+                                 int trigger, int polarity)
+{
+        return xen_hvm_register_pirq(gsi, trigger);
+}
+#endif
+
+#if defined(CONFIG_PCI_MSI)
+#include <linux/msi.h>
+#include <asm/msidef.h>
+
+struct xen_pci_frontend_ops *xen_pci_frontend;
+EXPORT_SYMBOL_GPL(xen_pci_frontend);
+
+static void xen_msi_compose_msg(struct pci_dev *pdev, unsigned int pirq,
+                struct msi_msg *msg)
+{
+        /* We set vector == 0 to tell the hypervisor we don't care about it,
+         * but we want a pirq setup instead.
+         * We use the dest_id field to pass the pirq that we want. */
+        msg->address_hi = MSI_ADDR_BASE_HI | MSI_ADDR_EXT_DEST_ID(pirq);
+        msg->address_lo =
+                MSI_ADDR_BASE_LO |
+                MSI_ADDR_DEST_MODE_PHYSICAL |
+                MSI_ADDR_REDIRECTION_CPU |
+                MSI_ADDR_DEST_ID(pirq);
+
+        msg->data =
+                MSI_DATA_TRIGGER_EDGE |
+                MSI_DATA_LEVEL_ASSERT |
+                /* delivery mode reserved */
+                (3 << 8) |
+                MSI_DATA_VECTOR(0);
+}
+
+static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
+{
+        int irq, pirq, ret = 0;
+        struct msi_desc *msidesc;
+        struct msi_msg msg;
+
+        list_for_each_entry(msidesc, &dev->msi_list, list) {
+                xen_allocate_pirq_msi((type == PCI_CAP_ID_MSIX) ?
+                                "msi-x" : "msi", &irq, &pirq);
+                if (irq < 0 || pirq < 0)
+                        goto error;
+                printk(KERN_DEBUG "xen: msi --> irq=%d, pirq=%d\n", irq, pirq);
+                xen_msi_compose_msg(dev, pirq, &msg);
+                ret = set_irq_msi(irq, msidesc);
+                if (ret < 0)
+                        goto error_while;
+                write_msi_msg(irq, &msg);
+        }
+        return 0;
+
+error_while:
+        unbind_from_irqhandler(irq, NULL);
+error:
+        if (ret == -ENODEV)
+                dev_err(&dev->dev, "Xen PCI frontend has not registered" \
+                                " MSI/MSI-X support!\n");
+
+        return ret;
+}
+
+/*
+ * For MSI interrupts we have to use drivers/xen/event.s functions to
+ * allocate an irq_desc and setup the right */
+
+
+static int xen_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
+{
+        int irq, ret, i;
+        struct msi_desc *msidesc;
+        int *v;
+
+        v = kzalloc(sizeof(int) * max(1, nvec), GFP_KERNEL);
+        if (!v)
+                return -ENOMEM;
+
+        if (type == PCI_CAP_ID_MSIX)
+                ret = xen_pci_frontend_enable_msix(dev, &v, nvec);
+        else
+                ret = xen_pci_frontend_enable_msi(dev, &v);
+        if (ret)
+                goto error;
+        i = 0;
+        list_for_each_entry(msidesc, &dev->msi_list, list) {
+                irq = xen_allocate_pirq(v[i], 0, /* not sharable */
+                        (type == PCI_CAP_ID_MSIX) ?
+                        "pcifront-msi-x" : "pcifront-msi");
+                if (irq < 0) {
+                        ret = -1;
+                        goto free;
+                }
+
+                ret = set_irq_msi(irq, msidesc);
+                if (ret)
+                        goto error_while;
+                i++;
+        }
+        kfree(v);
+        return 0;
+
+error_while:
+        unbind_from_irqhandler(irq, NULL);
+error:
+        if (ret == -ENODEV)
+                dev_err(&dev->dev, "Xen PCI frontend has not registered" \
+                        " MSI/MSI-X support!\n");
+free:
+        kfree(v);
+        return ret;
+}
+
+static void xen_teardown_msi_irqs(struct pci_dev *dev)
+{
+        struct msi_desc *msidesc;
+
+        msidesc = list_entry(dev->msi_list.next, struct msi_desc, list);
+        if (msidesc->msi_attrib.is_msix)
+                xen_pci_frontend_disable_msix(dev);
+        else
+                xen_pci_frontend_disable_msi(dev);
+}
+
+static void xen_teardown_msi_irq(unsigned int irq)
+{
+        xen_destroy_irq(irq);
+}
+
+static int xen_initdom_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
+{
+        int irq, ret;
+        struct msi_desc *msidesc;
+
+        list_for_each_entry(msidesc, &dev->msi_list, list) {
+                irq = xen_create_msi_irq(dev, msidesc, type);
+                if (irq < 0)
+                        return -1;
+
+                ret = set_irq_msi(irq, msidesc);
+                if (ret)
+                        goto error;
+        }
+        return 0;
+
+error:
+        xen_destroy_irq(irq);
+        return ret;
+}
+#endif
+
+static int xen_pcifront_enable_irq(struct pci_dev *dev)
+{
+        int rc;
+        int share = 1;
+
+        dev_info(&dev->dev, "Xen PCI enabling IRQ: %d\n", dev->irq);
+
+        if (dev->irq < 0)
+                return -EINVAL;
+
+        if (dev->irq < NR_IRQS_LEGACY)
+                share = 0;
+
+        rc = xen_allocate_pirq(dev->irq, share, "pcifront");
+        if (rc < 0) {
+                dev_warn(&dev->dev, "Xen PCI IRQ: %d, failed to register:%d\n",
+                         dev->irq, rc);
+                return rc;
+        }
+        return 0;
+}
+
+int __init pci_xen_init(void)
+{
+        if (!xen_pv_domain() || xen_initial_domain())
+                return -ENODEV;
+
+        printk(KERN_INFO "PCI: setting up Xen PCI frontend stub\n");
+
+        pcibios_set_cache_line_size();
+
+        pcibios_enable_irq = xen_pcifront_enable_irq;
+        pcibios_disable_irq = NULL;
+
+#ifdef CONFIG_ACPI
+        /* Keep ACPI out of the picture */
+        acpi_noirq = 1;
+#endif
+
+#ifdef CONFIG_PCI_MSI
+        x86_msi.setup_msi_irqs = xen_setup_msi_irqs;
+        x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
+        x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs;
+#endif
+        return 0;
+}
+
+int __init pci_xen_hvm_init(void)
+{
+        if (!xen_feature(XENFEAT_hvm_pirqs))
+                return 0;
+
+#ifdef CONFIG_ACPI
+        /*
+         * We don't want to change the actual ACPI delivery model,
+         * just how GSIs get registered.
+         */
+        __acpi_register_gsi = acpi_register_gsi_xen_hvm;
+#endif
+
+#ifdef CONFIG_PCI_MSI
+        x86_msi.setup_msi_irqs = xen_hvm_setup_msi_irqs;
+        x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
+#endif
+        return 0;
+}
+
+#ifdef CONFIG_XEN_DOM0
+static int xen_register_pirq(u32 gsi, int triggering)
+{
+        int rc, irq;
+        struct physdev_map_pirq map_irq;
+        int shareable = 0;
+        char *name;
+
+        if (!xen_pv_domain())
+                return -1;
+
+        if (triggering == ACPI_EDGE_SENSITIVE) {
+                shareable = 0;
+                name = "ioapic-edge";
+        } else {
+                shareable = 1;
+                name = "ioapic-level";
+        }
+
+        irq = xen_allocate_pirq(gsi, shareable, name);
+
+        printk(KERN_DEBUG "xen: --> irq=%d\n", irq);
+
+        if (irq < 0)
+                goto out;
+
+        map_irq.domid = DOMID_SELF;
+        map_irq.type = MAP_PIRQ_TYPE_GSI;
+        map_irq.index = gsi;
+        map_irq.pirq = irq;
+
+        rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
+        if (rc) {
+                printk(KERN_WARNING "xen map irq failed %d\n", rc);
+                return -1;
+        }
+
+out:
+        return irq;
+}
+
+static int xen_register_gsi(u32 gsi, int triggering, int polarity)
+{
+        int rc, irq;
+        struct physdev_setup_gsi setup_gsi;
+
+        if (!xen_pv_domain())
+                return -1;
+
+        printk(KERN_DEBUG "xen: registering gsi %u triggering %d polarity %d\n",
+                        gsi, triggering, polarity);
+
+        irq = xen_register_pirq(gsi, triggering);
+
+        setup_gsi.gsi = gsi;
+        setup_gsi.triggering = (triggering == ACPI_EDGE_SENSITIVE ? 0 : 1);
+        setup_gsi.polarity = (polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
+
+        rc = HYPERVISOR_physdev_op(PHYSDEVOP_setup_gsi, &setup_gsi);
+        if (rc == -EEXIST)
+                printk(KERN_INFO "Already setup the GSI :%d\n", gsi);
+        else if (rc) {
+                printk(KERN_ERR "Failed to setup GSI :%d, err_code:%d\n",
+                                gsi, rc);
+        }
+
+        return irq;
+}
+
+static __init void xen_setup_acpi_sci(void)
+{
+        int rc;
+        int trigger, polarity;
+        int gsi = acpi_sci_override_gsi;
+
+        if (!gsi)
+                return;
+
+        rc = acpi_get_override_irq(gsi, &trigger, &polarity);
+        if (rc) {
+                printk(KERN_WARNING "xen: acpi_get_override_irq failed for acpi"
+                                " sci, rc=%d\n", rc);
+                return;
+        }
+        trigger = trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE;
+        polarity = polarity ? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;
+        
+        printk(KERN_INFO "xen: sci override: global_irq=%d trigger=%d "
+                        "polarity=%d\n", gsi, trigger, polarity);
+
+        gsi = xen_register_gsi(gsi, trigger, polarity);
+        printk(KERN_INFO "xen: acpi sci %d\n", gsi);
+
+        return;
+}
+
+static int acpi_register_gsi_xen(struct device *dev, u32 gsi,
+                                 int trigger, int polarity)
+{
+        return xen_register_gsi(gsi, trigger, polarity);
+}
+
+static int __init pci_xen_initial_domain(void)
+{
+#ifdef CONFIG_PCI_MSI
+        x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs;
+        x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
+#endif
+        xen_setup_acpi_sci();
+        __acpi_register_gsi = acpi_register_gsi_xen;
+
+        return 0;
+}
+
+void __init xen_setup_pirqs(void)
+{
+        int irq;
+
+        pci_xen_initial_domain();
+
+        if (0 == nr_ioapics) {
+                for (irq = 0; irq < NR_IRQS_LEGACY; irq++)
+                        xen_allocate_pirq(irq, 0, "xt-pic");
+                return;
+        }
+
+        /* Pre-allocate legacy irqs */
+        for (irq = 0; irq < NR_IRQS_LEGACY; irq++) {
+                int trigger, polarity;
+
+                if (acpi_get_override_irq(irq, &trigger, &polarity) == -1)
+                        continue;
+
+                xen_register_pirq(irq,
+                        trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE);
+        }
+}
+#endif