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author | Glenn Elliott <gelliott@cs.unc.edu> | 2012-03-04 19:47:13 -0500 |
---|---|---|
committer | Glenn Elliott <gelliott@cs.unc.edu> | 2012-03-04 19:47:13 -0500 |
commit | c71c03bda1e86c9d5198c5d83f712e695c4f2a1e (patch) | |
tree | ecb166cb3e2b7e2adb3b5e292245fefd23381ac8 /arch/x86/pci/amd_bus.c | |
parent | ea53c912f8a86a8567697115b6a0d8152beee5c8 (diff) | |
parent | 6a00f206debf8a5c8899055726ad127dbeeed098 (diff) |
Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp
Conflicts:
litmus/sched_cedf.c
Diffstat (limited to 'arch/x86/pci/amd_bus.c')
-rw-r--r-- | arch/x86/pci/amd_bus.c | 35 |
1 files changed, 34 insertions, 1 deletions
diff --git a/arch/x86/pci/amd_bus.c b/arch/x86/pci/amd_bus.c index fc1e8fe07e5c..026e4931d162 100644 --- a/arch/x86/pci/amd_bus.c +++ b/arch/x86/pci/amd_bus.c | |||
@@ -4,6 +4,7 @@ | |||
4 | #include <linux/cpu.h> | 4 | #include <linux/cpu.h> |
5 | #include <linux/range.h> | 5 | #include <linux/range.h> |
6 | 6 | ||
7 | #include <asm/amd_nb.h> | ||
7 | #include <asm/pci_x86.h> | 8 | #include <asm/pci_x86.h> |
8 | 9 | ||
9 | #include <asm/pci-direct.h> | 10 | #include <asm/pci-direct.h> |
@@ -349,7 +350,7 @@ static int __init early_fill_mp_bus_info(void) | |||
349 | 350 | ||
350 | #define ENABLE_CF8_EXT_CFG (1ULL << 46) | 351 | #define ENABLE_CF8_EXT_CFG (1ULL << 46) |
351 | 352 | ||
352 | static void enable_pci_io_ecs(void *unused) | 353 | static void __cpuinit enable_pci_io_ecs(void *unused) |
353 | { | 354 | { |
354 | u64 reg; | 355 | u64 reg; |
355 | rdmsrl(MSR_AMD64_NB_CFG, reg); | 356 | rdmsrl(MSR_AMD64_NB_CFG, reg); |
@@ -378,6 +379,34 @@ static struct notifier_block __cpuinitdata amd_cpu_notifier = { | |||
378 | .notifier_call = amd_cpu_notify, | 379 | .notifier_call = amd_cpu_notify, |
379 | }; | 380 | }; |
380 | 381 | ||
382 | static void __init pci_enable_pci_io_ecs(void) | ||
383 | { | ||
384 | #ifdef CONFIG_AMD_NB | ||
385 | unsigned int i, n; | ||
386 | |||
387 | for (n = i = 0; !n && amd_nb_bus_dev_ranges[i].dev_limit; ++i) { | ||
388 | u8 bus = amd_nb_bus_dev_ranges[i].bus; | ||
389 | u8 slot = amd_nb_bus_dev_ranges[i].dev_base; | ||
390 | u8 limit = amd_nb_bus_dev_ranges[i].dev_limit; | ||
391 | |||
392 | for (; slot < limit; ++slot) { | ||
393 | u32 val = read_pci_config(bus, slot, 3, 0); | ||
394 | |||
395 | if (!early_is_amd_nb(val)) | ||
396 | continue; | ||
397 | |||
398 | val = read_pci_config(bus, slot, 3, 0x8c); | ||
399 | if (!(val & (ENABLE_CF8_EXT_CFG >> 32))) { | ||
400 | val |= ENABLE_CF8_EXT_CFG >> 32; | ||
401 | write_pci_config(bus, slot, 3, 0x8c, val); | ||
402 | } | ||
403 | ++n; | ||
404 | } | ||
405 | } | ||
406 | pr_info("Extended Config Space enabled on %u nodes\n", n); | ||
407 | #endif | ||
408 | } | ||
409 | |||
381 | static int __init pci_io_ecs_init(void) | 410 | static int __init pci_io_ecs_init(void) |
382 | { | 411 | { |
383 | int cpu; | 412 | int cpu; |
@@ -386,6 +415,10 @@ static int __init pci_io_ecs_init(void) | |||
386 | if (boot_cpu_data.x86 < 0x10) | 415 | if (boot_cpu_data.x86 < 0x10) |
387 | return 0; | 416 | return 0; |
388 | 417 | ||
418 | /* Try the PCI method first. */ | ||
419 | if (early_pci_allowed()) | ||
420 | pci_enable_pci_io_ecs(); | ||
421 | |||
389 | register_cpu_notifier(&amd_cpu_notifier); | 422 | register_cpu_notifier(&amd_cpu_notifier); |
390 | for_each_online_cpu(cpu) | 423 | for_each_online_cpu(cpu) |
391 | amd_cpu_notify(&amd_cpu_notifier, (unsigned long)CPU_ONLINE, | 424 | amd_cpu_notify(&amd_cpu_notifier, (unsigned long)CPU_ONLINE, |