diff options
author | Robert Richter <robert.richter@amd.com> | 2009-06-03 20:36:44 -0400 |
---|---|---|
committer | Robert Richter <robert.richter@amd.com> | 2009-06-11 13:42:16 -0400 |
commit | 217d3cfb959756cb493fc03106c0253baa420ce8 (patch) | |
tree | 05b5531feba327812b7c791c1077a7225c526fbd /arch/x86/oprofile | |
parent | dea3766ca052a4f572b16a23a322553c064d75af (diff) |
x86/oprofile: replace CTR*_IS_RESERVED macros
The patch replaces all CTR*_IS_RESERVED macros.
Signed-off-by: Robert Richter <robert.richter@amd.com>
Diffstat (limited to 'arch/x86/oprofile')
-rw-r--r-- | arch/x86/oprofile/op_model_amd.c | 10 | ||||
-rw-r--r-- | arch/x86/oprofile/op_model_p4.c | 10 | ||||
-rw-r--r-- | arch/x86/oprofile/op_model_ppro.c | 10 | ||||
-rw-r--r-- | arch/x86/oprofile/op_x86_model.h | 3 |
4 files changed, 15 insertions, 18 deletions
diff --git a/arch/x86/oprofile/op_model_amd.c b/arch/x86/oprofile/op_model_amd.c index 4ac9d283e8d2..c5c5eec2fa74 100644 --- a/arch/x86/oprofile/op_model_amd.c +++ b/arch/x86/oprofile/op_model_amd.c | |||
@@ -90,7 +90,7 @@ static void op_amd_setup_ctrs(struct op_x86_model_spec const *model, | |||
90 | 90 | ||
91 | /* clear all counters */ | 91 | /* clear all counters */ |
92 | for (i = 0 ; i < NUM_CONTROLS; ++i) { | 92 | for (i = 0 ; i < NUM_CONTROLS; ++i) { |
93 | if (unlikely(!CTRL_IS_RESERVED(msrs, i))) | 93 | if (unlikely(!msrs->controls[i].addr)) |
94 | continue; | 94 | continue; |
95 | rdmsrl(msrs->controls[i].addr, val); | 95 | rdmsrl(msrs->controls[i].addr, val); |
96 | val &= model->reserved; | 96 | val &= model->reserved; |
@@ -99,14 +99,14 @@ static void op_amd_setup_ctrs(struct op_x86_model_spec const *model, | |||
99 | 99 | ||
100 | /* avoid a false detection of ctr overflows in NMI handler */ | 100 | /* avoid a false detection of ctr overflows in NMI handler */ |
101 | for (i = 0; i < NUM_COUNTERS; ++i) { | 101 | for (i = 0; i < NUM_COUNTERS; ++i) { |
102 | if (unlikely(!CTR_IS_RESERVED(msrs, i))) | 102 | if (unlikely(!msrs->counters[i].addr)) |
103 | continue; | 103 | continue; |
104 | wrmsr(msrs->counters[i].addr, -1, -1); | 104 | wrmsr(msrs->counters[i].addr, -1, -1); |
105 | } | 105 | } |
106 | 106 | ||
107 | /* enable active counters */ | 107 | /* enable active counters */ |
108 | for (i = 0; i < NUM_COUNTERS; ++i) { | 108 | for (i = 0; i < NUM_COUNTERS; ++i) { |
109 | if ((counter_config[i].enabled) && (CTR_IS_RESERVED(msrs, i))) { | 109 | if (counter_config[i].enabled && msrs->counters[i].addr) { |
110 | reset_value[i] = counter_config[i].count; | 110 | reset_value[i] = counter_config[i].count; |
111 | wrmsr(msrs->counters[i].addr, -(unsigned int)counter_config[i].count, -1); | 111 | wrmsr(msrs->counters[i].addr, -(unsigned int)counter_config[i].count, -1); |
112 | rdmsrl(msrs->controls[i].addr, val); | 112 | rdmsrl(msrs->controls[i].addr, val); |
@@ -300,11 +300,11 @@ static void op_amd_shutdown(struct op_msrs const * const msrs) | |||
300 | int i; | 300 | int i; |
301 | 301 | ||
302 | for (i = 0 ; i < NUM_COUNTERS ; ++i) { | 302 | for (i = 0 ; i < NUM_COUNTERS ; ++i) { |
303 | if (CTR_IS_RESERVED(msrs, i)) | 303 | if (msrs->counters[i].addr) |
304 | release_perfctr_nmi(MSR_K7_PERFCTR0 + i); | 304 | release_perfctr_nmi(MSR_K7_PERFCTR0 + i); |
305 | } | 305 | } |
306 | for (i = 0 ; i < NUM_CONTROLS ; ++i) { | 306 | for (i = 0 ; i < NUM_CONTROLS ; ++i) { |
307 | if (CTRL_IS_RESERVED(msrs, i)) | 307 | if (msrs->controls[i].addr) |
308 | release_evntsel_nmi(MSR_K7_EVNTSEL0 + i); | 308 | release_evntsel_nmi(MSR_K7_EVNTSEL0 + i); |
309 | } | 309 | } |
310 | } | 310 | } |
diff --git a/arch/x86/oprofile/op_model_p4.c b/arch/x86/oprofile/op_model_p4.c index ac4ca28b9ed5..9db0ca9af764 100644 --- a/arch/x86/oprofile/op_model_p4.c +++ b/arch/x86/oprofile/op_model_p4.c | |||
@@ -559,7 +559,7 @@ static void p4_setup_ctrs(struct op_x86_model_spec const *model, | |||
559 | 559 | ||
560 | /* clear the cccrs we will use */ | 560 | /* clear the cccrs we will use */ |
561 | for (i = 0 ; i < num_counters ; i++) { | 561 | for (i = 0 ; i < num_counters ; i++) { |
562 | if (unlikely(!CTRL_IS_RESERVED(msrs, i))) | 562 | if (unlikely(!msrs->controls[i].addr)) |
563 | continue; | 563 | continue; |
564 | rdmsr(p4_counters[VIRT_CTR(stag, i)].cccr_address, low, high); | 564 | rdmsr(p4_counters[VIRT_CTR(stag, i)].cccr_address, low, high); |
565 | CCCR_CLEAR(low); | 565 | CCCR_CLEAR(low); |
@@ -569,14 +569,14 @@ static void p4_setup_ctrs(struct op_x86_model_spec const *model, | |||
569 | 569 | ||
570 | /* clear all escrs (including those outside our concern) */ | 570 | /* clear all escrs (including those outside our concern) */ |
571 | for (i = num_counters; i < num_controls; i++) { | 571 | for (i = num_counters; i < num_controls; i++) { |
572 | if (unlikely(!CTRL_IS_RESERVED(msrs, i))) | 572 | if (unlikely(!msrs->controls[i].addr)) |
573 | continue; | 573 | continue; |
574 | wrmsr(msrs->controls[i].addr, 0, 0); | 574 | wrmsr(msrs->controls[i].addr, 0, 0); |
575 | } | 575 | } |
576 | 576 | ||
577 | /* setup all counters */ | 577 | /* setup all counters */ |
578 | for (i = 0 ; i < num_counters ; ++i) { | 578 | for (i = 0 ; i < num_counters ; ++i) { |
579 | if ((counter_config[i].enabled) && (CTRL_IS_RESERVED(msrs, i))) { | 579 | if (counter_config[i].enabled && msrs->controls[i].addr) { |
580 | reset_value[i] = counter_config[i].count; | 580 | reset_value[i] = counter_config[i].count; |
581 | pmc_setup_one_p4_counter(i); | 581 | pmc_setup_one_p4_counter(i); |
582 | wrmsr(p4_counters[VIRT_CTR(stag, i)].counter_address, | 582 | wrmsr(p4_counters[VIRT_CTR(stag, i)].counter_address, |
@@ -679,7 +679,7 @@ static void p4_shutdown(struct op_msrs const * const msrs) | |||
679 | int i; | 679 | int i; |
680 | 680 | ||
681 | for (i = 0 ; i < num_counters ; ++i) { | 681 | for (i = 0 ; i < num_counters ; ++i) { |
682 | if (CTR_IS_RESERVED(msrs, i)) | 682 | if (msrs->counters[i].addr) |
683 | release_perfctr_nmi(msrs->counters[i].addr); | 683 | release_perfctr_nmi(msrs->counters[i].addr); |
684 | } | 684 | } |
685 | /* | 685 | /* |
@@ -688,7 +688,7 @@ static void p4_shutdown(struct op_msrs const * const msrs) | |||
688 | * This saves a few bits. | 688 | * This saves a few bits. |
689 | */ | 689 | */ |
690 | for (i = num_counters ; i < num_controls ; ++i) { | 690 | for (i = num_counters ; i < num_controls ; ++i) { |
691 | if (CTRL_IS_RESERVED(msrs, i)) | 691 | if (msrs->controls[i].addr) |
692 | release_evntsel_nmi(msrs->controls[i].addr); | 692 | release_evntsel_nmi(msrs->controls[i].addr); |
693 | } | 693 | } |
694 | } | 694 | } |
diff --git a/arch/x86/oprofile/op_model_ppro.c b/arch/x86/oprofile/op_model_ppro.c index 566b43f0b6c6..0a261a5c696e 100644 --- a/arch/x86/oprofile/op_model_ppro.c +++ b/arch/x86/oprofile/op_model_ppro.c | |||
@@ -82,7 +82,7 @@ static void ppro_setup_ctrs(struct op_x86_model_spec const *model, | |||
82 | 82 | ||
83 | /* clear all counters */ | 83 | /* clear all counters */ |
84 | for (i = 0 ; i < num_counters; ++i) { | 84 | for (i = 0 ; i < num_counters; ++i) { |
85 | if (unlikely(!CTRL_IS_RESERVED(msrs, i))) | 85 | if (unlikely(!msrs->controls[i].addr)) |
86 | continue; | 86 | continue; |
87 | rdmsrl(msrs->controls[i].addr, val); | 87 | rdmsrl(msrs->controls[i].addr, val); |
88 | val &= model->reserved; | 88 | val &= model->reserved; |
@@ -91,14 +91,14 @@ static void ppro_setup_ctrs(struct op_x86_model_spec const *model, | |||
91 | 91 | ||
92 | /* avoid a false detection of ctr overflows in NMI handler */ | 92 | /* avoid a false detection of ctr overflows in NMI handler */ |
93 | for (i = 0; i < num_counters; ++i) { | 93 | for (i = 0; i < num_counters; ++i) { |
94 | if (unlikely(!CTR_IS_RESERVED(msrs, i))) | 94 | if (unlikely(!msrs->counters[i].addr)) |
95 | continue; | 95 | continue; |
96 | wrmsrl(msrs->counters[i].addr, -1LL); | 96 | wrmsrl(msrs->counters[i].addr, -1LL); |
97 | } | 97 | } |
98 | 98 | ||
99 | /* enable active counters */ | 99 | /* enable active counters */ |
100 | for (i = 0; i < num_counters; ++i) { | 100 | for (i = 0; i < num_counters; ++i) { |
101 | if ((counter_config[i].enabled) && (CTR_IS_RESERVED(msrs, i))) { | 101 | if (counter_config[i].enabled && msrs->counters[i].addr) { |
102 | reset_value[i] = counter_config[i].count; | 102 | reset_value[i] = counter_config[i].count; |
103 | wrmsrl(msrs->counters[i].addr, -reset_value[i]); | 103 | wrmsrl(msrs->counters[i].addr, -reset_value[i]); |
104 | rdmsrl(msrs->controls[i].addr, val); | 104 | rdmsrl(msrs->controls[i].addr, val); |
@@ -181,11 +181,11 @@ static void ppro_shutdown(struct op_msrs const * const msrs) | |||
181 | int i; | 181 | int i; |
182 | 182 | ||
183 | for (i = 0 ; i < num_counters ; ++i) { | 183 | for (i = 0 ; i < num_counters ; ++i) { |
184 | if (CTR_IS_RESERVED(msrs, i)) | 184 | if (msrs->counters[i].addr) |
185 | release_perfctr_nmi(MSR_P6_PERFCTR0 + i); | 185 | release_perfctr_nmi(MSR_P6_PERFCTR0 + i); |
186 | } | 186 | } |
187 | for (i = 0 ; i < num_counters ; ++i) { | 187 | for (i = 0 ; i < num_counters ; ++i) { |
188 | if (CTRL_IS_RESERVED(msrs, i)) | 188 | if (msrs->controls[i].addr) |
189 | release_evntsel_nmi(MSR_P6_EVNTSEL0 + i); | 189 | release_evntsel_nmi(MSR_P6_EVNTSEL0 + i); |
190 | } | 190 | } |
191 | if (reset_value) { | 191 | if (reset_value) { |
diff --git a/arch/x86/oprofile/op_x86_model.h b/arch/x86/oprofile/op_x86_model.h index 1c4577795a92..69f1eb46e1b3 100644 --- a/arch/x86/oprofile/op_x86_model.h +++ b/arch/x86/oprofile/op_x86_model.h | |||
@@ -15,9 +15,6 @@ | |||
15 | #include <asm/types.h> | 15 | #include <asm/types.h> |
16 | #include <asm/intel_arch_perfmon.h> | 16 | #include <asm/intel_arch_perfmon.h> |
17 | 17 | ||
18 | #define CTR_IS_RESERVED(msrs, c) ((msrs)->counters[(c)].addr ? 1 : 0) | ||
19 | #define CTRL_IS_RESERVED(msrs, c) ((msrs)->controls[(c)].addr ? 1 : 0) | ||
20 | |||
21 | struct op_saved_msr { | 18 | struct op_saved_msr { |
22 | unsigned int high; | 19 | unsigned int high; |
23 | unsigned int low; | 20 | unsigned int low; |