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authorTejun Heo <tj@kernel.org>2011-05-02 11:24:48 -0400
committerTejun Heo <tj@kernel.org>2011-05-02 11:24:48 -0400
commitc6f58878204b0414e00b43f9bcebf754284f95b4 (patch)
treeb3ad832e4a8c2ba1c387e2c5b0b21daca3932506 /arch/x86/mm/amdtopology.c
parent752d4f372f90a2f6eb562aaffb639957890cbcab (diff)
x86, NUMA: Rename amdtopology_64.c to amdtopology.c
amdtopology is going to be used by 32bit too drop _64 suffix. This is pure rename. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Yinghai Lu <yinghai@kernel.org> Cc: David Rientjes <rientjes@google.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: "H. Peter Anvin" <hpa@zytor.com>
Diffstat (limited to 'arch/x86/mm/amdtopology.c')
-rw-r--r--arch/x86/mm/amdtopology.c196
1 files changed, 196 insertions, 0 deletions
diff --git a/arch/x86/mm/amdtopology.c b/arch/x86/mm/amdtopology.c
new file mode 100644
index 000000000000..0919c26820d4
--- /dev/null
+++ b/arch/x86/mm/amdtopology.c
@@ -0,0 +1,196 @@
1/*
2 * AMD NUMA support.
3 * Discover the memory map and associated nodes.
4 *
5 * This version reads it directly from the AMD northbridge.
6 *
7 * Copyright 2002,2003 Andi Kleen, SuSE Labs.
8 */
9#include <linux/kernel.h>
10#include <linux/init.h>
11#include <linux/string.h>
12#include <linux/module.h>
13#include <linux/nodemask.h>
14#include <linux/memblock.h>
15
16#include <asm/io.h>
17#include <linux/pci_ids.h>
18#include <linux/acpi.h>
19#include <asm/types.h>
20#include <asm/mmzone.h>
21#include <asm/proto.h>
22#include <asm/e820.h>
23#include <asm/pci-direct.h>
24#include <asm/numa.h>
25#include <asm/mpspec.h>
26#include <asm/apic.h>
27#include <asm/amd_nb.h>
28
29static unsigned char __initdata nodeids[8];
30
31static __init int find_northbridge(void)
32{
33 int num;
34
35 for (num = 0; num < 32; num++) {
36 u32 header;
37
38 header = read_pci_config(0, num, 0, 0x00);
39 if (header != (PCI_VENDOR_ID_AMD | (0x1100<<16)) &&
40 header != (PCI_VENDOR_ID_AMD | (0x1200<<16)) &&
41 header != (PCI_VENDOR_ID_AMD | (0x1300<<16)))
42 continue;
43
44 header = read_pci_config(0, num, 1, 0x00);
45 if (header != (PCI_VENDOR_ID_AMD | (0x1101<<16)) &&
46 header != (PCI_VENDOR_ID_AMD | (0x1201<<16)) &&
47 header != (PCI_VENDOR_ID_AMD | (0x1301<<16)))
48 continue;
49 return num;
50 }
51
52 return -ENOENT;
53}
54
55static __init void early_get_boot_cpu_id(void)
56{
57 /*
58 * need to get the APIC ID of the BSP so can use that to
59 * create apicid_to_node in amd_scan_nodes()
60 */
61#ifdef CONFIG_X86_MPPARSE
62 /*
63 * get boot-time SMP configuration:
64 */
65 if (smp_found_config)
66 early_get_smp_config();
67#endif
68}
69
70int __init amd_numa_init(void)
71{
72 unsigned long start = PFN_PHYS(0);
73 unsigned long end = PFN_PHYS(max_pfn);
74 unsigned numnodes;
75 unsigned long prevbase;
76 int i, j, nb;
77 u32 nodeid, reg;
78 unsigned int bits, cores, apicid_base;
79
80 if (!early_pci_allowed())
81 return -EINVAL;
82
83 nb = find_northbridge();
84 if (nb < 0)
85 return nb;
86
87 pr_info("Scanning NUMA topology in Northbridge %d\n", nb);
88
89 reg = read_pci_config(0, nb, 0, 0x60);
90 numnodes = ((reg >> 4) & 0xF) + 1;
91 if (numnodes <= 1)
92 return -ENOENT;
93
94 pr_info("Number of physical nodes %d\n", numnodes);
95
96 prevbase = 0;
97 for (i = 0; i < 8; i++) {
98 unsigned long base, limit;
99
100 base = read_pci_config(0, nb, 1, 0x40 + i*8);
101 limit = read_pci_config(0, nb, 1, 0x44 + i*8);
102
103 nodeids[i] = nodeid = limit & 7;
104 if ((base & 3) == 0) {
105 if (i < numnodes)
106 pr_info("Skipping disabled node %d\n", i);
107 continue;
108 }
109 if (nodeid >= numnodes) {
110 pr_info("Ignoring excess node %d (%lx:%lx)\n", nodeid,
111 base, limit);
112 continue;
113 }
114
115 if (!limit) {
116 pr_info("Skipping node entry %d (base %lx)\n",
117 i, base);
118 continue;
119 }
120 if ((base >> 8) & 3 || (limit >> 8) & 3) {
121 pr_err("Node %d using interleaving mode %lx/%lx\n",
122 nodeid, (base >> 8) & 3, (limit >> 8) & 3);
123 return -EINVAL;
124 }
125 if (node_isset(nodeid, numa_nodes_parsed)) {
126 pr_info("Node %d already present, skipping\n",
127 nodeid);
128 continue;
129 }
130
131 limit >>= 16;
132 limit <<= 24;
133 limit |= (1<<24)-1;
134 limit++;
135
136 if (limit > end)
137 limit = end;
138 if (limit <= base)
139 continue;
140
141 base >>= 16;
142 base <<= 24;
143
144 if (base < start)
145 base = start;
146 if (limit > end)
147 limit = end;
148 if (limit == base) {
149 pr_err("Empty node %d\n", nodeid);
150 continue;
151 }
152 if (limit < base) {
153 pr_err("Node %d bogus settings %lx-%lx.\n",
154 nodeid, base, limit);
155 continue;
156 }
157
158 /* Could sort here, but pun for now. Should not happen anyroads. */
159 if (prevbase > base) {
160 pr_err("Node map not sorted %lx,%lx\n",
161 prevbase, base);
162 return -EINVAL;
163 }
164
165 pr_info("Node %d MemBase %016lx Limit %016lx\n",
166 nodeid, base, limit);
167
168 prevbase = base;
169 numa_add_memblk(nodeid, base, limit);
170 node_set(nodeid, numa_nodes_parsed);
171 }
172
173 if (!nodes_weight(numa_nodes_parsed))
174 return -ENOENT;
175
176 /*
177 * We seem to have valid NUMA configuration. Map apicids to nodes
178 * using the coreid bits from early_identify_cpu.
179 */
180 bits = boot_cpu_data.x86_coreid_bits;
181 cores = 1 << bits;
182 apicid_base = 0;
183
184 /* get the APIC ID of the BSP early for systems with apicid lifting */
185 early_get_boot_cpu_id();
186 if (boot_cpu_physical_apicid > 0) {
187 pr_info("BSP APIC ID: %02x\n", boot_cpu_physical_apicid);
188 apicid_base = boot_cpu_physical_apicid;
189 }
190
191 for_each_node_mask(i, numa_nodes_parsed)
192 for (j = apicid_base; j < cores + apicid_base; j++)
193 set_apicid_to_node((i << bits) + j, i);
194
195 return 0;
196}