diff options
author | Sonny Rao <sonnyrao@chromium.org> | 2015-04-20 18:34:07 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@kernel.org> | 2015-04-22 02:27:43 -0400 |
commit | 80bcffb376a6890dd7452b12c1ba032f8f24fef6 (patch) | |
tree | aa7ce8468710e472b84944e6438a6ae39f4bad60 /arch/x86/kernel | |
parent | 3b6e042188994466ec257b71296b5f85b894dcd9 (diff) |
perf/x86/intel/uncore: Add support for Intel Haswell ULT (lower power Mobile Processor) IMC uncore PMUs
This uncore is the same as the Haswell desktop part but uses a
different PCI ID.
Signed-off-by: Sonny Rao <sonnyrao@chromium.org>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Stephane Eranian <eranian@google.com>
Link: http://lkml.kernel.org/r/1429569247-16697-1-git-send-email-sonnyrao@chromium.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/kernel')
-rw-r--r-- | arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c b/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c index 3001015b755c..ca75e70865ef 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c +++ b/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c | |||
@@ -1,6 +1,9 @@ | |||
1 | /* Nehalem/SandBridge/Haswell uncore support */ | 1 | /* Nehalem/SandBridge/Haswell uncore support */ |
2 | #include "perf_event_intel_uncore.h" | 2 | #include "perf_event_intel_uncore.h" |
3 | 3 | ||
4 | /* Uncore IMC PCI Id */ | ||
5 | #define PCI_DEVICE_ID_INTEL_HSW_U_IMC 0x0a04 | ||
6 | |||
4 | /* SNB event control */ | 7 | /* SNB event control */ |
5 | #define SNB_UNC_CTL_EV_SEL_MASK 0x000000ff | 8 | #define SNB_UNC_CTL_EV_SEL_MASK 0x000000ff |
6 | #define SNB_UNC_CTL_UMASK_MASK 0x0000ff00 | 9 | #define SNB_UNC_CTL_UMASK_MASK 0x0000ff00 |
@@ -472,6 +475,10 @@ static const struct pci_device_id hsw_uncore_pci_ids[] = { | |||
472 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HSW_IMC), | 475 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HSW_IMC), |
473 | .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0), | 476 | .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0), |
474 | }, | 477 | }, |
478 | { /* IMC */ | ||
479 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HSW_U_IMC), | ||
480 | .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0), | ||
481 | }, | ||
475 | { /* end: all zeroes */ }, | 482 | { /* end: all zeroes */ }, |
476 | }; | 483 | }; |
477 | 484 | ||
@@ -502,6 +509,7 @@ static const struct imc_uncore_pci_dev desktop_imc_pci_ids[] = { | |||
502 | IMC_DEV(IVB_IMC, &ivb_uncore_pci_driver), /* 3rd Gen Core processor */ | 509 | IMC_DEV(IVB_IMC, &ivb_uncore_pci_driver), /* 3rd Gen Core processor */ |
503 | IMC_DEV(IVB_E3_IMC, &ivb_uncore_pci_driver), /* Xeon E3-1200 v2/3rd Gen Core processor */ | 510 | IMC_DEV(IVB_E3_IMC, &ivb_uncore_pci_driver), /* Xeon E3-1200 v2/3rd Gen Core processor */ |
504 | IMC_DEV(HSW_IMC, &hsw_uncore_pci_driver), /* 4th Gen Core Processor */ | 511 | IMC_DEV(HSW_IMC, &hsw_uncore_pci_driver), /* 4th Gen Core Processor */ |
512 | IMC_DEV(HSW_U_IMC, &hsw_uncore_pci_driver), /* 4th Gen Core ULT Mobile Processor */ | ||
505 | { /* end marker */ } | 513 | { /* end marker */ } |
506 | }; | 514 | }; |
507 | 515 | ||