Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6

Conflicts:

	arch/sparc64/kernel/pci_psycho.c

15 files changed, 408 insertions, 136 deletions

diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c
index 2763cb37b553..65a0c1b48696 100644
--- a/arch/x86/kernel/alternative.c
+++ b/arch/x86/kernel/alternative.c
@@ -145,35 +145,25 @@ static const unsigned char *const p6_nops[ASM_NOP_MAX+1] = {
 extern char __vsyscall_0;
 const unsigned char *const *find_nop_table(void)
 {
-        return boot_cpu_data.x86_vendor != X86_VENDOR_INTEL ||
-               boot_cpu_data.x86 < 6 ? k8_nops : p6_nops;
+        if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
+            boot_cpu_has(X86_FEATURE_NOPL))
+                return p6_nops;
+        else
+                return k8_nops;
 }
 
 #else /* CONFIG_X86_64 */
 
-static const struct nop {
-        int cpuid;
-        const unsigned char *const *noptable;
-} noptypes[] = {
-        { X86_FEATURE_K8, k8_nops },
-        { X86_FEATURE_K7, k7_nops },
-        { X86_FEATURE_P4, p6_nops },
-        { X86_FEATURE_P3, p6_nops },
-        { -1, NULL }
-};
-
 const unsigned char *const *find_nop_table(void)
 {
-        const unsigned char *const *noptable = intel_nops;
-        int i;
-
-        for (i = 0; noptypes[i].cpuid >= 0; i++) {
-                if (boot_cpu_has(noptypes[i].cpuid)) {
-                        noptable = noptypes[i].noptable;
-                        break;
-                }
-        }
-        return noptable;
+        if (boot_cpu_has(X86_FEATURE_K8))
+                return k8_nops;
+        else if (boot_cpu_has(X86_FEATURE_K7))
+                return k7_nops;
+        else if (boot_cpu_has(X86_FEATURE_NOPL))
+                return p6_nops;
+        else
+                return intel_nops;
 }
 
 #endif /* CONFIG_X86_64 */
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index cae9cabc3031..18514ed26104 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -31,6 +31,11 @@ static void __cpuinit early_init_amd(struct cpuinfo_x86 *c)
                 if (c->x86_power & (1<<8))
                         set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
         }
+
+        /*  Set MTRR capability flag if appropriate */
+        if (c->x86_model == 13 || c->x86_model == 9 ||
+           (c->x86_model == 8 && c->x86_mask >= 8))
+                set_cpu_cap(c, X86_FEATURE_K6_MTRR);
 }
 
 static void __cpuinit init_amd(struct cpuinfo_x86 *c)
@@ -166,10 +171,6 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
                                                 mbytes);
                                 }
 
-                                /*  Set MTRR capability flag if appropriate */
-                                if (c->x86_model == 13 || c->x86_model == 9 ||
-                                   (c->x86_model == 8 && c->x86_mask >= 8))
-                                        set_cpu_cap(c, X86_FEATURE_K6_MTRR);
                                 break;
                         }
 
diff --git a/arch/x86/kernel/cpu/centaur.c b/arch/x86/kernel/cpu/centaur.c
index e0f45edd6a55..a0534c04d38a 100644
--- a/arch/x86/kernel/cpu/centaur.c
+++ b/arch/x86/kernel/cpu/centaur.c
@@ -314,6 +314,16 @@ enum {
                 EAMD3D          = 1<<20,
 };
 
+static void __cpuinit early_init_centaur(struct cpuinfo_x86 *c)
+{
+        switch (c->x86) {
+        case 5:
+                /* Emulate MTRRs using Centaur's MCR. */
+                set_cpu_cap(c, X86_FEATURE_CENTAUR_MCR);
+                break;
+        }
+}
+
 static void __cpuinit init_centaur(struct cpuinfo_x86 *c)
 {
 
@@ -462,6 +472,7 @@ centaur_size_cache(struct cpuinfo_x86 *c, unsigned int size)
 static struct cpu_dev centaur_cpu_dev __cpuinitdata = {
         .c_vendor       = "Centaur",
         .c_ident        = { "CentaurHauls" },
+        .c_early_init   = early_init_centaur,
         .c_init         = init_centaur,
         .c_size_cache   = centaur_size_cache,
 };
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 80ab20d4fa39..8aab8517642e 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -13,6 +13,7 @@
 #include <asm/mtrr.h>
 #include <asm/mce.h>
 #include <asm/pat.h>
+#include <asm/asm.h>
 #ifdef CONFIG_X86_LOCAL_APIC
 #include <asm/mpspec.h>
 #include <asm/apic.h>
@@ -334,11 +335,40 @@ static void __init early_cpu_detect(void)
 
         get_cpu_vendor(c, 1);
 
+        early_get_cap(c);
+
         if (c->x86_vendor != X86_VENDOR_UNKNOWN &&
             cpu_devs[c->x86_vendor]->c_early_init)
                 cpu_devs[c->x86_vendor]->c_early_init(c);
+}
 
-        early_get_cap(c);
+/*
+ * The NOPL instruction is supposed to exist on all CPUs with
+ * family >= 6, unfortunately, that's not true in practice because
+ * of early VIA chips and (more importantly) broken virtualizers that
+ * are not easy to detect.  Hence, probe for it based on first
+ * principles.
+ */
+static void __cpuinit detect_nopl(struct cpuinfo_x86 *c)
+{
+        const u32 nopl_signature = 0x888c53b1; /* Random number */
+        u32 has_nopl = nopl_signature;
+
+        clear_cpu_cap(c, X86_FEATURE_NOPL);
+        if (c->x86 >= 6) {
+                asm volatile("\n"
+                             "1:      .byte 0x0f,0x1f,0xc0\n" /* nopl %eax */
+                             "2:\n"
+                             "        .section .fixup,\"ax\"\n"
+                             "3:      xor %0,%0\n"
+                             "        jmp 2b\n"
+                             "        .previous\n"
+                             _ASM_EXTABLE(1b,3b)
+                             : "+a" (has_nopl));
+
+                if (has_nopl == nopl_signature)
+                        set_cpu_cap(c, X86_FEATURE_NOPL);
+        }
 }
 
 static void __cpuinit generic_identify(struct cpuinfo_x86 *c)
@@ -395,8 +425,8 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c)
                 }
 
                 init_scattered_cpuid_features(c);
+                detect_nopl(c);
         }
-
 }
 
 static void __cpuinit squash_the_stupid_serial_number(struct cpuinfo_x86 *c)
diff --git a/arch/x86/kernel/cpu/common_64.c b/arch/x86/kernel/cpu/common_64.c
index dd6e3f15017e..a11f5d4477cd 100644
--- a/arch/x86/kernel/cpu/common_64.c
+++ b/arch/x86/kernel/cpu/common_64.c
@@ -18,6 +18,7 @@
 #include <asm/mtrr.h>
 #include <asm/mce.h>
 #include <asm/pat.h>
+#include <asm/asm.h>
 #include <asm/numa.h>
 #ifdef CONFIG_X86_LOCAL_APIC
 #include <asm/mpspec.h>
@@ -215,6 +216,39 @@ static void __init early_cpu_support_print(void)
         }
 }
 
+/*
+ * The NOPL instruction is supposed to exist on all CPUs with
+ * family >= 6, unfortunately, that's not true in practice because
+ * of early VIA chips and (more importantly) broken virtualizers that
+ * are not easy to detect.  Hence, probe for it based on first
+ * principles.
+ *
+ * Note: no 64-bit chip is known to lack these, but put the code here
+ * for consistency with 32 bits, and to make it utterly trivial to
+ * diagnose the problem should it ever surface.
+ */
+static void __cpuinit detect_nopl(struct cpuinfo_x86 *c)
+{
+        const u32 nopl_signature = 0x888c53b1; /* Random number */
+        u32 has_nopl = nopl_signature;
+
+        clear_cpu_cap(c, X86_FEATURE_NOPL);
+        if (c->x86 >= 6) {
+                asm volatile("\n"
+                             "1:      .byte 0x0f,0x1f,0xc0\n" /* nopl %eax */
+                             "2:\n"
+                             "        .section .fixup,\"ax\"\n"
+                             "3:      xor %0,%0\n"
+                             "        jmp 2b\n"
+                             "        .previous\n"
+                             _ASM_EXTABLE(1b,3b)
+                             : "+a" (has_nopl));
+
+                if (has_nopl == nopl_signature)
+                        set_cpu_cap(c, X86_FEATURE_NOPL);
+        }
+}
+
 static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c);
 
 void __init early_cpu_init(void)
@@ -313,6 +347,8 @@ static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
                 c->x86_phys_bits = eax & 0xff;
         }
 
+        detect_nopl(c);
+
         if (c->x86_vendor != X86_VENDOR_UNKNOWN &&
             cpu_devs[c->x86_vendor]->c_early_init)
                 cpu_devs[c->x86_vendor]->c_early_init(c);
@@ -493,17 +529,20 @@ void pda_init(int cpu)
                 /* others are initialized in smpboot.c */
                 pda->pcurrent = &init_task;
                 pda->irqstackptr = boot_cpu_stack;
+                pda->irqstackptr += IRQSTACKSIZE - 64;
         } else {
-                pda->irqstackptr = (char *)
-                        __get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER);
-                if (!pda->irqstackptr)
-                        panic("cannot allocate irqstack for cpu %d", cpu);
+                if (!pda->irqstackptr) {
+                        pda->irqstackptr = (char *)
+                                __get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER);
+                        if (!pda->irqstackptr)
+                                panic("cannot allocate irqstack for cpu %d",
+                                      cpu);
+                        pda->irqstackptr += IRQSTACKSIZE - 64;
+                }
 
                 if (pda->nodenumber == 0 && cpu_to_node(cpu) != NUMA_NO_NODE)
                         pda->nodenumber = cpu_to_node(cpu);
         }
-
-        pda->irqstackptr += IRQSTACKSIZE-64;
 }
 
 char boot_exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ +
@@ -601,19 +640,22 @@ void __cpuinit cpu_init(void)
         /*
          * set up and load the per-CPU TSS
          */
-        for (v = 0; v < N_EXCEPTION_STACKS; v++) {
+        if (!orig_ist->ist[0]) {
                 static const unsigned int order[N_EXCEPTION_STACKS] = {
-                        [0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STACK_ORDER,
-                        [DEBUG_STACK - 1] = DEBUG_STACK_ORDER
+                  [0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STACK_ORDER,
+                  [DEBUG_STACK - 1] = DEBUG_STACK_ORDER
                 };
-                if (cpu) {
-                        estacks = (char *)__get_free_pages(GFP_ATOMIC, order[v]);
-                        if (!estacks)
-                                panic("Cannot allocate exception stack %ld %d\n",
-                                      v, cpu);
+                for (v = 0; v < N_EXCEPTION_STACKS; v++) {
+                        if (cpu) {
+                                estacks = (char *)__get_free_pages(GFP_ATOMIC, order[v]);
+                                if (!estacks)
+                                        panic("Cannot allocate exception "
+                                              "stack %ld %d\n", v, cpu);
+                        }
+                        estacks += PAGE_SIZE << order[v];
+                        orig_ist->ist[v] = t->x86_tss.ist[v] =
+                                        (unsigned long)estacks;
                 }
-                estacks += PAGE_SIZE << order[v];
-                orig_ist->ist[v] = t->x86_tss.ist[v] = (unsigned long)estacks;
         }
 
         t->x86_tss.io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
diff --git a/arch/x86/kernel/cpu/cyrix.c b/arch/x86/kernel/cpu/cyrix.c
index e710a21bb6e8..898a5a2002ed 100644
--- a/arch/x86/kernel/cpu/cyrix.c
+++ b/arch/x86/kernel/cpu/cyrix.c
@@ -15,13 +15,11 @@
 /*
  * Read NSC/Cyrix DEVID registers (DIR) to get more detailed info. about the CPU
  */
-static void __cpuinit do_cyrix_devid(unsigned char *dir0, unsigned char *dir1)
+static void __cpuinit __do_cyrix_devid(unsigned char *dir0, unsigned char *dir1)
 {
         unsigned char ccr2, ccr3;
-        unsigned long flags;
 
         /* we test for DEVID by checking whether CCR3 is writable */
-        local_irq_save(flags);
         ccr3 = getCx86(CX86_CCR3);
         setCx86(CX86_CCR3, ccr3 ^ 0x80);
         getCx86(0xc0);   /* dummy to change bus */
@@ -44,9 +42,16 @@ static void __cpuinit do_cyrix_devid(unsigned char *dir0, unsigned char *dir1)
                 *dir0 = getCx86(CX86_DIR0);
                 *dir1 = getCx86(CX86_DIR1);
         }
-        local_irq_restore(flags);
 }
 
+static void __cpuinit do_cyrix_devid(unsigned char *dir0, unsigned char *dir1)
+{
+        unsigned long flags;
+
+        local_irq_save(flags);
+        __do_cyrix_devid(dir0, dir1);
+        local_irq_restore(flags);
+}
 /*
  * Cx86_dir0_msb is a HACK needed by check_cx686_cpuid/slop in bugs.h in
  * order to identify the Cyrix CPU model after we're out of setup.c
@@ -161,6 +166,24 @@ static void __cpuinit geode_configure(void)
         local_irq_restore(flags);
 }
 
+static void __cpuinit early_init_cyrix(struct cpuinfo_x86 *c)
+{
+        unsigned char dir0, dir0_msn, dir1 = 0;
+
+        __do_cyrix_devid(&dir0, &dir1);
+        dir0_msn = dir0 >> 4; /* identifies CPU "family"   */
+
+        switch (dir0_msn) {
+        case 3: /* 6x86/6x86L */
+                /* Emulate MTRRs using Cyrix's ARRs. */
+                set_cpu_cap(c, X86_FEATURE_CYRIX_ARR);
+                break;
+        case 5: /* 6x86MX/M II */
+                /* Emulate MTRRs using Cyrix's ARRs. */
+                set_cpu_cap(c, X86_FEATURE_CYRIX_ARR);
+                break;
+        }
+}
 
 static void __cpuinit init_cyrix(struct cpuinfo_x86 *c)
 {
@@ -416,6 +439,7 @@ static void __cpuinit cyrix_identify(struct cpuinfo_x86 *c)
 static struct cpu_dev cyrix_cpu_dev __cpuinitdata = {
         .c_vendor       = "Cyrix",
         .c_ident        = { "CyrixInstead" },
+        .c_early_init   = early_init_cyrix,
         .c_init         = init_cyrix,
         .c_identify     = cyrix_identify,
 };
diff --git a/arch/x86/kernel/cpu/feature_names.c b/arch/x86/kernel/cpu/feature_names.c
index e43ad4ad4cba..c9017799497c 100644
--- a/arch/x86/kernel/cpu/feature_names.c
+++ b/arch/x86/kernel/cpu/feature_names.c
@@ -39,7 +39,8 @@ const char * const x86_cap_flags[NCAPINTS*32] = {
         NULL, NULL, NULL, NULL,
         "constant_tsc", "up", NULL, "arch_perfmon",
         "pebs", "bts", NULL, NULL,
-        "rep_good", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+        "rep_good", NULL, NULL, NULL,
+        "nopl", NULL, NULL, NULL,
         NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
 
         /* Intel-defined (#2) */
diff --git a/arch/x86/kernel/cpu/mcheck/mce_64.c b/arch/x86/kernel/cpu/mcheck/mce_64.c
index 65a339678ece..726a5fcdf341 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_64.c
@@ -759,6 +759,7 @@ static struct sysdev_class mce_sysclass = {
 };
 
 DEFINE_PER_CPU(struct sys_device, device_mce);
+void (*threshold_cpu_callback)(unsigned long action, unsigned int cpu) __cpuinitdata;
 
 /* Why are there no generic functions for this? */
 #define ACCESSOR(name, var, start) \
@@ -883,9 +884,13 @@ static int __cpuinit mce_cpu_callback(struct notifier_block *nfb,
         case CPU_ONLINE:
         case CPU_ONLINE_FROZEN:
                 mce_create_device(cpu);
+                if (threshold_cpu_callback)
+                        threshold_cpu_callback(action, cpu);
                 break;
         case CPU_DEAD:
         case CPU_DEAD_FROZEN:
+                if (threshold_cpu_callback)
+                        threshold_cpu_callback(action, cpu);
                 mce_remove_device(cpu);
                 break;
         }
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd_64.c b/arch/x86/kernel/cpu/mcheck/mce_amd_64.c
index 88736cadbaa6..5eb390a4b2e9 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd_64.c
@@ -628,6 +628,7 @@ static void threshold_remove_bank(unsigned int cpu, int bank)
         deallocate_threshold_block(cpu, bank);
 
 free_out:
+        kobject_del(b->kobj);
         kobject_put(b->kobj);
         kfree(b);
         per_cpu(threshold_banks, cpu)[bank] = NULL;
@@ -645,14 +646,11 @@ static void threshold_remove_device(unsigned int cpu)
 }
 
 /* get notified when a cpu comes on/off */
-static int __cpuinit threshold_cpu_callback(struct notifier_block *nfb,
-                                            unsigned long action, void *hcpu)
+static void __cpuinit amd_64_threshold_cpu_callback(unsigned long action,
+                                                     unsigned int cpu)
 {
-        /* cpu was unsigned int to begin with */
-        unsigned int cpu = (unsigned long)hcpu;
-
         if (cpu >= NR_CPUS)
-                goto out;
+                return;
 
         switch (action) {
         case CPU_ONLINE:
@@ -666,14 +664,8 @@ static int __cpuinit threshold_cpu_callback(struct notifier_block *nfb,
         default:
                 break;
         }
-      out:
-        return NOTIFY_OK;
 }
 
-static struct notifier_block threshold_cpu_notifier __cpuinitdata = {
-        .notifier_call = threshold_cpu_callback,
-};
-
 static __init int threshold_init_device(void)
 {
         unsigned lcpu = 0;
@@ -684,7 +676,7 @@ static __init int threshold_init_device(void)
                 if (err)
                         return err;
         }
-        register_hotcpu_notifier(&threshold_cpu_notifier);
+        threshold_cpu_callback = amd_64_threshold_cpu_callback;
         return 0;
 }
 
diff --git a/arch/x86/kernel/cpuid.c b/arch/x86/kernel/cpuid.c
index 14b11b3be31c..8e9cd6a8ec12 100644
--- a/arch/x86/kernel/cpuid.c
+++ b/arch/x86/kernel/cpuid.c
@@ -89,6 +89,8 @@ static ssize_t cpuid_read(struct file *file, char __user *buf,
         struct cpuid_regs cmd;
         int cpu = iminor(file->f_path.dentry->d_inode);
         u64 pos = *ppos;
+        ssize_t bytes = 0;
+        int err = 0;
 
         if (count % 16)
                 return -EINVAL; /* Invalid chunk size */
@@ -96,14 +98,19 @@ static ssize_t cpuid_read(struct file *file, char __user *buf,
         for (; count; count -= 16) {
                 cmd.eax = pos;
                 cmd.ecx = pos >> 32;
-                smp_call_function_single(cpu, cpuid_smp_cpuid, &cmd, 1);
-                if (copy_to_user(tmp, &cmd, 16))
-                        return -EFAULT;
+                err = smp_call_function_single(cpu, cpuid_smp_cpuid, &cmd, 1);
+                if (err)
+                        break;
+                if (copy_to_user(tmp, &cmd, 16)) {
+                        err = -EFAULT;
+                        break;
+                }
                 tmp += 16;
+                bytes += 16;
                 *ppos = ++pos;
         }
 
-        return tmp - buf;
+        return bytes ? bytes : err;
 }
 
 static int cpuid_open(struct inode *inode, struct file *file)
diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c
index 9af89078f7bb..66e48aa2dd1b 100644
--- a/arch/x86/kernel/e820.c
+++ b/arch/x86/kernel/e820.c
@@ -1203,7 +1203,7 @@ static int __init parse_memmap_opt(char *p)
         if (!p)
                 return -EINVAL;
 
-        if (!strcmp(p, "exactmap")) {
+        if (!strncmp(p, "exactmap", 8)) {
 #ifdef CONFIG_CRASH_DUMP
                 /*
                  * If we are doing a crash dump, we still need to know
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index 59fd3b6b1303..73deaffadd03 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -210,8 +210,8 @@ static void hpet_legacy_clockevent_register(void)
         /* Calculate the min / max delta */
         hpet_clockevent.max_delta_ns = clockevent_delta2ns(0x7FFFFFFF,
                                                            &hpet_clockevent);
-        hpet_clockevent.min_delta_ns = clockevent_delta2ns(0x30,
-                                                           &hpet_clockevent);
+        /* 5 usec minimum reprogramming delta. */
+        hpet_clockevent.min_delta_ns = 5000;
 
         /*
          * Start hpet with the boot cpu mask and make it
@@ -270,15 +270,22 @@ static void hpet_legacy_set_mode(enum clock_event_mode mode,
 }
 
 static int hpet_legacy_next_event(unsigned long delta,
-                           struct clock_event_device *evt)
+                                  struct clock_event_device *evt)
 {
-        unsigned long cnt;
+        u32 cnt;
 
         cnt = hpet_readl(HPET_COUNTER);
-        cnt += delta;
+        cnt += (u32) delta;
         hpet_writel(cnt, HPET_T0_CMP);
 
-        return ((long)(hpet_readl(HPET_COUNTER) - cnt ) > 0) ? -ETIME : 0;
+        /*
+         * We need to read back the CMP register to make sure that
+         * what we wrote hit the chip before we compare it to the
+         * counter.
+         */
+        WARN_ON((u32)hpet_readl(HPET_T0_CMP) != cnt);
+
+        return (s32)((u32)hpet_readl(HPET_COUNTER) - cnt) >= 0 ? -ETIME : 0;
 }
 
 /*
diff --git a/arch/x86/kernel/io_delay.c b/arch/x86/kernel/io_delay.c
index 1c3a66a67f83..720d2607aacb 100644
--- a/arch/x86/kernel/io_delay.c
+++ b/arch/x86/kernel/io_delay.c
@@ -92,6 +92,14 @@ static struct dmi_system_id __initdata io_delay_0xed_port_dmi_table[] = {
                         DMI_MATCH(DMI_BOARD_NAME, "30BF")
                 }
         },
+        {
+                .callback       = dmi_io_delay_0xed_port,
+                .ident          = "Presario F700",
+                .matches        = {
+                        DMI_MATCH(DMI_BOARD_VENDOR, "Quanta"),
+                        DMI_MATCH(DMI_BOARD_NAME, "30D3")
+                }
+        },
         { }
 };
 
diff --git a/arch/x86/kernel/msr.c b/arch/x86/kernel/msr.c
index e43938086885..2e2af5d18191 100644
--- a/arch/x86/kernel/msr.c
+++ b/arch/x86/kernel/msr.c
@@ -72,21 +72,28 @@ static ssize_t msr_read(struct file *file, char __user *buf,
         u32 data[2];
         u32 reg = *ppos;
         int cpu = iminor(file->f_path.dentry->d_inode);
-        int err;
+        int err = 0;
+        ssize_t bytes = 0;
 
         if (count % 8)
                 return -EINVAL; /* Invalid chunk size */
 
         for (; count; count -= 8) {
                 err = rdmsr_safe_on_cpu(cpu, reg, &data[0], &data[1]);
-                if (err)
-                        return -EIO;
-                if (copy_to_user(tmp, &data, 8))
-                        return -EFAULT;
+                if (err) {
+                        if (err == -EFAULT) /* Fix idiotic error code */
+                                err = -EIO;
+                        break;
+                }
+                if (copy_to_user(tmp, &data, 8)) {
+                        err = -EFAULT;
+                        break;
+                }
                 tmp += 2;
+                bytes += 8;
         }
 
-        return ((char __user *)tmp) - buf;
+        return bytes ? bytes : err;
 }
 
 static ssize_t msr_write(struct file *file, const char __user *buf,
@@ -96,21 +103,28 @@ static ssize_t msr_write(struct file *file, const char __user *buf,
         u32 data[2];
         u32 reg = *ppos;
         int cpu = iminor(file->f_path.dentry->d_inode);
-        int err;
+        int err = 0;
+        ssize_t bytes = 0;
 
         if (count % 8)
                 return -EINVAL; /* Invalid chunk size */
 
         for (; count; count -= 8) {
-                if (copy_from_user(&data, tmp, 8))
-                        return -EFAULT;
+                if (copy_from_user(&data, tmp, 8)) {
+                        err = -EFAULT;
+                        break;
+                }
                 err = wrmsr_safe_on_cpu(cpu, reg, data[0], data[1]);
-                if (err)
-                        return -EIO;
+                if (err) {
+                        if (err == -EFAULT) /* Fix idiotic error code */
+                                err = -EIO;
+                        break;
+                }
                 tmp += 2;
+                bytes += 8;
         }
 
-        return ((char __user *)tmp) - buf;
+        return bytes ? bytes : err;
 }
 
 static int msr_open(struct inode *inode, struct file *file)
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 46af71676738..8f98e9de1b82 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -122,80 +122,216 @@ static u64 tsc_read_refs(u64 *pm, u64 *hpet)
         return ULLONG_MAX;
 }
 
-/**
- * native_calibrate_tsc - calibrate the tsc on boot
+/*
+ * Try to calibrate the TSC against the Programmable
+ * Interrupt Timer and return the frequency of the TSC
+ * in kHz.
+ *
+ * Return ULONG_MAX on failure to calibrate.
  */
-unsigned long native_calibrate_tsc(void)
+static unsigned long pit_calibrate_tsc(void)
 {
-        unsigned long flags;
-        u64 tsc1, tsc2, tr1, tr2, delta, pm1, pm2, hpet1, hpet2;
-        int hpet = is_hpet_enabled();
-        unsigned int tsc_khz_val = 0;
-
-        local_irq_save(flags);
-
-        tsc1 = tsc_read_refs(&pm1, hpet ? &hpet1 : NULL);
+        u64 tsc, t1, t2, delta;
+        unsigned long tscmin, tscmax;
+        int pitcnt;
 
+        /* Set the Gate high, disable speaker */
         outb((inb(0x61) & ~0x02) | 0x01, 0x61);
 
+        /*
+         * Setup CTC channel 2* for mode 0, (interrupt on terminal
+         * count mode), binary count. Set the latch register to 50ms
+         * (LSB then MSB) to begin countdown.
+         */
         outb(0xb0, 0x43);
         outb((CLOCK_TICK_RATE / (1000 / 50)) & 0xff, 0x42);
         outb((CLOCK_TICK_RATE / (1000 / 50)) >> 8, 0x42);
-        tr1 = get_cycles();
-        while ((inb(0x61) & 0x20) == 0);
-        tr2 = get_cycles();
 
-        tsc2 = tsc_read_refs(&pm2, hpet ? &hpet2 : NULL);
+        tsc = t1 = t2 = get_cycles();
 
-        local_irq_restore(flags);
+        pitcnt = 0;
+        tscmax = 0;
+        tscmin = ULONG_MAX;
+        while ((inb(0x61) & 0x20) == 0) {
+                t2 = get_cycles();
+                delta = t2 - tsc;
+                tsc = t2;
+                if ((unsigned long) delta < tscmin)
+                        tscmin = (unsigned int) delta;
+                if ((unsigned long) delta > tscmax)
+                        tscmax = (unsigned int) delta;
+                pitcnt++;
+        }
 
         /*
-         * Preset the result with the raw and inaccurate PIT
-         * calibration value
+         * Sanity checks:
+         *
+         * If we were not able to read the PIT more than 5000
+         * times, then we have been hit by a massive SMI
+         *
+         * If the maximum is 10 times larger than the minimum,
+         * then we got hit by an SMI as well.
          */
-        delta = (tr2 - tr1);
+        if (pitcnt < 5000 || tscmax > 10 * tscmin)
+                return ULONG_MAX;
+
+        /* Calculate the PIT value */
+        delta = t2 - t1;
         do_div(delta, 50);
-        tsc_khz_val = delta;
+        return delta;
+}
+
+
+/**
+ * native_calibrate_tsc - calibrate the tsc on boot
+ */
+unsigned long native_calibrate_tsc(void)
+{
+        u64 tsc1, tsc2, delta, pm1, pm2, hpet1, hpet2;
+        unsigned long tsc_pit_min = ULONG_MAX, tsc_ref_min = ULONG_MAX;
+        unsigned long flags;
+        int hpet = is_hpet_enabled(), i;
+
+        /*
+         * Run 5 calibration loops to get the lowest frequency value
+         * (the best estimate). We use two different calibration modes
+         * here:
+         *
+         * 1) PIT loop. We set the PIT Channel 2 to oneshot mode and
+         * load a timeout of 50ms. We read the time right after we
+         * started the timer and wait until the PIT count down reaches
+         * zero. In each wait loop iteration we read the TSC and check
+         * the delta to the previous read. We keep track of the min
+         * and max values of that delta. The delta is mostly defined
+         * by the IO time of the PIT access, so we can detect when a
+         * SMI/SMM disturbance happend between the two reads. If the
+         * maximum time is significantly larger than the minimum time,
+         * then we discard the result and have another try.
+         *
+         * 2) Reference counter. If available we use the HPET or the
+         * PMTIMER as a reference to check the sanity of that value.
+         * We use separate TSC readouts and check inside of the
+         * reference read for a SMI/SMM disturbance. We dicard
+         * disturbed values here as well. We do that around the PIT
+         * calibration delay loop as we have to wait for a certain
+         * amount of time anyway.
+         */
+        for (i = 0; i < 5; i++) {
+                unsigned long tsc_pit_khz;
+
+                /*
+                 * Read the start value and the reference count of
+                 * hpet/pmtimer when available. Then do the PIT
+                 * calibration, which will take at least 50ms, and
+                 * read the end value.
+                 */
+                local_irq_save(flags);
+                tsc1 = tsc_read_refs(&pm1, hpet ? &hpet1 : NULL);
+                tsc_pit_khz = pit_calibrate_tsc();
+                tsc2 = tsc_read_refs(&pm2, hpet ? &hpet2 : NULL);
+                local_irq_restore(flags);
+
+                /* Pick the lowest PIT TSC calibration so far */
+                tsc_pit_min = min(tsc_pit_min, tsc_pit_khz);
+
+                /* hpet or pmtimer available ? */
+                if (!hpet && !pm1 && !pm2)
+                        continue;
+
+                /* Check, whether the sampling was disturbed by an SMI */
+                if (tsc1 == ULLONG_MAX || tsc2 == ULLONG_MAX)
+                        continue;
+
+                tsc2 = (tsc2 - tsc1) * 1000000LL;
+
+                if (hpet) {
+                        if (hpet2 < hpet1)
+                                hpet2 += 0x100000000ULL;
+                        hpet2 -= hpet1;
+                        tsc1 = ((u64)hpet2 * hpet_readl(HPET_PERIOD));
+                        do_div(tsc1, 1000000);
+                } else {
+                        if (pm2 < pm1)
+                                pm2 += (u64)ACPI_PM_OVRRUN;
+                        pm2 -= pm1;
+                        tsc1 = pm2 * 1000000000LL;
+                        do_div(tsc1, PMTMR_TICKS_PER_SEC);
+                }
+
+                do_div(tsc2, tsc1);
+                tsc_ref_min = min(tsc_ref_min, (unsigned long) tsc2);
+        }
+
+        /*
+         * Now check the results.
+         */
+        if (tsc_pit_min == ULONG_MAX) {
+                /* PIT gave no useful value */
+                printk(KERN_WARNING "TSC: Unable to calibrate against PIT\n");
+
+                /* We don't have an alternative source, disable TSC */
+                if (!hpet && !pm1 && !pm2) {
+                        printk("TSC: No reference (HPET/PMTIMER) available\n");
+                        return 0;
+                }
+
+                /* The alternative source failed as well, disable TSC */
+                if (tsc_ref_min == ULONG_MAX) {
+                        printk(KERN_WARNING "TSC: HPET/PMTIMER calibration "
+                               "failed due to SMI disturbance.\n");
+                        return 0;
+                }
+
+                /* Use the alternative source */
+                printk(KERN_INFO "TSC: using %s reference calibration\n",
+                       hpet ? "HPET" : "PMTIMER");
+
+                return tsc_ref_min;
+        }
 
-        /* hpet or pmtimer available ? */
+        /* We don't have an alternative source, use the PIT calibration value */
         if (!hpet && !pm1 && !pm2) {
-                printk(KERN_INFO "TSC calibrated against PIT\n");
-                goto out;
+                printk(KERN_INFO "TSC: Using PIT calibration value\n");
+                return tsc_pit_min;
         }
 
-        /* Check, whether the sampling was disturbed by an SMI */
-        if (tsc1 == ULLONG_MAX || tsc2 == ULLONG_MAX) {
-                printk(KERN_WARNING "TSC calibration disturbed by SMI, "
-                                "using PIT calibration result\n");
-                goto out;
+        /* The alternative source failed, use the PIT calibration value */
+        if (tsc_ref_min == ULONG_MAX) {
+                printk(KERN_WARNING "TSC: HPET/PMTIMER calibration failed due "
+                       "to SMI disturbance. Using PIT calibration\n");
+                return tsc_pit_min;
         }
 
-        tsc2 = (tsc2 - tsc1) * 1000000LL;
-
-        if (hpet) {
-                printk(KERN_INFO "TSC calibrated against HPET\n");
-                if (hpet2 < hpet1)
-                        hpet2 += 0x100000000ULL;
-                hpet2 -= hpet1;
-                tsc1 = ((u64)hpet2 * hpet_readl(HPET_PERIOD));
-                do_div(tsc1, 1000000);
-        } else {
-                printk(KERN_INFO "TSC calibrated against PM_TIMER\n");
-                if (pm2 < pm1)
-                        pm2 += (u64)ACPI_PM_OVRRUN;
-                pm2 -= pm1;
-                tsc1 = pm2 * 1000000000LL;
-                do_div(tsc1, PMTMR_TICKS_PER_SEC);
+        /* Check the reference deviation */
+        delta = ((u64) tsc_pit_min) * 100;
+        do_div(delta, tsc_ref_min);
+
+        /*
+         * If both calibration results are inside a 5% window, the we
+         * use the lower frequency of those as it is probably the
+         * closest estimate.
+         */
+        if (delta >= 95 && delta <= 105) {
+                printk(KERN_INFO "TSC: PIT calibration confirmed by %s.\n",
+                       hpet ? "HPET" : "PMTIMER");
+                printk(KERN_INFO "TSC: using %s calibration value\n",
+                       tsc_pit_min <= tsc_ref_min ? "PIT" :
+                       hpet ? "HPET" : "PMTIMER");
+                return tsc_pit_min <= tsc_ref_min ? tsc_pit_min : tsc_ref_min;
         }
 
-        do_div(tsc2, tsc1);
-        tsc_khz_val = tsc2;
+        printk(KERN_WARNING "TSC: PIT calibration deviates from %s: %lu %lu.\n",
+               hpet ? "HPET" : "PMTIMER", tsc_pit_min, tsc_ref_min);
 
-out:
-        return tsc_khz_val;
+        /*
+         * The calibration values differ too much. In doubt, we use
+         * the PIT value as we know that there are PMTIMERs around
+         * running at double speed.
+         */
+        printk(KERN_INFO "TSC: Using PIT calibration value\n");
+        return tsc_pit_min;
 }
 
-
 #ifdef CONFIG_X86_32
 /* Only called from the Powernow K7 cpu freq driver */
 int recalibrate_cpu_khz(void)
@@ -314,7 +450,7 @@ static int time_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
                         mark_tsc_unstable("cpufreq changes");
         }
 
-        set_cyc2ns_scale(tsc_khz_ref, freq->cpu);
+        set_cyc2ns_scale(tsc_khz, freq->cpu);
 
         return 0;
 }
@@ -325,6 +461,10 @@ static struct notifier_block time_cpufreq_notifier_block = {
 
 static int __init cpufreq_tsc(void)
 {
+        if (!cpu_has_tsc)
+                return 0;
+        if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
+                return 0;
         cpufreq_register_notifier(&time_cpufreq_notifier_block,
                                 CPUFREQ_TRANSITION_NOTIFIER);
         return 0;