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authorH. Peter Anvin <hpa@linux.intel.com>2010-07-28 16:11:28 -0400
committerH. Peter Anvin <hpa@linux.intel.com>2010-07-28 16:11:28 -0400
commit7d50d07da23995a18ac449636cb42aec2cb2808d (patch)
tree0ddf940a5e9ddc5eeebc996601d7fee3c36ab836 /arch/x86/kernel/quirks.c
parent2decb194e65ab66eaf787512dc572cdc99893b24 (diff)
parent6aa033d7efb85830535bb83cf6713d6025ae6e59 (diff)
Merge remote branch 'linus/master' into x86/cpu
Diffstat (limited to 'arch/x86/kernel/quirks.c')
-rw-r--r--arch/x86/kernel/quirks.c5
1 files changed, 0 insertions, 5 deletions
diff --git a/arch/x86/kernel/quirks.c b/arch/x86/kernel/quirks.c
index e72d3fc6547d..939b9e98245f 100644
--- a/arch/x86/kernel/quirks.c
+++ b/arch/x86/kernel/quirks.c
@@ -498,15 +498,10 @@ void force_hpet_resume(void)
498 * See erratum #27 (Misinterpreted MSI Requests May Result in 498 * See erratum #27 (Misinterpreted MSI Requests May Result in
499 * Corrupted LPC DMA Data) in AMD Publication #46837, 499 * Corrupted LPC DMA Data) in AMD Publication #46837,
500 * "SB700 Family Product Errata", Rev. 1.0, March 2010. 500 * "SB700 Family Product Errata", Rev. 1.0, March 2010.
501 *
502 * Also force the read back of the CMP register in hpet_next_event()
503 * to work around the problem that the CMP register write seems to be
504 * delayed. See hpet_next_event() for details.
505 */ 501 */
506static void force_disable_hpet_msi(struct pci_dev *unused) 502static void force_disable_hpet_msi(struct pci_dev *unused)
507{ 503{
508 hpet_msi_disable = 1; 504 hpet_msi_disable = 1;
509 hpet_readback_cmp = 1;
510} 505}
511 506
512DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS, 507DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS,