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author | Rusty Russell <rusty@rustcorp.com.au> | 2008-12-29 16:32:35 -0500 |
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committer | Rusty Russell <rusty@rustcorp.com.au> | 2008-12-29 16:32:35 -0500 |
commit | 33edcf133ba93ecba2e4b6472e97b689895d805c (patch) | |
tree | 327d7a20acef64005e7c5ccbfa1265be28aeb6ac /arch/x86/kernel/microcode_intel.c | |
parent | be4d638c1597580ed2294d899d9f1a2cd10e462c (diff) | |
parent | 3c92ec8ae91ecf59d88c798301833d7cf83f2179 (diff) |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Diffstat (limited to 'arch/x86/kernel/microcode_intel.c')
-rw-r--r-- | arch/x86/kernel/microcode_intel.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/x86/kernel/microcode_intel.c b/arch/x86/kernel/microcode_intel.c index 622dc4a21784..b7f4c929e615 100644 --- a/arch/x86/kernel/microcode_intel.c +++ b/arch/x86/kernel/microcode_intel.c | |||
@@ -155,6 +155,7 @@ static DEFINE_SPINLOCK(microcode_update_lock); | |||
155 | static int collect_cpu_info(int cpu_num, struct cpu_signature *csig) | 155 | static int collect_cpu_info(int cpu_num, struct cpu_signature *csig) |
156 | { | 156 | { |
157 | struct cpuinfo_x86 *c = &cpu_data(cpu_num); | 157 | struct cpuinfo_x86 *c = &cpu_data(cpu_num); |
158 | unsigned long flags; | ||
158 | unsigned int val[2]; | 159 | unsigned int val[2]; |
159 | 160 | ||
160 | memset(csig, 0, sizeof(*csig)); | 161 | memset(csig, 0, sizeof(*csig)); |
@@ -174,11 +175,16 @@ static int collect_cpu_info(int cpu_num, struct cpu_signature *csig) | |||
174 | csig->pf = 1 << ((val[1] >> 18) & 7); | 175 | csig->pf = 1 << ((val[1] >> 18) & 7); |
175 | } | 176 | } |
176 | 177 | ||
178 | /* serialize access to the physical write to MSR 0x79 */ | ||
179 | spin_lock_irqsave(µcode_update_lock, flags); | ||
180 | |||
177 | wrmsr(MSR_IA32_UCODE_REV, 0, 0); | 181 | wrmsr(MSR_IA32_UCODE_REV, 0, 0); |
178 | /* see notes above for revision 1.07. Apparent chip bug */ | 182 | /* see notes above for revision 1.07. Apparent chip bug */ |
179 | sync_core(); | 183 | sync_core(); |
180 | /* get the current revision from MSR 0x8B */ | 184 | /* get the current revision from MSR 0x8B */ |
181 | rdmsr(MSR_IA32_UCODE_REV, val[0], csig->rev); | 185 | rdmsr(MSR_IA32_UCODE_REV, val[0], csig->rev); |
186 | spin_unlock_irqrestore(µcode_update_lock, flags); | ||
187 | |||
182 | pr_debug("microcode: collect_cpu_info : sig=0x%x, pf=0x%x, rev=0x%x\n", | 188 | pr_debug("microcode: collect_cpu_info : sig=0x%x, pf=0x%x, rev=0x%x\n", |
183 | csig->sig, csig->pf, csig->rev); | 189 | csig->sig, csig->pf, csig->rev); |
184 | 190 | ||
@@ -465,7 +471,7 @@ static void microcode_fini_cpu(int cpu) | |||
465 | uci->mc = NULL; | 471 | uci->mc = NULL; |
466 | } | 472 | } |
467 | 473 | ||
468 | struct microcode_ops microcode_intel_ops = { | 474 | static struct microcode_ops microcode_intel_ops = { |
469 | .request_microcode_user = request_microcode_user, | 475 | .request_microcode_user = request_microcode_user, |
470 | .request_microcode_fw = request_microcode_fw, | 476 | .request_microcode_fw = request_microcode_fw, |
471 | .collect_cpu_info = collect_cpu_info, | 477 | .collect_cpu_info = collect_cpu_info, |