diff options
author | Glenn Elliott <gelliott@cs.unc.edu> | 2012-03-04 19:47:13 -0500 |
---|---|---|
committer | Glenn Elliott <gelliott@cs.unc.edu> | 2012-03-04 19:47:13 -0500 |
commit | c71c03bda1e86c9d5198c5d83f712e695c4f2a1e (patch) | |
tree | ecb166cb3e2b7e2adb3b5e292245fefd23381ac8 /arch/x86/kernel/irqinit.c | |
parent | ea53c912f8a86a8567697115b6a0d8152beee5c8 (diff) | |
parent | 6a00f206debf8a5c8899055726ad127dbeeed098 (diff) |
Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp
Conflicts:
litmus/sched_cedf.c
Diffstat (limited to 'arch/x86/kernel/irqinit.c')
-rw-r--r-- | arch/x86/kernel/irqinit.c | 113 |
1 files changed, 88 insertions, 25 deletions
diff --git a/arch/x86/kernel/irqinit.c b/arch/x86/kernel/irqinit.c index 9772b1a0f9a4..48acf71c6534 100644 --- a/arch/x86/kernel/irqinit.c +++ b/arch/x86/kernel/irqinit.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <asm/setup.h> | 25 | #include <asm/setup.h> |
26 | #include <asm/i8259.h> | 26 | #include <asm/i8259.h> |
27 | #include <asm/traps.h> | 27 | #include <asm/traps.h> |
28 | #include <asm/prom.h> | ||
28 | 29 | ||
29 | /* | 30 | /* |
30 | * ISA PIC or low IO-APIC triggered (INTA-cycle or APIC) interrupts: | 31 | * ISA PIC or low IO-APIC triggered (INTA-cycle or APIC) interrupts: |
@@ -71,6 +72,7 @@ static irqreturn_t math_error_irq(int cpl, void *dev_id) | |||
71 | static struct irqaction fpu_irq = { | 72 | static struct irqaction fpu_irq = { |
72 | .handler = math_error_irq, | 73 | .handler = math_error_irq, |
73 | .name = "fpu", | 74 | .name = "fpu", |
75 | .flags = IRQF_NO_THREAD, | ||
74 | }; | 76 | }; |
75 | #endif | 77 | #endif |
76 | 78 | ||
@@ -80,6 +82,7 @@ static struct irqaction fpu_irq = { | |||
80 | static struct irqaction irq2 = { | 82 | static struct irqaction irq2 = { |
81 | .handler = no_action, | 83 | .handler = no_action, |
82 | .name = "cascade", | 84 | .name = "cascade", |
85 | .flags = IRQF_NO_THREAD, | ||
83 | }; | 86 | }; |
84 | 87 | ||
85 | DEFINE_PER_CPU(vector_irq_t, vector_irq) = { | 88 | DEFINE_PER_CPU(vector_irq_t, vector_irq) = { |
@@ -100,6 +103,8 @@ int vector_used_by_percpu_irq(unsigned int vector) | |||
100 | 103 | ||
101 | void __init init_ISA_irqs(void) | 104 | void __init init_ISA_irqs(void) |
102 | { | 105 | { |
106 | struct irq_chip *chip = legacy_pic->chip; | ||
107 | const char *name = chip->name; | ||
103 | int i; | 108 | int i; |
104 | 109 | ||
105 | #if defined(CONFIG_X86_64) || defined(CONFIG_X86_LOCAL_APIC) | 110 | #if defined(CONFIG_X86_64) || defined(CONFIG_X86_LOCAL_APIC) |
@@ -107,19 +112,8 @@ void __init init_ISA_irqs(void) | |||
107 | #endif | 112 | #endif |
108 | legacy_pic->init(0); | 113 | legacy_pic->init(0); |
109 | 114 | ||
110 | /* | 115 | for (i = 0; i < legacy_pic->nr_legacy_irqs; i++) |
111 | * 16 old-style INTA-cycle interrupts: | 116 | irq_set_chip_and_handler_name(i, chip, handle_level_irq, name); |
112 | */ | ||
113 | for (i = 0; i < legacy_pic->nr_legacy_irqs; i++) { | ||
114 | struct irq_desc *desc = irq_to_desc(i); | ||
115 | |||
116 | desc->status = IRQ_DISABLED; | ||
117 | desc->action = NULL; | ||
118 | desc->depth = 1; | ||
119 | |||
120 | set_irq_chip_and_handler_name(i, &i8259A_chip, | ||
121 | handle_level_irq, "XT"); | ||
122 | } | ||
123 | } | 117 | } |
124 | 118 | ||
125 | void __init init_IRQ(void) | 119 | void __init init_IRQ(void) |
@@ -127,6 +121,12 @@ void __init init_IRQ(void) | |||
127 | int i; | 121 | int i; |
128 | 122 | ||
129 | /* | 123 | /* |
124 | * We probably need a better place for this, but it works for | ||
125 | * now ... | ||
126 | */ | ||
127 | x86_add_irq_domains(); | ||
128 | |||
129 | /* | ||
130 | * On cpu 0, Assign IRQ0_VECTOR..IRQ15_VECTOR's to IRQ 0..15. | 130 | * On cpu 0, Assign IRQ0_VECTOR..IRQ15_VECTOR's to IRQ 0..15. |
131 | * If these IRQ's are handled by legacy interrupt-controllers like PIC, | 131 | * If these IRQ's are handled by legacy interrupt-controllers like PIC, |
132 | * then this configuration will likely be static after the boot. If | 132 | * then this configuration will likely be static after the boot. If |
@@ -173,14 +173,77 @@ static void __init smp_intr_init(void) | |||
173 | alloc_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt); | 173 | alloc_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt); |
174 | 174 | ||
175 | /* IPIs for invalidation */ | 175 | /* IPIs for invalidation */ |
176 | alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+0, invalidate_interrupt0); | 176 | #define ALLOC_INVTLB_VEC(NR) \ |
177 | alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+1, invalidate_interrupt1); | 177 | alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+NR, \ |
178 | alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+2, invalidate_interrupt2); | 178 | invalidate_interrupt##NR) |
179 | alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+3, invalidate_interrupt3); | 179 | |
180 | alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+4, invalidate_interrupt4); | 180 | switch (NUM_INVALIDATE_TLB_VECTORS) { |
181 | alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+5, invalidate_interrupt5); | 181 | default: |
182 | alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+6, invalidate_interrupt6); | 182 | ALLOC_INVTLB_VEC(31); |
183 | alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+7, invalidate_interrupt7); | 183 | case 31: |
184 | ALLOC_INVTLB_VEC(30); | ||
185 | case 30: | ||
186 | ALLOC_INVTLB_VEC(29); | ||
187 | case 29: | ||
188 | ALLOC_INVTLB_VEC(28); | ||
189 | case 28: | ||
190 | ALLOC_INVTLB_VEC(27); | ||
191 | case 27: | ||
192 | ALLOC_INVTLB_VEC(26); | ||
193 | case 26: | ||
194 | ALLOC_INVTLB_VEC(25); | ||
195 | case 25: | ||
196 | ALLOC_INVTLB_VEC(24); | ||
197 | case 24: | ||
198 | ALLOC_INVTLB_VEC(23); | ||
199 | case 23: | ||
200 | ALLOC_INVTLB_VEC(22); | ||
201 | case 22: | ||
202 | ALLOC_INVTLB_VEC(21); | ||
203 | case 21: | ||
204 | ALLOC_INVTLB_VEC(20); | ||
205 | case 20: | ||
206 | ALLOC_INVTLB_VEC(19); | ||
207 | case 19: | ||
208 | ALLOC_INVTLB_VEC(18); | ||
209 | case 18: | ||
210 | ALLOC_INVTLB_VEC(17); | ||
211 | case 17: | ||
212 | ALLOC_INVTLB_VEC(16); | ||
213 | case 16: | ||
214 | ALLOC_INVTLB_VEC(15); | ||
215 | case 15: | ||
216 | ALLOC_INVTLB_VEC(14); | ||
217 | case 14: | ||
218 | ALLOC_INVTLB_VEC(13); | ||
219 | case 13: | ||
220 | ALLOC_INVTLB_VEC(12); | ||
221 | case 12: | ||
222 | ALLOC_INVTLB_VEC(11); | ||
223 | case 11: | ||
224 | ALLOC_INVTLB_VEC(10); | ||
225 | case 10: | ||
226 | ALLOC_INVTLB_VEC(9); | ||
227 | case 9: | ||
228 | ALLOC_INVTLB_VEC(8); | ||
229 | case 8: | ||
230 | ALLOC_INVTLB_VEC(7); | ||
231 | case 7: | ||
232 | ALLOC_INVTLB_VEC(6); | ||
233 | case 6: | ||
234 | ALLOC_INVTLB_VEC(5); | ||
235 | case 5: | ||
236 | ALLOC_INVTLB_VEC(4); | ||
237 | case 4: | ||
238 | ALLOC_INVTLB_VEC(3); | ||
239 | case 3: | ||
240 | ALLOC_INVTLB_VEC(2); | ||
241 | case 2: | ||
242 | ALLOC_INVTLB_VEC(1); | ||
243 | case 1: | ||
244 | ALLOC_INVTLB_VEC(0); | ||
245 | break; | ||
246 | } | ||
184 | 247 | ||
185 | /* IPI for generic function call */ | 248 | /* IPI for generic function call */ |
186 | alloc_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt); | 249 | alloc_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt); |
@@ -227,9 +290,9 @@ static void __init apic_intr_init(void) | |||
227 | alloc_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt); | 290 | alloc_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt); |
228 | alloc_intr_gate(ERROR_APIC_VECTOR, error_interrupt); | 291 | alloc_intr_gate(ERROR_APIC_VECTOR, error_interrupt); |
229 | 292 | ||
230 | /* Performance monitoring interrupts: */ | 293 | /* IRQ work interrupts: */ |
231 | # ifdef CONFIG_PERF_EVENTS | 294 | # ifdef CONFIG_IRQ_WORK |
232 | alloc_intr_gate(LOCAL_PENDING_VECTOR, perf_pending_interrupt); | 295 | alloc_intr_gate(IRQ_WORK_VECTOR, irq_work_interrupt); |
233 | # endif | 296 | # endif |
234 | 297 | ||
235 | #endif | 298 | #endif |
@@ -255,7 +318,7 @@ void __init native_init_IRQ(void) | |||
255 | set_intr_gate(i, interrupt[i-FIRST_EXTERNAL_VECTOR]); | 318 | set_intr_gate(i, interrupt[i-FIRST_EXTERNAL_VECTOR]); |
256 | } | 319 | } |
257 | 320 | ||
258 | if (!acpi_ioapic) | 321 | if (!acpi_ioapic && !of_ioapic) |
259 | setup_irq(2, &irq2); | 322 | setup_irq(2, &irq2); |
260 | 323 | ||
261 | #ifdef CONFIG_X86_32 | 324 | #ifdef CONFIG_X86_32 |