x86: I/O APIC: unmask the second-chance timer interrupt

Unmask the timer interrupt line set up in the through-8259A mode
explicitly after setup_timer_IRQ0_pin() has set up the I/O APIC interrupt
redirection entry to let the two operations be unbound from each other.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

1 files changed, 1 insertions, 0 deletions

diff --git a/arch/x86/kernel/io_apic_64.c b/arch/x86/kernel/io_apic_64.c
index 6c4635fa97a6..0e20b7d7c1c7 100644
--- a/arch/x86/kernel/io_apic_64.c
+++ b/arch/x86/kernel/io_apic_64.c
@@ -1691,6 +1691,7 @@ static inline void __init check_timer(void)
                  * legacy devices should be connected to IO APIC #0
                  */
                 setup_timer_IRQ0_pin(apic2, pin2, cfg->vector);
+                unmask_IO_APIC_irq(0);
                 enable_8259A_irq(0);
                 if (timer_irq_works()) {
                         apic_printk(APIC_VERBOSE," works.\n");