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authorAlexey Starikovskiy <astarikovskiy@suse.de>2008-03-20 07:54:36 -0400
committerIngo Molnar <mingo@elte.hu>2008-04-17 11:40:59 -0400
commit6728801dce13f83ee7e1778b137ceebab61b71c4 (patch)
treee06eb8de31664f5ff41e46fe5596256aa73d81bf /arch/x86/kernel/io_apic_32.c
parent47cab822d6b25d8e130da00edef91ec3eef0efab (diff)
x86: use not_pci bitmap #4
Signed-off-by: Alexey Starikovskiy <astarikovskiy@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/io_apic_32.c')
-rw-r--r--arch/x86/kernel/io_apic_32.c48
1 files changed, 11 insertions, 37 deletions
diff --git a/arch/x86/kernel/io_apic_32.c b/arch/x86/kernel/io_apic_32.c
index efe8322edfba..2a609edd59f0 100644
--- a/arch/x86/kernel/io_apic_32.c
+++ b/arch/x86/kernel/io_apic_32.c
@@ -929,19 +929,19 @@ static int EISA_ELCR(unsigned int irq)
929 return 0; 929 return 0;
930} 930}
931 931
932/* ISA interrupts are always polarity zero edge triggered,
933 * when listed as conforming in the MP table. */
934
935#define default_ISA_trigger(idx) (0)
936#define default_ISA_polarity(idx) (0)
937
932/* EISA interrupts are always polarity zero and can be edge or level 938/* EISA interrupts are always polarity zero and can be edge or level
933 * trigger depending on the ELCR value. If an interrupt is listed as 939 * trigger depending on the ELCR value. If an interrupt is listed as
934 * EISA conforming in the MP table, that means its trigger type must 940 * EISA conforming in the MP table, that means its trigger type must
935 * be read in from the ELCR */ 941 * be read in from the ELCR */
936 942
937#define default_EISA_trigger(idx) (EISA_ELCR(mp_irqs[idx].mpc_srcbusirq)) 943#define default_EISA_trigger(idx) (EISA_ELCR(mp_irqs[idx].mpc_srcbusirq))
938#define default_EISA_polarity(idx) (0) 944#define default_EISA_polarity(idx) default_ISA_polarity(idx)
939
940/* ISA interrupts are always polarity zero edge triggered,
941 * when listed as conforming in the MP table. */
942
943#define default_ISA_trigger(idx) (0)
944#define default_ISA_polarity(idx) (0)
945 945
946/* PCI interrupts are always polarity one level triggered, 946/* PCI interrupts are always polarity one level triggered,
947 * when listed as conforming in the MP table. */ 947 * when listed as conforming in the MP table. */
@@ -953,7 +953,7 @@ static int EISA_ELCR(unsigned int irq)
953 * when listed as conforming in the MP table. */ 953 * when listed as conforming in the MP table. */
954 954
955#define default_MCA_trigger(idx) (1) 955#define default_MCA_trigger(idx) (1)
956#define default_MCA_polarity(idx) (0) 956#define default_MCA_polarity(idx) default_ISA_polarity(idx)
957 957
958static int MPBIOS_polarity(int idx) 958static int MPBIOS_polarity(int idx)
959{ 959{
@@ -967,35 +967,9 @@ static int MPBIOS_polarity(int idx)
967 { 967 {
968 case 0: /* conforms, ie. bus-type dependent polarity */ 968 case 0: /* conforms, ie. bus-type dependent polarity */
969 { 969 {
970 switch (mp_bus_id_to_type[bus]) 970 polarity = test_bit(bus, mp_bus_not_pci)?
971 { 971 default_ISA_polarity(idx):
972 case MP_BUS_ISA: /* ISA pin */ 972 default_PCI_polarity(idx);
973 {
974 polarity = default_ISA_polarity(idx);
975 break;
976 }
977 case MP_BUS_EISA: /* EISA pin */
978 {
979 polarity = default_EISA_polarity(idx);
980 break;
981 }
982 case MP_BUS_PCI: /* PCI pin */
983 {
984 polarity = default_PCI_polarity(idx);
985 break;
986 }
987 case MP_BUS_MCA: /* MCA pin */
988 {
989 polarity = default_MCA_polarity(idx);
990 break;
991 }
992 default:
993 {
994 printk(KERN_WARNING "broken BIOS!!\n");
995 polarity = 1;
996 break;
997 }
998 }
999 break; 973 break;
1000 } 974 }
1001 case 1: /* high active */ 975 case 1: /* high active */