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| author | Thomas Gleixner <tglx@linutronix.de> | 2010-06-28 16:33:13 -0400 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2010-06-28 16:33:24 -0400 |
| commit | f384c954c9fe3d3c6fce5ae66b67f2ddd947d098 (patch) | |
| tree | a38541b8083a2304435e9a153d408bd7cd44116e /arch/x86/kernel/cpu | |
| parent | 9a15a07fe2175dc25cd928a354b3839f562ac8cc (diff) | |
| parent | 5904b3b81d25166e5e39b9727645bb47937618e3 (diff) | |
Merge branch 'linus' into perf/core
Reason: Further changes conflict with upstream fixes
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/kernel/cpu')
| -rw-r--r-- | arch/x86/kernel/cpu/perf_event_intel.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c index fdbc652d3feb..214ac860ebe0 100644 --- a/arch/x86/kernel/cpu/perf_event_intel.c +++ b/arch/x86/kernel/cpu/perf_event_intel.c | |||
| @@ -72,6 +72,7 @@ static struct event_constraint intel_westmere_event_constraints[] = | |||
| 72 | INTEL_EVENT_CONSTRAINT(0x51, 0x3), /* L1D */ | 72 | INTEL_EVENT_CONSTRAINT(0x51, 0x3), /* L1D */ |
| 73 | INTEL_EVENT_CONSTRAINT(0x60, 0x1), /* OFFCORE_REQUESTS_OUTSTANDING */ | 73 | INTEL_EVENT_CONSTRAINT(0x60, 0x1), /* OFFCORE_REQUESTS_OUTSTANDING */ |
| 74 | INTEL_EVENT_CONSTRAINT(0x63, 0x3), /* CACHE_LOCK_CYCLES */ | 74 | INTEL_EVENT_CONSTRAINT(0x63, 0x3), /* CACHE_LOCK_CYCLES */ |
| 75 | INTEL_EVENT_CONSTRAINT(0xb3, 0x1), /* SNOOPQ_REQUEST_OUTSTANDING */ | ||
| 75 | EVENT_CONSTRAINT_END | 76 | EVENT_CONSTRAINT_END |
| 76 | }; | 77 | }; |
| 77 | 78 | ||
