diff options
author | Stephane Eranian <eranian@google.com> | 2012-08-20 05:24:21 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@kernel.org> | 2012-09-04 11:29:23 -0400 |
commit | 3ec18cd8b8f8395d0df604c62ab3bc2cf3a966b4 (patch) | |
tree | 996703f06010d84c9d1982631d5b3ef66d327fcd /arch/x86/kernel/cpu/perf_event_intel_lbr.c | |
parent | a6fa941d94b411bbd2b6421ffbde6db3c93e65ab (diff) |
perf/x86: Enable Intel Cedarview Atom suppport
This patch enables perf_events support for Intel Cedarview
Atom (model 54) processors. Support includes PEBS and LBR.
Tested on my Atom N2600 netbook.
Signed-off-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/20120820092421.GA11284@quad
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/kernel/cpu/perf_event_intel_lbr.c')
-rw-r--r-- | arch/x86/kernel/cpu/perf_event_intel_lbr.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_intel_lbr.c b/arch/x86/kernel/cpu/perf_event_intel_lbr.c index 520b4265fcd2..da02e9cc3754 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_lbr.c +++ b/arch/x86/kernel/cpu/perf_event_intel_lbr.c | |||
@@ -686,7 +686,8 @@ void intel_pmu_lbr_init_atom(void) | |||
686 | * to have an operational LBR which can freeze | 686 | * to have an operational LBR which can freeze |
687 | * on PMU interrupt | 687 | * on PMU interrupt |
688 | */ | 688 | */ |
689 | if (boot_cpu_data.x86_mask < 10) { | 689 | if (boot_cpu_data.x86_model == 28 |
690 | && boot_cpu_data.x86_mask < 10) { | ||
690 | pr_cont("LBR disabled due to erratum"); | 691 | pr_cont("LBR disabled due to erratum"); |
691 | return; | 692 | return; |
692 | } | 693 | } |