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authorArnd Bergmann <arnd@arndb.de>2014-03-17 10:17:07 -0400
committerArnd Bergmann <arnd@arndb.de>2014-03-17 10:17:07 -0400
commit38edc2da5014e70e46a724d97c3ef3dde106331b (patch)
tree590499bacd062e8dd74c6f05a7d811dd714a2d70 /arch/x86/kernel/cpu/perf_event_intel.c
parent937b5991ca7717ceba99014f2ad3f51c85cdb9ad (diff)
parent28b191118c11719bb27db621425a70be28a40e08 (diff)
Merge tag 'omap-for-v3.15/dt-overo-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Updates to the .dts files to support more Gumstix boards. These are sent separately from the rest of the .dts changes as these depend on the fixes merged into v3.14-rc4, and needed a bit more time to get updated on the fixes. * tag 'omap-for-v3.15/dt-overo-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: Add support for the Overo Summit ARM: dts: Add support for the Overo Chestnut43 ARM: dts: Add support for the Overo Alto35 ARM: dts: Add support for the Overo Gallop43 ARM: dts: Add support for the Overo Palo43 ARM: dts: overo: Add LIS33DE accelerometer ARM: dts: overo: Create a file for common Gumstix peripherals ARM: dts: overo: Push uart3 pinmux down to expansion board ARM: dts: omap3-tobi: Add AT24C01 EEPROM ARM: dts: omap3-tobi: Use include file omap-gpmc-smsc9221 ARM: dts: omap: Add common file for SMSC9221 ARM: dts: omap3-overo: Add HSUSB PHY ARM: dts: omap3-overo: Enable WiFi/BT combo ARM: dts: omap3-overo: Add missing pinctrl ARM: dts: omap3-tobi: Add missing pinctrl ARM: dts: overo: reorganize include files Signed-off-by: Arnd Bergmann <arnd@arndb.de> Conflicts: arch/arm/boot/dts/omap3-overo.dtsi
Diffstat (limited to 'arch/x86/kernel/cpu/perf_event_intel.c')
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel.c11
1 files changed, 3 insertions, 8 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 0fa4f242f050..aa333d966886 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -1361,10 +1361,8 @@ static int intel_pmu_handle_irq(struct pt_regs *regs)
1361 intel_pmu_disable_all(); 1361 intel_pmu_disable_all();
1362 handled = intel_pmu_drain_bts_buffer(); 1362 handled = intel_pmu_drain_bts_buffer();
1363 status = intel_pmu_get_status(); 1363 status = intel_pmu_get_status();
1364 if (!status) { 1364 if (!status)
1365 intel_pmu_enable_all(0); 1365 goto done;
1366 return handled;
1367 }
1368 1366
1369 loops = 0; 1367 loops = 0;
1370again: 1368again:
@@ -2310,10 +2308,7 @@ __init int intel_pmu_init(void)
2310 if (version > 1) 2308 if (version > 1)
2311 x86_pmu.num_counters_fixed = max((int)edx.split.num_counters_fixed, 3); 2309 x86_pmu.num_counters_fixed = max((int)edx.split.num_counters_fixed, 3);
2312 2310
2313 /* 2311 if (boot_cpu_has(X86_FEATURE_PDCM)) {
2314 * v2 and above have a perf capabilities MSR
2315 */
2316 if (version > 1) {
2317 u64 capabilities; 2312 u64 capabilities;
2318 2313
2319 rdmsrl(MSR_IA32_PERF_CAPABILITIES, capabilities); 2314 rdmsrl(MSR_IA32_PERF_CAPABILITIES, capabilities);