diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-06-10 18:49:36 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-06-10 18:49:36 -0400 |
commit | 7dc3ca39cb1e22eedbf1207ff9ac7bf682fc0f6d (patch) | |
tree | 6303897c21de6d7c39e14160b5c0d5f5548d2cee /arch/x86/kernel/cpu/mtrr | |
parent | aa98936e4f423dc2706771368598b04870059d14 (diff) | |
parent | a4046f8d299e00e9855ae292527c2d66a42670eb (diff) |
Merge branch 'x86-cleanups-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-cleanups-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
x86, nmi: Use predefined numbers instead of hardcoded one
x86: asm/processor.h: remove double declaration
x86, mtrr: replace MTRRdefType_MSR with msr-index's MSR_MTRRdefType
x86, mtrr: replace MTRRfix4K_C0000_MSR with msr-index's MSR_MTRRfix4K_C0000
x86, mtrr: remove mtrr MSRs double declaration
x86, mtrr: replace MTRRfix16K_80000_MSR with msr-index's MSR_MTRRfix16K_80000
x86, mtrr: replace MTRRfix64K_00000_MSR with msr-index's MSR_MTRRfix64K_00000
x86, mtrr: replace MTRRcap_MSR with msr-index's MSR_MTRRcap
x86: mce: remove duplicated #include
x86: msr-index.h remove duplicate MSR C001_0015 declaration
x86: clean up arch/x86/kernel/tsc_sync.c a bit
x86: use symbolic name for VM86_SIGNAL when used as vm86 default return
x86: added 'ifndef _ASM_X86_IOMAP_H' to iomap.h
x86: avoid multiple declaration of kstack_depth_to_print
x86: vdso/vma.c declare vdso_enabled and arch_setup_additional_pages before they get used
x86: clean up declarations and variables
x86: apic/x2apic_cluster.c x86_cpu_to_logical_apicid should be static
x86 early quirks: eliminate unused function
Diffstat (limited to 'arch/x86/kernel/cpu/mtrr')
-rw-r--r-- | arch/x86/kernel/cpu/mtrr/cleanup.c | 4 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/mtrr/generic.c | 24 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/mtrr/main.c | 2 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/mtrr/mtrr.h | 15 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/mtrr/state.c | 6 |
5 files changed, 18 insertions, 33 deletions
diff --git a/arch/x86/kernel/cpu/mtrr/cleanup.c b/arch/x86/kernel/cpu/mtrr/cleanup.c index ce0fe4b5c04f..1d584a18a50d 100644 --- a/arch/x86/kernel/cpu/mtrr/cleanup.c +++ b/arch/x86/kernel/cpu/mtrr/cleanup.c | |||
@@ -808,7 +808,7 @@ int __init mtrr_cleanup(unsigned address_bits) | |||
808 | 808 | ||
809 | if (!is_cpu(INTEL) || enable_mtrr_cleanup < 1) | 809 | if (!is_cpu(INTEL) || enable_mtrr_cleanup < 1) |
810 | return 0; | 810 | return 0; |
811 | rdmsr(MTRRdefType_MSR, def, dummy); | 811 | rdmsr(MSR_MTRRdefType, def, dummy); |
812 | def &= 0xff; | 812 | def &= 0xff; |
813 | if (def != MTRR_TYPE_UNCACHABLE) | 813 | if (def != MTRR_TYPE_UNCACHABLE) |
814 | return 0; | 814 | return 0; |
@@ -1003,7 +1003,7 @@ int __init mtrr_trim_uncached_memory(unsigned long end_pfn) | |||
1003 | */ | 1003 | */ |
1004 | if (!is_cpu(INTEL) || disable_mtrr_trim) | 1004 | if (!is_cpu(INTEL) || disable_mtrr_trim) |
1005 | return 0; | 1005 | return 0; |
1006 | rdmsr(MTRRdefType_MSR, def, dummy); | 1006 | rdmsr(MSR_MTRRdefType, def, dummy); |
1007 | def &= 0xff; | 1007 | def &= 0xff; |
1008 | if (def != MTRR_TYPE_UNCACHABLE) | 1008 | if (def != MTRR_TYPE_UNCACHABLE) |
1009 | return 0; | 1009 | return 0; |
diff --git a/arch/x86/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c index d21d4fb161f7..0543f69f0b27 100644 --- a/arch/x86/kernel/cpu/mtrr/generic.c +++ b/arch/x86/kernel/cpu/mtrr/generic.c | |||
@@ -20,9 +20,9 @@ struct fixed_range_block { | |||
20 | }; | 20 | }; |
21 | 21 | ||
22 | static struct fixed_range_block fixed_range_blocks[] = { | 22 | static struct fixed_range_block fixed_range_blocks[] = { |
23 | { MTRRfix64K_00000_MSR, 1 }, /* one 64k MTRR */ | 23 | { MSR_MTRRfix64K_00000, 1 }, /* one 64k MTRR */ |
24 | { MTRRfix16K_80000_MSR, 2 }, /* two 16k MTRRs */ | 24 | { MSR_MTRRfix16K_80000, 2 }, /* two 16k MTRRs */ |
25 | { MTRRfix4K_C0000_MSR, 8 }, /* eight 4k MTRRs */ | 25 | { MSR_MTRRfix4K_C0000, 8 }, /* eight 4k MTRRs */ |
26 | {} | 26 | {} |
27 | }; | 27 | }; |
28 | 28 | ||
@@ -194,12 +194,12 @@ get_fixed_ranges(mtrr_type * frs) | |||
194 | 194 | ||
195 | k8_check_syscfg_dram_mod_en(); | 195 | k8_check_syscfg_dram_mod_en(); |
196 | 196 | ||
197 | rdmsr(MTRRfix64K_00000_MSR, p[0], p[1]); | 197 | rdmsr(MSR_MTRRfix64K_00000, p[0], p[1]); |
198 | 198 | ||
199 | for (i = 0; i < 2; i++) | 199 | for (i = 0; i < 2; i++) |
200 | rdmsr(MTRRfix16K_80000_MSR + i, p[2 + i * 2], p[3 + i * 2]); | 200 | rdmsr(MSR_MTRRfix16K_80000 + i, p[2 + i * 2], p[3 + i * 2]); |
201 | for (i = 0; i < 8; i++) | 201 | for (i = 0; i < 8; i++) |
202 | rdmsr(MTRRfix4K_C0000_MSR + i, p[6 + i * 2], p[7 + i * 2]); | 202 | rdmsr(MSR_MTRRfix4K_C0000 + i, p[6 + i * 2], p[7 + i * 2]); |
203 | } | 203 | } |
204 | 204 | ||
205 | void mtrr_save_fixed_ranges(void *info) | 205 | void mtrr_save_fixed_ranges(void *info) |
@@ -310,7 +310,7 @@ void __init get_mtrr_state(void) | |||
310 | 310 | ||
311 | vrs = mtrr_state.var_ranges; | 311 | vrs = mtrr_state.var_ranges; |
312 | 312 | ||
313 | rdmsr(MTRRcap_MSR, lo, dummy); | 313 | rdmsr(MSR_MTRRcap, lo, dummy); |
314 | mtrr_state.have_fixed = (lo >> 8) & 1; | 314 | mtrr_state.have_fixed = (lo >> 8) & 1; |
315 | 315 | ||
316 | for (i = 0; i < num_var_ranges; i++) | 316 | for (i = 0; i < num_var_ranges; i++) |
@@ -318,7 +318,7 @@ void __init get_mtrr_state(void) | |||
318 | if (mtrr_state.have_fixed) | 318 | if (mtrr_state.have_fixed) |
319 | get_fixed_ranges(mtrr_state.fixed_ranges); | 319 | get_fixed_ranges(mtrr_state.fixed_ranges); |
320 | 320 | ||
321 | rdmsr(MTRRdefType_MSR, lo, dummy); | 321 | rdmsr(MSR_MTRRdefType, lo, dummy); |
322 | mtrr_state.def_type = (lo & 0xff); | 322 | mtrr_state.def_type = (lo & 0xff); |
323 | mtrr_state.enabled = (lo & 0xc00) >> 10; | 323 | mtrr_state.enabled = (lo & 0xc00) >> 10; |
324 | 324 | ||
@@ -583,10 +583,10 @@ static void prepare_set(void) __acquires(set_atomicity_lock) | |||
583 | __flush_tlb(); | 583 | __flush_tlb(); |
584 | 584 | ||
585 | /* Save MTRR state */ | 585 | /* Save MTRR state */ |
586 | rdmsr(MTRRdefType_MSR, deftype_lo, deftype_hi); | 586 | rdmsr(MSR_MTRRdefType, deftype_lo, deftype_hi); |
587 | 587 | ||
588 | /* Disable MTRRs, and set the default type to uncached */ | 588 | /* Disable MTRRs, and set the default type to uncached */ |
589 | mtrr_wrmsr(MTRRdefType_MSR, deftype_lo & ~0xcff, deftype_hi); | 589 | mtrr_wrmsr(MSR_MTRRdefType, deftype_lo & ~0xcff, deftype_hi); |
590 | } | 590 | } |
591 | 591 | ||
592 | static void post_set(void) __releases(set_atomicity_lock) | 592 | static void post_set(void) __releases(set_atomicity_lock) |
@@ -595,7 +595,7 @@ static void post_set(void) __releases(set_atomicity_lock) | |||
595 | __flush_tlb(); | 595 | __flush_tlb(); |
596 | 596 | ||
597 | /* Intel (P6) standard MTRRs */ | 597 | /* Intel (P6) standard MTRRs */ |
598 | mtrr_wrmsr(MTRRdefType_MSR, deftype_lo, deftype_hi); | 598 | mtrr_wrmsr(MSR_MTRRdefType, deftype_lo, deftype_hi); |
599 | 599 | ||
600 | /* Enable caches */ | 600 | /* Enable caches */ |
601 | write_cr0(read_cr0() & 0xbfffffff); | 601 | write_cr0(read_cr0() & 0xbfffffff); |
@@ -707,7 +707,7 @@ int generic_validate_add_page(unsigned long base, unsigned long size, unsigned i | |||
707 | static int generic_have_wrcomb(void) | 707 | static int generic_have_wrcomb(void) |
708 | { | 708 | { |
709 | unsigned long config, dummy; | 709 | unsigned long config, dummy; |
710 | rdmsr(MTRRcap_MSR, config, dummy); | 710 | rdmsr(MSR_MTRRcap, config, dummy); |
711 | return (config & (1 << 10)); | 711 | return (config & (1 << 10)); |
712 | } | 712 | } |
713 | 713 | ||
diff --git a/arch/x86/kernel/cpu/mtrr/main.c b/arch/x86/kernel/cpu/mtrr/main.c index 03cda01f57c7..8fc248b5aeaf 100644 --- a/arch/x86/kernel/cpu/mtrr/main.c +++ b/arch/x86/kernel/cpu/mtrr/main.c | |||
@@ -104,7 +104,7 @@ static void __init set_num_var_ranges(void) | |||
104 | unsigned long config = 0, dummy; | 104 | unsigned long config = 0, dummy; |
105 | 105 | ||
106 | if (use_intel()) { | 106 | if (use_intel()) { |
107 | rdmsr(MTRRcap_MSR, config, dummy); | 107 | rdmsr(MSR_MTRRcap, config, dummy); |
108 | } else if (is_cpu(AMD)) | 108 | } else if (is_cpu(AMD)) |
109 | config = 2; | 109 | config = 2; |
110 | else if (is_cpu(CYRIX) || is_cpu(CENTAUR)) | 110 | else if (is_cpu(CYRIX) || is_cpu(CENTAUR)) |
diff --git a/arch/x86/kernel/cpu/mtrr/mtrr.h b/arch/x86/kernel/cpu/mtrr/mtrr.h index 77f67f7b347a..7538b767f206 100644 --- a/arch/x86/kernel/cpu/mtrr/mtrr.h +++ b/arch/x86/kernel/cpu/mtrr/mtrr.h | |||
@@ -5,21 +5,6 @@ | |||
5 | #include <linux/types.h> | 5 | #include <linux/types.h> |
6 | #include <linux/stddef.h> | 6 | #include <linux/stddef.h> |
7 | 7 | ||
8 | #define MTRRcap_MSR 0x0fe | ||
9 | #define MTRRdefType_MSR 0x2ff | ||
10 | |||
11 | #define MTRRfix64K_00000_MSR 0x250 | ||
12 | #define MTRRfix16K_80000_MSR 0x258 | ||
13 | #define MTRRfix16K_A0000_MSR 0x259 | ||
14 | #define MTRRfix4K_C0000_MSR 0x268 | ||
15 | #define MTRRfix4K_C8000_MSR 0x269 | ||
16 | #define MTRRfix4K_D0000_MSR 0x26a | ||
17 | #define MTRRfix4K_D8000_MSR 0x26b | ||
18 | #define MTRRfix4K_E0000_MSR 0x26c | ||
19 | #define MTRRfix4K_E8000_MSR 0x26d | ||
20 | #define MTRRfix4K_F0000_MSR 0x26e | ||
21 | #define MTRRfix4K_F8000_MSR 0x26f | ||
22 | |||
23 | #define MTRR_CHANGE_MASK_FIXED 0x01 | 8 | #define MTRR_CHANGE_MASK_FIXED 0x01 |
24 | #define MTRR_CHANGE_MASK_VARIABLE 0x02 | 9 | #define MTRR_CHANGE_MASK_VARIABLE 0x02 |
25 | #define MTRR_CHANGE_MASK_DEFTYPE 0x04 | 10 | #define MTRR_CHANGE_MASK_DEFTYPE 0x04 |
diff --git a/arch/x86/kernel/cpu/mtrr/state.c b/arch/x86/kernel/cpu/mtrr/state.c index 7f7e2753685b..1f5fb1588d1f 100644 --- a/arch/x86/kernel/cpu/mtrr/state.c +++ b/arch/x86/kernel/cpu/mtrr/state.c | |||
@@ -35,7 +35,7 @@ void set_mtrr_prepare_save(struct set_mtrr_context *ctxt) | |||
35 | 35 | ||
36 | if (use_intel()) | 36 | if (use_intel()) |
37 | /* Save MTRR state */ | 37 | /* Save MTRR state */ |
38 | rdmsr(MTRRdefType_MSR, ctxt->deftype_lo, ctxt->deftype_hi); | 38 | rdmsr(MSR_MTRRdefType, ctxt->deftype_lo, ctxt->deftype_hi); |
39 | else | 39 | else |
40 | /* Cyrix ARRs - everything else were excluded at the top */ | 40 | /* Cyrix ARRs - everything else were excluded at the top */ |
41 | ctxt->ccr3 = getCx86(CX86_CCR3); | 41 | ctxt->ccr3 = getCx86(CX86_CCR3); |
@@ -46,7 +46,7 @@ void set_mtrr_cache_disable(struct set_mtrr_context *ctxt) | |||
46 | { | 46 | { |
47 | if (use_intel()) | 47 | if (use_intel()) |
48 | /* Disable MTRRs, and set the default type to uncached */ | 48 | /* Disable MTRRs, and set the default type to uncached */ |
49 | mtrr_wrmsr(MTRRdefType_MSR, ctxt->deftype_lo & 0xf300UL, | 49 | mtrr_wrmsr(MSR_MTRRdefType, ctxt->deftype_lo & 0xf300UL, |
50 | ctxt->deftype_hi); | 50 | ctxt->deftype_hi); |
51 | else if (is_cpu(CYRIX)) | 51 | else if (is_cpu(CYRIX)) |
52 | /* Cyrix ARRs - everything else were excluded at the top */ | 52 | /* Cyrix ARRs - everything else were excluded at the top */ |
@@ -64,7 +64,7 @@ void set_mtrr_done(struct set_mtrr_context *ctxt) | |||
64 | /* Restore MTRRdefType */ | 64 | /* Restore MTRRdefType */ |
65 | if (use_intel()) | 65 | if (use_intel()) |
66 | /* Intel (P6) standard MTRRs */ | 66 | /* Intel (P6) standard MTRRs */ |
67 | mtrr_wrmsr(MTRRdefType_MSR, ctxt->deftype_lo, ctxt->deftype_hi); | 67 | mtrr_wrmsr(MSR_MTRRdefType, ctxt->deftype_lo, ctxt->deftype_hi); |
68 | else | 68 | else |
69 | /* Cyrix ARRs - everything else was excluded at the top */ | 69 | /* Cyrix ARRs - everything else was excluded at the top */ |
70 | setCx86(CX86_CCR3, ctxt->ccr3); | 70 | setCx86(CX86_CCR3, ctxt->ccr3); |