diff options
author | Venki Pallipadi <venkatesh.pallipadi@intel.com> | 2008-05-12 09:43:34 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-05-12 15:27:55 -0400 |
commit | 8edc5cc5ec880c96de8e6686fb0d7a5231e91c05 (patch) | |
tree | 2ed7bdeca3e4e57d611614a33b672865a91167ae /arch/x86/kernel/cpu/mcheck | |
parent | 492c2e476eac010962850006c49df326919b284c (diff) |
x86: remove 6 bank limitation in 64 bit MCE reporting code
Eliminate the 6 bank restriction in 64 bit mce reporting code. This
restriction is artificial (due to static creation of sysfs files) and 32
bit code does not have any such restriction.
This change helps in reporting the details of machine checks on a
machine check exception with errors in bank 6 and above on CPUs that
support those banks. Without the patch, machine check errors in those
banks are not reported.
We still have 128 (MCE_EXTENDED_BANK) bank restriction instead of max
256 supported in hardware. That is not changed in the patch below as it
will have some user level mcelog utility dependency, with bank 128 being
used for thermal reporting currently.
The patch below does not create sysfs control (bankNctl) for banks
higher than 6 as well. That needs some pre-cleanup in /sysfs mce layout,
removal of per cpu /sysfs entries for bankctl as they are really global
system level control today. That change will follow. This basic change
is critical to report the detailed errors on banks higher than 6.
Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/cpu/mcheck')
-rw-r--r-- | arch/x86/kernel/cpu/mcheck/mce_64.c | 20 |
1 files changed, 12 insertions, 8 deletions
diff --git a/arch/x86/kernel/cpu/mcheck/mce_64.c b/arch/x86/kernel/cpu/mcheck/mce_64.c index e07e8c068ae0..f1f3f5e163b7 100644 --- a/arch/x86/kernel/cpu/mcheck/mce_64.c +++ b/arch/x86/kernel/cpu/mcheck/mce_64.c | |||
@@ -31,7 +31,7 @@ | |||
31 | #include <asm/idle.h> | 31 | #include <asm/idle.h> |
32 | 32 | ||
33 | #define MISC_MCELOG_MINOR 227 | 33 | #define MISC_MCELOG_MINOR 227 |
34 | #define NR_BANKS 6 | 34 | #define NR_SYSFS_BANKS 6 |
35 | 35 | ||
36 | atomic_t mce_entry; | 36 | atomic_t mce_entry; |
37 | 37 | ||
@@ -46,7 +46,7 @@ static int mce_dont_init; | |||
46 | */ | 46 | */ |
47 | static int tolerant = 1; | 47 | static int tolerant = 1; |
48 | static int banks; | 48 | static int banks; |
49 | static unsigned long bank[NR_BANKS] = { [0 ... NR_BANKS-1] = ~0UL }; | 49 | static unsigned long bank[NR_SYSFS_BANKS] = { [0 ... NR_SYSFS_BANKS-1] = ~0UL }; |
50 | static unsigned long notify_user; | 50 | static unsigned long notify_user; |
51 | static int rip_msr; | 51 | static int rip_msr; |
52 | static int mce_bootlog = -1; | 52 | static int mce_bootlog = -1; |
@@ -209,7 +209,7 @@ void do_machine_check(struct pt_regs * regs, long error_code) | |||
209 | barrier(); | 209 | barrier(); |
210 | 210 | ||
211 | for (i = 0; i < banks; i++) { | 211 | for (i = 0; i < banks; i++) { |
212 | if (!bank[i]) | 212 | if (i < NR_SYSFS_BANKS && !bank[i]) |
213 | continue; | 213 | continue; |
214 | 214 | ||
215 | m.misc = 0; | 215 | m.misc = 0; |
@@ -444,9 +444,10 @@ static void mce_init(void *dummy) | |||
444 | 444 | ||
445 | rdmsrl(MSR_IA32_MCG_CAP, cap); | 445 | rdmsrl(MSR_IA32_MCG_CAP, cap); |
446 | banks = cap & 0xff; | 446 | banks = cap & 0xff; |
447 | if (banks > NR_BANKS) { | 447 | if (banks > MCE_EXTENDED_BANK) { |
448 | printk(KERN_INFO "MCE: warning: using only %d banks\n", banks); | 448 | printk(KERN_INFO "MCE: warning: using only %d banks\n", |
449 | banks = NR_BANKS; | 449 | MCE_EXTENDED_BANK); |
450 | banks = MCE_EXTENDED_BANK; | ||
450 | } | 451 | } |
451 | /* Use accurate RIP reporting if available. */ | 452 | /* Use accurate RIP reporting if available. */ |
452 | if ((cap & (1<<9)) && ((cap >> 16) & 0xff) >= 9) | 453 | if ((cap & (1<<9)) && ((cap >> 16) & 0xff) >= 9) |
@@ -462,7 +463,7 @@ static void mce_init(void *dummy) | |||
462 | wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff); | 463 | wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff); |
463 | 464 | ||
464 | for (i = 0; i < banks; i++) { | 465 | for (i = 0; i < banks; i++) { |
465 | wrmsrl(MSR_IA32_MC0_CTL+4*i, bank[i]); | 466 | wrmsrl(MSR_IA32_MC0_CTL+4*i, ~0UL); |
466 | wrmsrl(MSR_IA32_MC0_STATUS+4*i, 0); | 467 | wrmsrl(MSR_IA32_MC0_STATUS+4*i, 0); |
467 | } | 468 | } |
468 | } | 469 | } |
@@ -766,7 +767,10 @@ DEFINE_PER_CPU(struct sys_device, device_mce); | |||
766 | } \ | 767 | } \ |
767 | static SYSDEV_ATTR(name, 0644, show_ ## name, set_ ## name); | 768 | static SYSDEV_ATTR(name, 0644, show_ ## name, set_ ## name); |
768 | 769 | ||
769 | /* TBD should generate these dynamically based on number of available banks */ | 770 | /* |
771 | * TBD should generate these dynamically based on number of available banks. | ||
772 | * Have only 6 contol banks in /sysfs until then. | ||
773 | */ | ||
770 | ACCESSOR(bank0ctl,bank[0],mce_restart()) | 774 | ACCESSOR(bank0ctl,bank[0],mce_restart()) |
771 | ACCESSOR(bank1ctl,bank[1],mce_restart()) | 775 | ACCESSOR(bank1ctl,bank[1],mce_restart()) |
772 | ACCESSOR(bank2ctl,bank[2],mce_restart()) | 776 | ACCESSOR(bank2ctl,bank[2],mce_restart()) |