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authorBorislav Petkov <bp@alien8.de>2012-10-17 06:05:33 -0400
committerBorislav Petkov <bp@alien8.de>2012-10-26 08:37:58 -0400
commit1462594bf2866c1dc80066ed6f49f4331c551901 (patch)
tree361b807d85cde6b70ccc232f9aaf4079793a63b1 /arch/x86/kernel/cpu/mcheck
parent7af19e4afdafa4adb5fffc569d5bb1c5e568ba98 (diff)
x86, MCA: Finish mca_config conversion
mce_ser, mce_bios_cmci_threshold and mce_disabled are the last three bools which need conversion. Move them to the mca_config struct and adjust usage sites accordingly. Signed-off-by: Borislav Petkov <bp@alien8.de> Acked-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/x86/kernel/cpu/mcheck')
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce-internal.h2
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce-severity.c4
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce.c36
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce_intel.c6
4 files changed, 21 insertions, 27 deletions
diff --git a/arch/x86/kernel/cpu/mcheck/mce-internal.h b/arch/x86/kernel/cpu/mcheck/mce-internal.h
index 6a05c1d327a9..5b7d4fa5d3b7 100644
--- a/arch/x86/kernel/cpu/mcheck/mce-internal.h
+++ b/arch/x86/kernel/cpu/mcheck/mce-internal.h
@@ -24,8 +24,6 @@ struct mce_bank {
24int mce_severity(struct mce *a, int tolerant, char **msg); 24int mce_severity(struct mce *a, int tolerant, char **msg);
25struct dentry *mce_get_debugfs_dir(void); 25struct dentry *mce_get_debugfs_dir(void);
26 26
27extern int mce_ser;
28
29extern struct mce_bank *mce_banks; 27extern struct mce_bank *mce_banks;
30 28
31#ifdef CONFIG_X86_MCE_INTEL 29#ifdef CONFIG_X86_MCE_INTEL
diff --git a/arch/x86/kernel/cpu/mcheck/mce-severity.c b/arch/x86/kernel/cpu/mcheck/mce-severity.c
index 13017626f9a8..beb1f1689e52 100644
--- a/arch/x86/kernel/cpu/mcheck/mce-severity.c
+++ b/arch/x86/kernel/cpu/mcheck/mce-severity.c
@@ -193,9 +193,9 @@ int mce_severity(struct mce *m, int tolerant, char **msg)
193 continue; 193 continue;
194 if ((m->mcgstatus & s->mcgmask) != s->mcgres) 194 if ((m->mcgstatus & s->mcgmask) != s->mcgres)
195 continue; 195 continue;
196 if (s->ser == SER_REQUIRED && !mce_ser) 196 if (s->ser == SER_REQUIRED && !mca_cfg.ser)
197 continue; 197 continue;
198 if (s->ser == NO_SER && mce_ser) 198 if (s->ser == NO_SER && mca_cfg.ser)
199 continue; 199 continue;
200 if (s->context && ctx != s->context) 200 if (s->context && ctx != s->context)
201 continue; 201 continue;
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 8c7a90d89852..80dbda84f1c3 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -58,18 +58,13 @@ static DEFINE_MUTEX(mce_chrdev_read_mutex);
58#define CREATE_TRACE_POINTS 58#define CREATE_TRACE_POINTS
59#include <trace/events/mce.h> 59#include <trace/events/mce.h>
60 60
61int mce_disabled __read_mostly;
62
63#define SPINUNIT 100 /* 100ns */ 61#define SPINUNIT 100 /* 100ns */
64 62
65atomic_t mce_entry; 63atomic_t mce_entry;
66 64
67DEFINE_PER_CPU(unsigned, mce_exception_count); 65DEFINE_PER_CPU(unsigned, mce_exception_count);
68 66
69int mce_ser __read_mostly; 67struct mce_bank *mce_banks __read_mostly;
70int mce_bios_cmci_threshold __read_mostly;
71
72struct mce_bank *mce_banks __read_mostly;
73 68
74struct mca_config mca_cfg __read_mostly = { 69struct mca_config mca_cfg __read_mostly = {
75 .bootlog = -1, 70 .bootlog = -1,
@@ -510,7 +505,7 @@ static int mce_ring_add(unsigned long pfn)
510 505
511int mce_available(struct cpuinfo_x86 *c) 506int mce_available(struct cpuinfo_x86 *c)
512{ 507{
513 if (mce_disabled) 508 if (mca_cfg.disabled)
514 return 0; 509 return 0;
515 return cpu_has(c, X86_FEATURE_MCE) && cpu_has(c, X86_FEATURE_MCA); 510 return cpu_has(c, X86_FEATURE_MCE) && cpu_has(c, X86_FEATURE_MCA);
516} 511}
@@ -562,7 +557,7 @@ static void mce_read_aux(struct mce *m, int i)
562 /* 557 /*
563 * Mask the reported address by the reported granularity. 558 * Mask the reported address by the reported granularity.
564 */ 559 */
565 if (mce_ser && (m->status & MCI_STATUS_MISCV)) { 560 if (mca_cfg.ser && (m->status & MCI_STATUS_MISCV)) {
566 u8 shift = MCI_MISC_ADDR_LSB(m->misc); 561 u8 shift = MCI_MISC_ADDR_LSB(m->misc);
567 m->addr >>= shift; 562 m->addr >>= shift;
568 m->addr <<= shift; 563 m->addr <<= shift;
@@ -617,7 +612,7 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
617 * TBD do the same check for MCI_STATUS_EN here? 612 * TBD do the same check for MCI_STATUS_EN here?
618 */ 613 */
619 if (!(flags & MCP_UC) && 614 if (!(flags & MCP_UC) &&
620 (m.status & (mce_ser ? MCI_STATUS_S : MCI_STATUS_UC))) 615 (m.status & (mca_cfg.ser ? MCI_STATUS_S : MCI_STATUS_UC)))
621 continue; 616 continue;
622 617
623 mce_read_aux(&m, i); 618 mce_read_aux(&m, i);
@@ -1009,6 +1004,7 @@ static void mce_clear_info(struct mce_info *mi)
1009 */ 1004 */
1010void do_machine_check(struct pt_regs *regs, long error_code) 1005void do_machine_check(struct pt_regs *regs, long error_code)
1011{ 1006{
1007 struct mca_config *cfg = &mca_cfg;
1012 struct mce m, *final; 1008 struct mce m, *final;
1013 int i; 1009 int i;
1014 int worst = 0; 1010 int worst = 0;
@@ -1036,7 +1032,7 @@ void do_machine_check(struct pt_regs *regs, long error_code)
1036 1032
1037 this_cpu_inc(mce_exception_count); 1033 this_cpu_inc(mce_exception_count);
1038 1034
1039 if (!mca_cfg.banks) 1035 if (!cfg->banks)
1040 goto out; 1036 goto out;
1041 1037
1042 mce_gather_info(&m, regs); 1038 mce_gather_info(&m, regs);
@@ -1063,7 +1059,7 @@ void do_machine_check(struct pt_regs *regs, long error_code)
1063 * because the first one to see it will clear it. 1059 * because the first one to see it will clear it.
1064 */ 1060 */
1065 order = mce_start(&no_way_out); 1061 order = mce_start(&no_way_out);
1066 for (i = 0; i < mca_cfg.banks; i++) { 1062 for (i = 0; i < cfg->banks; i++) {
1067 __clear_bit(i, toclear); 1063 __clear_bit(i, toclear);
1068 if (!test_bit(i, valid_banks)) 1064 if (!test_bit(i, valid_banks))
1069 continue; 1065 continue;
@@ -1082,7 +1078,7 @@ void do_machine_check(struct pt_regs *regs, long error_code)
1082 * Non uncorrected or non signaled errors are handled by 1078 * Non uncorrected or non signaled errors are handled by
1083 * machine_check_poll. Leave them alone, unless this panics. 1079 * machine_check_poll. Leave them alone, unless this panics.
1084 */ 1080 */
1085 if (!(m.status & (mce_ser ? MCI_STATUS_S : MCI_STATUS_UC)) && 1081 if (!(m.status & (cfg->ser ? MCI_STATUS_S : MCI_STATUS_UC)) &&
1086 !no_way_out) 1082 !no_way_out)
1087 continue; 1083 continue;
1088 1084
@@ -1091,7 +1087,7 @@ void do_machine_check(struct pt_regs *regs, long error_code)
1091 */ 1087 */
1092 add_taint(TAINT_MACHINE_CHECK); 1088 add_taint(TAINT_MACHINE_CHECK);
1093 1089
1094 severity = mce_severity(&m, mca_cfg.tolerant, NULL); 1090 severity = mce_severity(&m, cfg->tolerant, NULL);
1095 1091
1096 /* 1092 /*
1097 * When machine check was for corrected handler don't touch, 1093 * When machine check was for corrected handler don't touch,
@@ -1147,7 +1143,7 @@ void do_machine_check(struct pt_regs *regs, long error_code)
1147 * issues we try to recover, or limit damage to the current 1143 * issues we try to recover, or limit damage to the current
1148 * process. 1144 * process.
1149 */ 1145 */
1150 if (mca_cfg.tolerant < 3) { 1146 if (cfg->tolerant < 3) {
1151 if (no_way_out) 1147 if (no_way_out)
1152 mce_panic("Fatal machine check on current CPU", &m, msg); 1148 mce_panic("Fatal machine check on current CPU", &m, msg);
1153 if (worst == MCE_AR_SEVERITY) { 1149 if (worst == MCE_AR_SEVERITY) {
@@ -1426,7 +1422,7 @@ static int __cpuinit __mcheck_cpu_cap_init(void)
1426 mca_cfg.rip_msr = MSR_IA32_MCG_EIP; 1422 mca_cfg.rip_msr = MSR_IA32_MCG_EIP;
1427 1423
1428 if (cap & MCG_SER_P) 1424 if (cap & MCG_SER_P)
1429 mce_ser = 1; 1425 mca_cfg.ser = true;
1430 1426
1431 return 0; 1427 return 0;
1432} 1428}
@@ -1675,7 +1671,7 @@ void (*machine_check_vector)(struct pt_regs *, long error_code) =
1675 */ 1671 */
1676void __cpuinit mcheck_cpu_init(struct cpuinfo_x86 *c) 1672void __cpuinit mcheck_cpu_init(struct cpuinfo_x86 *c)
1677{ 1673{
1678 if (mce_disabled) 1674 if (mca_cfg.disabled)
1679 return; 1675 return;
1680 1676
1681 if (__mcheck_cpu_ancient_init(c)) 1677 if (__mcheck_cpu_ancient_init(c))
@@ -1685,7 +1681,7 @@ void __cpuinit mcheck_cpu_init(struct cpuinfo_x86 *c)
1685 return; 1681 return;
1686 1682
1687 if (__mcheck_cpu_cap_init() < 0 || __mcheck_cpu_apply_quirks(c) < 0) { 1683 if (__mcheck_cpu_cap_init() < 0 || __mcheck_cpu_apply_quirks(c) < 0) {
1688 mce_disabled = 1; 1684 mca_cfg.disabled = true;
1689 return; 1685 return;
1690 } 1686 }
1691 1687
@@ -1967,7 +1963,7 @@ static int __init mcheck_enable(char *str)
1967 if (*str == '=') 1963 if (*str == '=')
1968 str++; 1964 str++;
1969 if (!strcmp(str, "off")) 1965 if (!strcmp(str, "off"))
1970 mce_disabled = 1; 1966 cfg->disabled = true;
1971 else if (!strcmp(str, "no_cmci")) 1967 else if (!strcmp(str, "no_cmci"))
1972 cfg->cmci_disabled = true; 1968 cfg->cmci_disabled = true;
1973 else if (!strcmp(str, "dont_log_ce")) 1969 else if (!strcmp(str, "dont_log_ce"))
@@ -1977,7 +1973,7 @@ static int __init mcheck_enable(char *str)
1977 else if (!strcmp(str, "bootlog") || !strcmp(str, "nobootlog")) 1973 else if (!strcmp(str, "bootlog") || !strcmp(str, "nobootlog"))
1978 cfg->bootlog = (str[0] == 'b'); 1974 cfg->bootlog = (str[0] == 'b');
1979 else if (!strcmp(str, "bios_cmci_threshold")) 1975 else if (!strcmp(str, "bios_cmci_threshold"))
1980 mce_bios_cmci_threshold = 1; 1976 cfg->bios_cmci_threshold = true;
1981 else if (isdigit(str[0])) { 1977 else if (isdigit(str[0])) {
1982 get_option(&str, &(cfg->tolerant)); 1978 get_option(&str, &(cfg->tolerant));
1983 if (*str == ',') { 1979 if (*str == ',') {
@@ -2435,7 +2431,7 @@ device_initcall_sync(mcheck_init_device);
2435 */ 2431 */
2436static int __init mcheck_disable(char *str) 2432static int __init mcheck_disable(char *str)
2437{ 2433{
2438 mce_disabled = 1; 2434 mca_cfg.disabled = true;
2439 return 1; 2435 return 1;
2440} 2436}
2441__setup("nomce", mcheck_disable); 2437__setup("nomce", mcheck_disable);
diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel.c b/arch/x86/kernel/cpu/mcheck/mce_intel.c
index 1acd8ecba1c3..79b2b6b6e613 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_intel.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_intel.c
@@ -200,7 +200,7 @@ static void cmci_discover(int banks)
200 continue; 200 continue;
201 } 201 }
202 202
203 if (!mce_bios_cmci_threshold) { 203 if (!mca_cfg.bios_cmci_threshold) {
204 val &= ~MCI_CTL2_CMCI_THRESHOLD_MASK; 204 val &= ~MCI_CTL2_CMCI_THRESHOLD_MASK;
205 val |= CMCI_THRESHOLD; 205 val |= CMCI_THRESHOLD;
206 } else if (!(val & MCI_CTL2_CMCI_THRESHOLD_MASK)) { 206 } else if (!(val & MCI_CTL2_CMCI_THRESHOLD_MASK)) {
@@ -227,7 +227,7 @@ static void cmci_discover(int banks)
227 * set the thresholds properly or does not work with 227 * set the thresholds properly or does not work with
228 * this boot option. Note down now and report later. 228 * this boot option. Note down now and report later.
229 */ 229 */
230 if (mce_bios_cmci_threshold && bios_zero_thresh && 230 if (mca_cfg.bios_cmci_threshold && bios_zero_thresh &&
231 (val & MCI_CTL2_CMCI_THRESHOLD_MASK)) 231 (val & MCI_CTL2_CMCI_THRESHOLD_MASK))
232 bios_wrong_thresh = 1; 232 bios_wrong_thresh = 1;
233 } else { 233 } else {
@@ -235,7 +235,7 @@ static void cmci_discover(int banks)
235 } 235 }
236 } 236 }
237 raw_spin_unlock_irqrestore(&cmci_discover_lock, flags); 237 raw_spin_unlock_irqrestore(&cmci_discover_lock, flags);
238 if (mce_bios_cmci_threshold && bios_wrong_thresh) { 238 if (mca_cfg.bios_cmci_threshold && bios_wrong_thresh) {
239 pr_info_once( 239 pr_info_once(
240 "bios_cmci_threshold: Some banks do not have valid thresholds set\n"); 240 "bios_cmci_threshold: Some banks do not have valid thresholds set\n");
241 pr_info_once( 241 pr_info_once(