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authorThomas Gleixner <tglxlinutronix.de>2007-10-23 16:37:23 -0400
committerThomas Gleixner <tglx@linutronix.de>2007-10-23 16:37:23 -0400
commit3bc258ad87e5b0bbbca247b24ce8fac380c7d86b (patch)
tree30f6919ee856f49b892b7e2074104147b05d4926 /arch/x86/kernel/cpu/mcheck/mce_32.c
parent34d19e29c9402b6149c128517f73e7773d5838bf (diff)
x86: prepare consolidation of cpu/ related code usage
Move mce.c to mce_32.c to allow the later move of the x86_64 mce.c from arch/x86/kernel/ to ...kernel/cpu/mcheck No code change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/cpu/mcheck/mce_32.c')
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce_32.c90
1 files changed, 90 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/mcheck/mce_32.c b/arch/x86/kernel/cpu/mcheck/mce_32.c
new file mode 100644
index 000000000000..34c781eddee4
--- /dev/null
+++ b/arch/x86/kernel/cpu/mcheck/mce_32.c
@@ -0,0 +1,90 @@
1/*
2 * mce.c - x86 Machine Check Exception Reporting
3 * (c) 2002 Alan Cox <alan@redhat.com>, Dave Jones <davej@codemonkey.org.uk>
4 */
5
6#include <linux/init.h>
7#include <linux/types.h>
8#include <linux/kernel.h>
9#include <linux/module.h>
10#include <linux/smp.h>
11#include <linux/thread_info.h>
12
13#include <asm/processor.h>
14#include <asm/system.h>
15#include <asm/mce.h>
16
17#include "mce.h"
18
19int mce_disabled = 0;
20int nr_mce_banks;
21
22EXPORT_SYMBOL_GPL(nr_mce_banks); /* non-fatal.o */
23
24/* Handle unconfigured int18 (should never happen) */
25static fastcall void unexpected_machine_check(struct pt_regs * regs, long error_code)
26{
27 printk(KERN_ERR "CPU#%d: Unexpected int18 (Machine Check).\n", smp_processor_id());
28}
29
30/* Call the installed machine check handler for this CPU setup. */
31void fastcall (*machine_check_vector)(struct pt_regs *, long error_code) = unexpected_machine_check;
32
33/* This has to be run for each processor */
34void mcheck_init(struct cpuinfo_x86 *c)
35{
36 if (mce_disabled==1)
37 return;
38
39 switch (c->x86_vendor) {
40 case X86_VENDOR_AMD:
41 amd_mcheck_init(c);
42 break;
43
44 case X86_VENDOR_INTEL:
45 if (c->x86==5)
46 intel_p5_mcheck_init(c);
47 if (c->x86==6)
48 intel_p6_mcheck_init(c);
49 if (c->x86==15)
50 intel_p4_mcheck_init(c);
51 break;
52
53 case X86_VENDOR_CENTAUR:
54 if (c->x86==5)
55 winchip_mcheck_init(c);
56 break;
57
58 default:
59 break;
60 }
61}
62
63static unsigned long old_cr4 __initdata;
64
65void __init stop_mce(void)
66{
67 old_cr4 = read_cr4();
68 clear_in_cr4(X86_CR4_MCE);
69}
70
71void __init restart_mce(void)
72{
73 if (old_cr4 & X86_CR4_MCE)
74 set_in_cr4(X86_CR4_MCE);
75}
76
77static int __init mcheck_disable(char *str)
78{
79 mce_disabled = 1;
80 return 1;
81}
82
83static int __init mcheck_enable(char *str)
84{
85 mce_disabled = -1;
86 return 1;
87}
88
89__setup("nomce", mcheck_disable);
90__setup("mce", mcheck_enable);