diff options
author | Glenn Elliott <gelliott@cs.unc.edu> | 2012-03-04 19:47:13 -0500 |
---|---|---|
committer | Glenn Elliott <gelliott@cs.unc.edu> | 2012-03-04 19:47:13 -0500 |
commit | c71c03bda1e86c9d5198c5d83f712e695c4f2a1e (patch) | |
tree | ecb166cb3e2b7e2adb3b5e292245fefd23381ac8 /arch/x86/kernel/apic/x2apic_cluster.c | |
parent | ea53c912f8a86a8567697115b6a0d8152beee5c8 (diff) | |
parent | 6a00f206debf8a5c8899055726ad127dbeeed098 (diff) |
Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp
Conflicts:
litmus/sched_cedf.c
Diffstat (limited to 'arch/x86/kernel/apic/x2apic_cluster.c')
-rw-r--r-- | arch/x86/kernel/apic/x2apic_cluster.c | 224 |
1 files changed, 124 insertions, 100 deletions
diff --git a/arch/x86/kernel/apic/x2apic_cluster.c b/arch/x86/kernel/apic/x2apic_cluster.c index cf69c59f4910..500795875827 100644 --- a/arch/x86/kernel/apic/x2apic_cluster.c +++ b/arch/x86/kernel/apic/x2apic_cluster.c | |||
@@ -5,118 +5,95 @@ | |||
5 | #include <linux/ctype.h> | 5 | #include <linux/ctype.h> |
6 | #include <linux/init.h> | 6 | #include <linux/init.h> |
7 | #include <linux/dmar.h> | 7 | #include <linux/dmar.h> |
8 | #include <linux/cpu.h> | ||
8 | 9 | ||
9 | #include <asm/smp.h> | 10 | #include <asm/smp.h> |
10 | #include <asm/apic.h> | 11 | #include <asm/x2apic.h> |
11 | #include <asm/ipi.h> | ||
12 | 12 | ||
13 | static DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid); | 13 | static DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid); |
14 | static DEFINE_PER_CPU(cpumask_var_t, cpus_in_cluster); | ||
15 | static DEFINE_PER_CPU(cpumask_var_t, ipi_mask); | ||
14 | 16 | ||
15 | static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id) | 17 | static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id) |
16 | { | 18 | { |
17 | return x2apic_enabled(); | 19 | return x2apic_enabled(); |
18 | } | 20 | } |
19 | 21 | ||
20 | /* | 22 | static inline u32 x2apic_cluster(int cpu) |
21 | * need to use more than cpu 0, because we need more vectors when | ||
22 | * MSI-X are used. | ||
23 | */ | ||
24 | static const struct cpumask *x2apic_target_cpus(void) | ||
25 | { | 23 | { |
26 | return cpu_online_mask; | 24 | return per_cpu(x86_cpu_to_logical_apicid, cpu) >> 16; |
27 | } | ||
28 | |||
29 | /* | ||
30 | * for now each logical cpu is in its own vector allocation domain. | ||
31 | */ | ||
32 | static void x2apic_vector_allocation_domain(int cpu, struct cpumask *retmask) | ||
33 | { | ||
34 | cpumask_clear(retmask); | ||
35 | cpumask_set_cpu(cpu, retmask); | ||
36 | } | 25 | } |
37 | 26 | ||
38 | static void | 27 | static void |
39 | __x2apic_send_IPI_dest(unsigned int apicid, int vector, unsigned int dest) | 28 | __x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest) |
40 | { | 29 | { |
41 | unsigned long cfg; | 30 | struct cpumask *cpus_in_cluster_ptr; |
31 | struct cpumask *ipi_mask_ptr; | ||
32 | unsigned int cpu, this_cpu; | ||
33 | unsigned long flags; | ||
34 | u32 dest; | ||
35 | |||
36 | x2apic_wrmsr_fence(); | ||
37 | |||
38 | local_irq_save(flags); | ||
42 | 39 | ||
43 | cfg = __prepare_ICR(0, vector, dest); | 40 | this_cpu = smp_processor_id(); |
44 | 41 | ||
45 | /* | 42 | /* |
46 | * send the IPI. | 43 | * We are to modify mask, so we need an own copy |
44 | * and be sure it's manipulated with irq off. | ||
47 | */ | 45 | */ |
48 | native_x2apic_icr_write(cfg, apicid); | 46 | ipi_mask_ptr = __raw_get_cpu_var(ipi_mask); |
49 | } | 47 | cpumask_copy(ipi_mask_ptr, mask); |
50 | 48 | ||
51 | /* | 49 | /* |
52 | * for now, we send the IPI's one by one in the cpumask. | 50 | * The idea is to send one IPI per cluster. |
53 | * TBD: Based on the cpu mask, we can send the IPI's to the cluster group | 51 | */ |
54 | * at once. We have 16 cpu's in a cluster. This will minimize IPI register | 52 | for_each_cpu(cpu, ipi_mask_ptr) { |
55 | * writes. | 53 | unsigned long i; |
56 | */ | ||
57 | static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector) | ||
58 | { | ||
59 | unsigned long query_cpu; | ||
60 | unsigned long flags; | ||
61 | 54 | ||
62 | x2apic_wrmsr_fence(); | 55 | cpus_in_cluster_ptr = per_cpu(cpus_in_cluster, cpu); |
56 | dest = 0; | ||
63 | 57 | ||
64 | local_irq_save(flags); | 58 | /* Collect cpus in cluster. */ |
65 | for_each_cpu(query_cpu, mask) { | 59 | for_each_cpu_and(i, ipi_mask_ptr, cpus_in_cluster_ptr) { |
66 | __x2apic_send_IPI_dest( | 60 | if (apic_dest == APIC_DEST_ALLINC || i != this_cpu) |
67 | per_cpu(x86_cpu_to_logical_apicid, query_cpu), | 61 | dest |= per_cpu(x86_cpu_to_logical_apicid, i); |
68 | vector, apic->dest_logical); | 62 | } |
63 | |||
64 | if (!dest) | ||
65 | continue; | ||
66 | |||
67 | __x2apic_send_IPI_dest(dest, vector, apic->dest_logical); | ||
68 | /* | ||
69 | * Cluster sibling cpus should be discared now so | ||
70 | * we would not send IPI them second time. | ||
71 | */ | ||
72 | cpumask_andnot(ipi_mask_ptr, ipi_mask_ptr, cpus_in_cluster_ptr); | ||
69 | } | 73 | } |
74 | |||
70 | local_irq_restore(flags); | 75 | local_irq_restore(flags); |
71 | } | 76 | } |
72 | 77 | ||
78 | static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector) | ||
79 | { | ||
80 | __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLINC); | ||
81 | } | ||
82 | |||
73 | static void | 83 | static void |
74 | x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector) | 84 | x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector) |
75 | { | 85 | { |
76 | unsigned long this_cpu = smp_processor_id(); | 86 | __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLBUT); |
77 | unsigned long query_cpu; | ||
78 | unsigned long flags; | ||
79 | |||
80 | x2apic_wrmsr_fence(); | ||
81 | |||
82 | local_irq_save(flags); | ||
83 | for_each_cpu(query_cpu, mask) { | ||
84 | if (query_cpu == this_cpu) | ||
85 | continue; | ||
86 | __x2apic_send_IPI_dest( | ||
87 | per_cpu(x86_cpu_to_logical_apicid, query_cpu), | ||
88 | vector, apic->dest_logical); | ||
89 | } | ||
90 | local_irq_restore(flags); | ||
91 | } | 87 | } |
92 | 88 | ||
93 | static void x2apic_send_IPI_allbutself(int vector) | 89 | static void x2apic_send_IPI_allbutself(int vector) |
94 | { | 90 | { |
95 | unsigned long this_cpu = smp_processor_id(); | 91 | __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLBUT); |
96 | unsigned long query_cpu; | ||
97 | unsigned long flags; | ||
98 | |||
99 | x2apic_wrmsr_fence(); | ||
100 | |||
101 | local_irq_save(flags); | ||
102 | for_each_online_cpu(query_cpu) { | ||
103 | if (query_cpu == this_cpu) | ||
104 | continue; | ||
105 | __x2apic_send_IPI_dest( | ||
106 | per_cpu(x86_cpu_to_logical_apicid, query_cpu), | ||
107 | vector, apic->dest_logical); | ||
108 | } | ||
109 | local_irq_restore(flags); | ||
110 | } | 92 | } |
111 | 93 | ||
112 | static void x2apic_send_IPI_all(int vector) | 94 | static void x2apic_send_IPI_all(int vector) |
113 | { | 95 | { |
114 | x2apic_send_IPI_mask(cpu_online_mask, vector); | 96 | __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLINC); |
115 | } | ||
116 | |||
117 | static int x2apic_apic_id_registered(void) | ||
118 | { | ||
119 | return 1; | ||
120 | } | 97 | } |
121 | 98 | ||
122 | static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask) | 99 | static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask) |
@@ -151,43 +128,90 @@ x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask, | |||
151 | return per_cpu(x86_cpu_to_logical_apicid, cpu); | 128 | return per_cpu(x86_cpu_to_logical_apicid, cpu); |
152 | } | 129 | } |
153 | 130 | ||
154 | static unsigned int x2apic_cluster_phys_get_apic_id(unsigned long x) | 131 | static void init_x2apic_ldr(void) |
155 | { | 132 | { |
156 | unsigned int id; | 133 | unsigned int this_cpu = smp_processor_id(); |
134 | unsigned int cpu; | ||
157 | 135 | ||
158 | id = x; | 136 | per_cpu(x86_cpu_to_logical_apicid, this_cpu) = apic_read(APIC_LDR); |
159 | return id; | 137 | |
138 | __cpu_set(this_cpu, per_cpu(cpus_in_cluster, this_cpu)); | ||
139 | for_each_online_cpu(cpu) { | ||
140 | if (x2apic_cluster(this_cpu) != x2apic_cluster(cpu)) | ||
141 | continue; | ||
142 | __cpu_set(this_cpu, per_cpu(cpus_in_cluster, cpu)); | ||
143 | __cpu_set(cpu, per_cpu(cpus_in_cluster, this_cpu)); | ||
144 | } | ||
160 | } | 145 | } |
161 | 146 | ||
162 | static unsigned long set_apic_id(unsigned int id) | 147 | /* |
148 | * At CPU state changes, update the x2apic cluster sibling info. | ||
149 | */ | ||
150 | static int __cpuinit | ||
151 | update_clusterinfo(struct notifier_block *nfb, unsigned long action, void *hcpu) | ||
163 | { | 152 | { |
164 | unsigned long x; | 153 | unsigned int this_cpu = (unsigned long)hcpu; |
154 | unsigned int cpu; | ||
155 | int err = 0; | ||
156 | |||
157 | switch (action) { | ||
158 | case CPU_UP_PREPARE: | ||
159 | if (!zalloc_cpumask_var(&per_cpu(cpus_in_cluster, this_cpu), | ||
160 | GFP_KERNEL)) { | ||
161 | err = -ENOMEM; | ||
162 | } else if (!zalloc_cpumask_var(&per_cpu(ipi_mask, this_cpu), | ||
163 | GFP_KERNEL)) { | ||
164 | free_cpumask_var(per_cpu(cpus_in_cluster, this_cpu)); | ||
165 | err = -ENOMEM; | ||
166 | } | ||
167 | break; | ||
168 | case CPU_UP_CANCELED: | ||
169 | case CPU_UP_CANCELED_FROZEN: | ||
170 | case CPU_DEAD: | ||
171 | for_each_online_cpu(cpu) { | ||
172 | if (x2apic_cluster(this_cpu) != x2apic_cluster(cpu)) | ||
173 | continue; | ||
174 | __cpu_clear(this_cpu, per_cpu(cpus_in_cluster, cpu)); | ||
175 | __cpu_clear(cpu, per_cpu(cpus_in_cluster, this_cpu)); | ||
176 | } | ||
177 | free_cpumask_var(per_cpu(cpus_in_cluster, this_cpu)); | ||
178 | free_cpumask_var(per_cpu(ipi_mask, this_cpu)); | ||
179 | break; | ||
180 | } | ||
165 | 181 | ||
166 | x = id; | 182 | return notifier_from_errno(err); |
167 | return x; | ||
168 | } | 183 | } |
169 | 184 | ||
170 | static int x2apic_cluster_phys_pkg_id(int initial_apicid, int index_msb) | 185 | static struct notifier_block __refdata x2apic_cpu_notifier = { |
171 | { | 186 | .notifier_call = update_clusterinfo, |
172 | return initial_apicid >> index_msb; | 187 | }; |
173 | } | ||
174 | 188 | ||
175 | static void x2apic_send_IPI_self(int vector) | 189 | static int x2apic_init_cpu_notifier(void) |
176 | { | 190 | { |
177 | apic_write(APIC_SELF_IPI, vector); | 191 | int cpu = smp_processor_id(); |
192 | |||
193 | zalloc_cpumask_var(&per_cpu(cpus_in_cluster, cpu), GFP_KERNEL); | ||
194 | zalloc_cpumask_var(&per_cpu(ipi_mask, cpu), GFP_KERNEL); | ||
195 | |||
196 | BUG_ON(!per_cpu(cpus_in_cluster, cpu) || !per_cpu(ipi_mask, cpu)); | ||
197 | |||
198 | __cpu_set(cpu, per_cpu(cpus_in_cluster, cpu)); | ||
199 | register_hotcpu_notifier(&x2apic_cpu_notifier); | ||
200 | return 1; | ||
178 | } | 201 | } |
179 | 202 | ||
180 | static void init_x2apic_ldr(void) | 203 | static int x2apic_cluster_probe(void) |
181 | { | 204 | { |
182 | int cpu = smp_processor_id(); | 205 | if (x2apic_mode) |
183 | 206 | return x2apic_init_cpu_notifier(); | |
184 | per_cpu(x86_cpu_to_logical_apicid, cpu) = apic_read(APIC_LDR); | 207 | else |
208 | return 0; | ||
185 | } | 209 | } |
186 | 210 | ||
187 | struct apic apic_x2apic_cluster = { | 211 | static struct apic apic_x2apic_cluster = { |
188 | 212 | ||
189 | .name = "cluster x2apic", | 213 | .name = "cluster x2apic", |
190 | .probe = NULL, | 214 | .probe = x2apic_cluster_probe, |
191 | .acpi_madt_oem_check = x2apic_acpi_madt_oem_check, | 215 | .acpi_madt_oem_check = x2apic_acpi_madt_oem_check, |
192 | .apic_id_registered = x2apic_apic_id_registered, | 216 | .apic_id_registered = x2apic_apic_id_registered, |
193 | 217 | ||
@@ -206,18 +230,16 @@ struct apic apic_x2apic_cluster = { | |||
206 | .ioapic_phys_id_map = NULL, | 230 | .ioapic_phys_id_map = NULL, |
207 | .setup_apic_routing = NULL, | 231 | .setup_apic_routing = NULL, |
208 | .multi_timer_check = NULL, | 232 | .multi_timer_check = NULL, |
209 | .apicid_to_node = NULL, | ||
210 | .cpu_to_logical_apicid = NULL, | ||
211 | .cpu_present_to_apicid = default_cpu_present_to_apicid, | 233 | .cpu_present_to_apicid = default_cpu_present_to_apicid, |
212 | .apicid_to_cpu_present = NULL, | 234 | .apicid_to_cpu_present = NULL, |
213 | .setup_portio_remap = NULL, | 235 | .setup_portio_remap = NULL, |
214 | .check_phys_apicid_present = default_check_phys_apicid_present, | 236 | .check_phys_apicid_present = default_check_phys_apicid_present, |
215 | .enable_apic_mode = NULL, | 237 | .enable_apic_mode = NULL, |
216 | .phys_pkg_id = x2apic_cluster_phys_pkg_id, | 238 | .phys_pkg_id = x2apic_phys_pkg_id, |
217 | .mps_oem_check = NULL, | 239 | .mps_oem_check = NULL, |
218 | 240 | ||
219 | .get_apic_id = x2apic_cluster_phys_get_apic_id, | 241 | .get_apic_id = x2apic_get_apic_id, |
220 | .set_apic_id = set_apic_id, | 242 | .set_apic_id = x2apic_set_apic_id, |
221 | .apic_id_mask = 0xFFFFFFFFu, | 243 | .apic_id_mask = 0xFFFFFFFFu, |
222 | 244 | ||
223 | .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid, | 245 | .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid, |
@@ -242,3 +264,5 @@ struct apic apic_x2apic_cluster = { | |||
242 | .wait_icr_idle = native_x2apic_wait_icr_idle, | 264 | .wait_icr_idle = native_x2apic_wait_icr_idle, |
243 | .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle, | 265 | .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle, |
244 | }; | 266 | }; |
267 | |||
268 | apic_driver(apic_x2apic_cluster); | ||