diff options
author | Cyrill Gorcunov <gorcunov@gmail.com> | 2008-11-10 03:16:41 -0500 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-11-10 03:16:41 -0500 |
commit | ba21ebb6abac5c46e1d818d2ceda82420bd099ba (patch) | |
tree | ba7a4384eec67922dbb34aed70eee2d60a34879b /arch/x86/kernel/apic.c | |
parent | 4e0304310f5180eee11b4edc72cf4cb78acdc634 (diff) |
x86: apic - use pr_ macros for logging
Impact: cleanup
It saves us some source lines and shift the code a bit righter.
And a multiline comment style is fixed too :-)
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Acked-by: "Maciej W. Rozycki" <macro@linux-mips.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/apic.c')
-rw-r--r-- | arch/x86/kernel/apic.c | 116 |
1 files changed, 53 insertions, 63 deletions
diff --git a/arch/x86/kernel/apic.c b/arch/x86/kernel/apic.c index ce90dc184139..70879c9e3936 100644 --- a/arch/x86/kernel/apic.c +++ b/arch/x86/kernel/apic.c | |||
@@ -559,13 +559,13 @@ static int __init calibrate_by_pmtimer(long deltapm, long *delta) | |||
559 | } else { | 559 | } else { |
560 | res = (((u64)deltapm) * mult) >> 22; | 560 | res = (((u64)deltapm) * mult) >> 22; |
561 | do_div(res, 1000000); | 561 | do_div(res, 1000000); |
562 | printk(KERN_WARNING "APIC calibration not consistent " | 562 | pr_warning("APIC calibration not consistent " |
563 | "with PM Timer: %ldms instead of 100ms\n", | 563 | "with PM Timer: %ldms instead of 100ms\n", |
564 | (long)res); | 564 | (long)res); |
565 | /* Correct the lapic counter value */ | 565 | /* Correct the lapic counter value */ |
566 | res = (((u64)(*delta)) * pm_100ms); | 566 | res = (((u64)(*delta)) * pm_100ms); |
567 | do_div(res, deltapm); | 567 | do_div(res, deltapm); |
568 | printk(KERN_INFO "APIC delta adjusted to PM-Timer: " | 568 | pr_info("APIC delta adjusted to PM-Timer: " |
569 | "%lu (%ld)\n", (unsigned long)res, *delta); | 569 | "%lu (%ld)\n", (unsigned long)res, *delta); |
570 | *delta = (long)res; | 570 | *delta = (long)res; |
571 | } | 571 | } |
@@ -645,8 +645,7 @@ static int __init calibrate_APIC_clock(void) | |||
645 | */ | 645 | */ |
646 | if (calibration_result < (1000000 / HZ)) { | 646 | if (calibration_result < (1000000 / HZ)) { |
647 | local_irq_enable(); | 647 | local_irq_enable(); |
648 | printk(KERN_WARNING | 648 | pr_warning("APIC frequency too slow, disabling apic timer\n"); |
649 | "APIC frequency too slow, disabling apic timer\n"); | ||
650 | return -1; | 649 | return -1; |
651 | } | 650 | } |
652 | 651 | ||
@@ -688,8 +687,7 @@ static int __init calibrate_APIC_clock(void) | |||
688 | local_irq_enable(); | 687 | local_irq_enable(); |
689 | 688 | ||
690 | if (levt->features & CLOCK_EVT_FEAT_DUMMY) { | 689 | if (levt->features & CLOCK_EVT_FEAT_DUMMY) { |
691 | printk(KERN_WARNING | 690 | pr_warning("APIC timer disabled due to verification failure.\n"); |
692 | "APIC timer disabled due to verification failure.\n"); | ||
693 | return -1; | 691 | return -1; |
694 | } | 692 | } |
695 | 693 | ||
@@ -710,7 +708,7 @@ void __init setup_boot_APIC_clock(void) | |||
710 | * broadcast mechanism is used. On UP systems simply ignore it. | 708 | * broadcast mechanism is used. On UP systems simply ignore it. |
711 | */ | 709 | */ |
712 | if (disable_apic_timer) { | 710 | if (disable_apic_timer) { |
713 | printk(KERN_INFO "Disabling APIC timer\n"); | 711 | pr_info("Disabling APIC timer\n"); |
714 | /* No broadcast on UP ! */ | 712 | /* No broadcast on UP ! */ |
715 | if (num_possible_cpus() > 1) { | 713 | if (num_possible_cpus() > 1) { |
716 | lapic_clockevent.mult = 1; | 714 | lapic_clockevent.mult = 1; |
@@ -737,7 +735,7 @@ void __init setup_boot_APIC_clock(void) | |||
737 | if (nmi_watchdog != NMI_IO_APIC) | 735 | if (nmi_watchdog != NMI_IO_APIC) |
738 | lapic_clockevent.features &= ~CLOCK_EVT_FEAT_DUMMY; | 736 | lapic_clockevent.features &= ~CLOCK_EVT_FEAT_DUMMY; |
739 | else | 737 | else |
740 | printk(KERN_WARNING "APIC timer registered as dummy," | 738 | pr_warning("APIC timer registered as dummy," |
741 | " due to nmi_watchdog=%d!\n", nmi_watchdog); | 739 | " due to nmi_watchdog=%d!\n", nmi_watchdog); |
742 | 740 | ||
743 | /* Setup the lapic or request the broadcast */ | 741 | /* Setup the lapic or request the broadcast */ |
@@ -769,8 +767,7 @@ static void local_apic_timer_interrupt(void) | |||
769 | * spurious. | 767 | * spurious. |
770 | */ | 768 | */ |
771 | if (!evt->event_handler) { | 769 | if (!evt->event_handler) { |
772 | printk(KERN_WARNING | 770 | pr_warning("Spurious LAPIC timer interrupt on cpu %d\n", cpu); |
773 | "Spurious LAPIC timer interrupt on cpu %d\n", cpu); | ||
774 | /* Switch it off */ | 771 | /* Switch it off */ |
775 | lapic_timer_setup(CLOCK_EVT_MODE_SHUTDOWN, evt); | 772 | lapic_timer_setup(CLOCK_EVT_MODE_SHUTDOWN, evt); |
776 | return; | 773 | return; |
@@ -1089,7 +1086,7 @@ static void __cpuinit lapic_setup_esr(void) | |||
1089 | unsigned int oldvalue, value, maxlvt; | 1086 | unsigned int oldvalue, value, maxlvt; |
1090 | 1087 | ||
1091 | if (!lapic_is_integrated()) { | 1088 | if (!lapic_is_integrated()) { |
1092 | printk(KERN_INFO "No ESR for 82489DX.\n"); | 1089 | pr_info("No ESR for 82489DX.\n"); |
1093 | return; | 1090 | return; |
1094 | } | 1091 | } |
1095 | 1092 | ||
@@ -1100,7 +1097,7 @@ static void __cpuinit lapic_setup_esr(void) | |||
1100 | * ESR disabled - we can't do anything useful with the | 1097 | * ESR disabled - we can't do anything useful with the |
1101 | * errors anyway - mbligh | 1098 | * errors anyway - mbligh |
1102 | */ | 1099 | */ |
1103 | printk(KERN_INFO "Leaving ESR disabled.\n"); | 1100 | pr_info("Leaving ESR disabled.\n"); |
1104 | return; | 1101 | return; |
1105 | } | 1102 | } |
1106 | 1103 | ||
@@ -1294,7 +1291,7 @@ void check_x2apic(void) | |||
1294 | rdmsr(MSR_IA32_APICBASE, msr, msr2); | 1291 | rdmsr(MSR_IA32_APICBASE, msr, msr2); |
1295 | 1292 | ||
1296 | if (msr & X2APIC_ENABLE) { | 1293 | if (msr & X2APIC_ENABLE) { |
1297 | printk("x2apic enabled by BIOS, switching to x2apic ops\n"); | 1294 | pr_info("x2apic enabled by BIOS, switching to x2apic ops\n"); |
1298 | x2apic_preenabled = x2apic = 1; | 1295 | x2apic_preenabled = x2apic = 1; |
1299 | apic_ops = &x2apic_ops; | 1296 | apic_ops = &x2apic_ops; |
1300 | } | 1297 | } |
@@ -1306,7 +1303,7 @@ void enable_x2apic(void) | |||
1306 | 1303 | ||
1307 | rdmsr(MSR_IA32_APICBASE, msr, msr2); | 1304 | rdmsr(MSR_IA32_APICBASE, msr, msr2); |
1308 | if (!(msr & X2APIC_ENABLE)) { | 1305 | if (!(msr & X2APIC_ENABLE)) { |
1309 | printk("Enabling x2apic\n"); | 1306 | pr_info("Enabling x2apic\n"); |
1310 | wrmsr(MSR_IA32_APICBASE, msr | X2APIC_ENABLE, 0); | 1307 | wrmsr(MSR_IA32_APICBASE, msr | X2APIC_ENABLE, 0); |
1311 | } | 1308 | } |
1312 | } | 1309 | } |
@@ -1321,9 +1318,8 @@ void enable_IR_x2apic(void) | |||
1321 | return; | 1318 | return; |
1322 | 1319 | ||
1323 | if (!x2apic_preenabled && disable_x2apic) { | 1320 | if (!x2apic_preenabled && disable_x2apic) { |
1324 | printk(KERN_INFO | 1321 | pr_info("Skipped enabling x2apic and Interrupt-remapping " |
1325 | "Skipped enabling x2apic and Interrupt-remapping " | 1322 | "because of nox2apic\n"); |
1326 | "because of nox2apic\n"); | ||
1327 | return; | 1323 | return; |
1328 | } | 1324 | } |
1329 | 1325 | ||
@@ -1331,22 +1327,19 @@ void enable_IR_x2apic(void) | |||
1331 | panic("Bios already enabled x2apic, can't enforce nox2apic"); | 1327 | panic("Bios already enabled x2apic, can't enforce nox2apic"); |
1332 | 1328 | ||
1333 | if (!x2apic_preenabled && skip_ioapic_setup) { | 1329 | if (!x2apic_preenabled && skip_ioapic_setup) { |
1334 | printk(KERN_INFO | 1330 | pr_info("Skipped enabling x2apic and Interrupt-remapping " |
1335 | "Skipped enabling x2apic and Interrupt-remapping " | 1331 | "because of skipping io-apic setup\n"); |
1336 | "because of skipping io-apic setup\n"); | ||
1337 | return; | 1332 | return; |
1338 | } | 1333 | } |
1339 | 1334 | ||
1340 | ret = dmar_table_init(); | 1335 | ret = dmar_table_init(); |
1341 | if (ret) { | 1336 | if (ret) { |
1342 | printk(KERN_INFO | 1337 | pr_info("dmar_table_init() failed with %d:\n", ret); |
1343 | "dmar_table_init() failed with %d:\n", ret); | ||
1344 | 1338 | ||
1345 | if (x2apic_preenabled) | 1339 | if (x2apic_preenabled) |
1346 | panic("x2apic enabled by bios. But IR enabling failed"); | 1340 | panic("x2apic enabled by bios. But IR enabling failed"); |
1347 | else | 1341 | else |
1348 | printk(KERN_INFO | 1342 | pr_info("Not enabling x2apic,Intr-remapping\n"); |
1349 | "Not enabling x2apic,Intr-remapping\n"); | ||
1350 | return; | 1343 | return; |
1351 | } | 1344 | } |
1352 | 1345 | ||
@@ -1355,7 +1348,7 @@ void enable_IR_x2apic(void) | |||
1355 | 1348 | ||
1356 | ret = save_mask_IO_APIC_setup(); | 1349 | ret = save_mask_IO_APIC_setup(); |
1357 | if (ret) { | 1350 | if (ret) { |
1358 | printk(KERN_INFO "Saving IO-APIC state failed: %d\n", ret); | 1351 | pr_info("Saving IO-APIC state failed: %d\n", ret); |
1359 | goto end; | 1352 | goto end; |
1360 | } | 1353 | } |
1361 | 1354 | ||
@@ -1390,14 +1383,11 @@ end: | |||
1390 | 1383 | ||
1391 | if (!ret) { | 1384 | if (!ret) { |
1392 | if (!x2apic_preenabled) | 1385 | if (!x2apic_preenabled) |
1393 | printk(KERN_INFO | 1386 | pr_info("Enabled x2apic and interrupt-remapping\n"); |
1394 | "Enabled x2apic and interrupt-remapping\n"); | ||
1395 | else | 1387 | else |
1396 | printk(KERN_INFO | 1388 | pr_info("Enabled Interrupt-remapping\n"); |
1397 | "Enabled Interrupt-remapping\n"); | ||
1398 | } else | 1389 | } else |
1399 | printk(KERN_ERR | 1390 | pr_err("Failed to enable Interrupt-remapping and x2apic\n"); |
1400 | "Failed to enable Interrupt-remapping and x2apic\n"); | ||
1401 | #else | 1391 | #else |
1402 | if (!cpu_has_x2apic) | 1392 | if (!cpu_has_x2apic) |
1403 | return; | 1393 | return; |
@@ -1406,8 +1396,8 @@ end: | |||
1406 | panic("x2apic enabled prior OS handover," | 1396 | panic("x2apic enabled prior OS handover," |
1407 | " enable CONFIG_INTR_REMAP"); | 1397 | " enable CONFIG_INTR_REMAP"); |
1408 | 1398 | ||
1409 | printk(KERN_INFO "Enable CONFIG_INTR_REMAP for enabling intr-remapping " | 1399 | pr_info("Enable CONFIG_INTR_REMAP for enabling intr-remapping " |
1410 | " and x2apic\n"); | 1400 | " and x2apic\n"); |
1411 | #endif | 1401 | #endif |
1412 | 1402 | ||
1413 | return; | 1403 | return; |
@@ -1424,7 +1414,7 @@ end: | |||
1424 | static int __init detect_init_APIC(void) | 1414 | static int __init detect_init_APIC(void) |
1425 | { | 1415 | { |
1426 | if (!cpu_has_apic) { | 1416 | if (!cpu_has_apic) { |
1427 | printk(KERN_INFO "No local APIC present\n"); | 1417 | pr_info("No local APIC present\n"); |
1428 | return -1; | 1418 | return -1; |
1429 | } | 1419 | } |
1430 | 1420 | ||
@@ -1465,8 +1455,8 @@ static int __init detect_init_APIC(void) | |||
1465 | * "lapic" specified. | 1455 | * "lapic" specified. |
1466 | */ | 1456 | */ |
1467 | if (!force_enable_local_apic) { | 1457 | if (!force_enable_local_apic) { |
1468 | printk(KERN_INFO "Local APIC disabled by BIOS -- " | 1458 | pr_info("Local APIC disabled by BIOS -- " |
1469 | "you can enable it with \"lapic\"\n"); | 1459 | "you can enable it with \"lapic\"\n"); |
1470 | return -1; | 1460 | return -1; |
1471 | } | 1461 | } |
1472 | /* | 1462 | /* |
@@ -1476,8 +1466,7 @@ static int __init detect_init_APIC(void) | |||
1476 | */ | 1466 | */ |
1477 | rdmsr(MSR_IA32_APICBASE, l, h); | 1467 | rdmsr(MSR_IA32_APICBASE, l, h); |
1478 | if (!(l & MSR_IA32_APICBASE_ENABLE)) { | 1468 | if (!(l & MSR_IA32_APICBASE_ENABLE)) { |
1479 | printk(KERN_INFO | 1469 | pr_info("Local APIC disabled by BIOS -- reenabling.\n"); |
1480 | "Local APIC disabled by BIOS -- reenabling.\n"); | ||
1481 | l &= ~MSR_IA32_APICBASE_BASE; | 1470 | l &= ~MSR_IA32_APICBASE_BASE; |
1482 | l |= MSR_IA32_APICBASE_ENABLE | APIC_DEFAULT_PHYS_BASE; | 1471 | l |= MSR_IA32_APICBASE_ENABLE | APIC_DEFAULT_PHYS_BASE; |
1483 | wrmsr(MSR_IA32_APICBASE, l, h); | 1472 | wrmsr(MSR_IA32_APICBASE, l, h); |
@@ -1490,7 +1479,7 @@ static int __init detect_init_APIC(void) | |||
1490 | */ | 1479 | */ |
1491 | features = cpuid_edx(1); | 1480 | features = cpuid_edx(1); |
1492 | if (!(features & (1 << X86_FEATURE_APIC))) { | 1481 | if (!(features & (1 << X86_FEATURE_APIC))) { |
1493 | printk(KERN_WARNING "Could not enable APIC!\n"); | 1482 | pr_warning("Could not enable APIC!\n"); |
1494 | return -1; | 1483 | return -1; |
1495 | } | 1484 | } |
1496 | set_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC); | 1485 | set_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC); |
@@ -1501,14 +1490,14 @@ static int __init detect_init_APIC(void) | |||
1501 | if (l & MSR_IA32_APICBASE_ENABLE) | 1490 | if (l & MSR_IA32_APICBASE_ENABLE) |
1502 | mp_lapic_addr = l & MSR_IA32_APICBASE_BASE; | 1491 | mp_lapic_addr = l & MSR_IA32_APICBASE_BASE; |
1503 | 1492 | ||
1504 | printk(KERN_INFO "Found and enabled local APIC!\n"); | 1493 | pr_info("Found and enabled local APIC!\n"); |
1505 | 1494 | ||
1506 | apic_pm_activate(); | 1495 | apic_pm_activate(); |
1507 | 1496 | ||
1508 | return 0; | 1497 | return 0; |
1509 | 1498 | ||
1510 | no_apic: | 1499 | no_apic: |
1511 | printk(KERN_INFO "No local APIC present or hardware disabled\n"); | 1500 | pr_info("No local APIC present or hardware disabled\n"); |
1512 | return -1; | 1501 | return -1; |
1513 | } | 1502 | } |
1514 | #endif | 1503 | #endif |
@@ -1584,12 +1573,12 @@ int __init APIC_init_uniprocessor(void) | |||
1584 | { | 1573 | { |
1585 | #ifdef CONFIG_X86_64 | 1574 | #ifdef CONFIG_X86_64 |
1586 | if (disable_apic) { | 1575 | if (disable_apic) { |
1587 | printk(KERN_INFO "Apic disabled\n"); | 1576 | pr_info("Apic disabled\n"); |
1588 | return -1; | 1577 | return -1; |
1589 | } | 1578 | } |
1590 | if (!cpu_has_apic) { | 1579 | if (!cpu_has_apic) { |
1591 | disable_apic = 1; | 1580 | disable_apic = 1; |
1592 | printk(KERN_INFO "Apic disabled by BIOS\n"); | 1581 | pr_info("Apic disabled by BIOS\n"); |
1593 | return -1; | 1582 | return -1; |
1594 | } | 1583 | } |
1595 | #else | 1584 | #else |
@@ -1601,8 +1590,8 @@ int __init APIC_init_uniprocessor(void) | |||
1601 | */ | 1590 | */ |
1602 | if (!cpu_has_apic && | 1591 | if (!cpu_has_apic && |
1603 | APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) { | 1592 | APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) { |
1604 | printk(KERN_ERR "BIOS bug, local APIC 0x%x not detected!...\n", | 1593 | pr_err("BIOS bug, local APIC 0x%x not detected!...\n", |
1605 | boot_cpu_physical_apicid); | 1594 | boot_cpu_physical_apicid); |
1606 | clear_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC); | 1595 | clear_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC); |
1607 | return -1; | 1596 | return -1; |
1608 | } | 1597 | } |
@@ -1695,8 +1684,8 @@ void smp_spurious_interrupt(struct pt_regs *regs) | |||
1695 | add_pda(irq_spurious_count, 1); | 1684 | add_pda(irq_spurious_count, 1); |
1696 | #else | 1685 | #else |
1697 | /* see sw-dev-man vol 3, chapter 7.4.13.5 */ | 1686 | /* see sw-dev-man vol 3, chapter 7.4.13.5 */ |
1698 | printk(KERN_INFO "spurious APIC interrupt on CPU#%d, " | 1687 | pr_info("spurious APIC interrupt on CPU#%d, " |
1699 | "should never happen.\n", smp_processor_id()); | 1688 | "should never happen.\n", smp_processor_id()); |
1700 | __get_cpu_var(irq_stat).irq_spurious_count++; | 1689 | __get_cpu_var(irq_stat).irq_spurious_count++; |
1701 | #endif | 1690 | #endif |
1702 | irq_exit(); | 1691 | irq_exit(); |
@@ -1720,17 +1709,18 @@ void smp_error_interrupt(struct pt_regs *regs) | |||
1720 | ack_APIC_irq(); | 1709 | ack_APIC_irq(); |
1721 | atomic_inc(&irq_err_count); | 1710 | atomic_inc(&irq_err_count); |
1722 | 1711 | ||
1723 | /* Here is what the APIC error bits mean: | 1712 | /* |
1724 | 0: Send CS error | 1713 | * Here is what the APIC error bits mean: |
1725 | 1: Receive CS error | 1714 | * 0: Send CS error |
1726 | 2: Send accept error | 1715 | * 1: Receive CS error |
1727 | 3: Receive accept error | 1716 | * 2: Send accept error |
1728 | 4: Reserved | 1717 | * 3: Receive accept error |
1729 | 5: Send illegal vector | 1718 | * 4: Reserved |
1730 | 6: Received illegal vector | 1719 | * 5: Send illegal vector |
1731 | 7: Illegal register address | 1720 | * 6: Received illegal vector |
1732 | */ | 1721 | * 7: Illegal register address |
1733 | printk(KERN_DEBUG "APIC error on CPU%d: %02x(%02x)\n", | 1722 | */ |
1723 | pr_debug("APIC error on CPU%d: %02x(%02x)\n", | ||
1734 | smp_processor_id(), v , v1); | 1724 | smp_processor_id(), v , v1); |
1735 | irq_exit(); | 1725 | irq_exit(); |
1736 | } | 1726 | } |
@@ -1834,15 +1824,15 @@ void __cpuinit generic_processor_info(int apicid, int version) | |||
1834 | * Validate version | 1824 | * Validate version |
1835 | */ | 1825 | */ |
1836 | if (version == 0x0) { | 1826 | if (version == 0x0) { |
1837 | printk(KERN_WARNING "BIOS bug, APIC version is 0 for CPU#%d! " | 1827 | pr_warning("BIOS bug, APIC version is 0 for CPU#%d! " |
1838 | "fixing up to 0x10. (tell your hw vendor)\n", | 1828 | "fixing up to 0x10. (tell your hw vendor)\n", |
1839 | version); | 1829 | version); |
1840 | version = 0x10; | 1830 | version = 0x10; |
1841 | } | 1831 | } |
1842 | apic_version[apicid] = version; | 1832 | apic_version[apicid] = version; |
1843 | 1833 | ||
1844 | if (num_processors >= NR_CPUS) { | 1834 | if (num_processors >= NR_CPUS) { |
1845 | printk(KERN_WARNING "WARNING: NR_CPUS limit of %i reached." | 1835 | pr_warning("WARNING: NR_CPUS limit of %i reached." |
1846 | " Processor ignored.\n", NR_CPUS); | 1836 | " Processor ignored.\n", NR_CPUS); |
1847 | return; | 1837 | return; |
1848 | } | 1838 | } |
@@ -2205,7 +2195,7 @@ static int __init apic_set_verbosity(char *arg) | |||
2205 | else if (strcmp("verbose", arg) == 0) | 2195 | else if (strcmp("verbose", arg) == 0) |
2206 | apic_verbosity = APIC_VERBOSE; | 2196 | apic_verbosity = APIC_VERBOSE; |
2207 | else { | 2197 | else { |
2208 | printk(KERN_WARNING "APIC Verbosity level %s not recognised" | 2198 | pr_warning("APIC Verbosity level %s not recognised" |
2209 | " use apic=verbose or apic=debug\n", arg); | 2199 | " use apic=verbose or apic=debug\n", arg); |
2210 | return -EINVAL; | 2200 | return -EINVAL; |
2211 | } | 2201 | } |