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authorLinus Torvalds <torvalds@linux-foundation.org>2010-08-06 19:24:17 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2010-08-06 19:24:17 -0400
commit66cd55d2b903643cbd019ef97a5305d9428d3865 (patch)
tree454a5af22b1aaf8fe62689974342a784f6f38822 /arch/x86/include
parent75cb5fdce29c77ec54db45f0c6be7cc5715f8e15 (diff)
parent3b770a2128423a687e6e9c57184a584fb4ba4c77 (diff)
Merge branch 'x86-alternatives-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-alternatives-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, alternatives: BUG on encountering an invalid CPU feature number x86, alternatives: Fix one more open-coded 8-bit alternative number x86, alternatives: Use 16-bit numbers for cpufeature index
Diffstat (limited to 'arch/x86/include')
-rw-r--r--arch/x86/include/asm/alternative.h7
-rw-r--r--arch/x86/include/asm/cpufeature.h14
2 files changed, 12 insertions, 9 deletions
diff --git a/arch/x86/include/asm/alternative.h b/arch/x86/include/asm/alternative.h
index 03b6bb5394a0..bc6abb7bc7ee 100644
--- a/arch/x86/include/asm/alternative.h
+++ b/arch/x86/include/asm/alternative.h
@@ -45,10 +45,9 @@
45struct alt_instr { 45struct alt_instr {
46 u8 *instr; /* original instruction */ 46 u8 *instr; /* original instruction */
47 u8 *replacement; 47 u8 *replacement;
48 u8 cpuid; /* cpuid bit set for replacement */ 48 u16 cpuid; /* cpuid bit set for replacement */
49 u8 instrlen; /* length of original instruction */ 49 u8 instrlen; /* length of original instruction */
50 u8 replacementlen; /* length of new instruction, <= instrlen */ 50 u8 replacementlen; /* length of new instruction, <= instrlen */
51 u8 pad1;
52#ifdef CONFIG_X86_64 51#ifdef CONFIG_X86_64
53 u32 pad2; 52 u32 pad2;
54#endif 53#endif
@@ -86,9 +85,11 @@ static inline int alternatives_text_reserved(void *start, void *end)
86 _ASM_ALIGN "\n" \ 85 _ASM_ALIGN "\n" \
87 _ASM_PTR "661b\n" /* label */ \ 86 _ASM_PTR "661b\n" /* label */ \
88 _ASM_PTR "663f\n" /* new instruction */ \ 87 _ASM_PTR "663f\n" /* new instruction */ \
89 " .byte " __stringify(feature) "\n" /* feature bit */ \ 88 " .word " __stringify(feature) "\n" /* feature bit */ \
90 " .byte 662b-661b\n" /* sourcelen */ \ 89 " .byte 662b-661b\n" /* sourcelen */ \
91 " .byte 664f-663f\n" /* replacementlen */ \ 90 " .byte 664f-663f\n" /* replacementlen */ \
91 ".previous\n" \
92 ".section .discard,\"aw\",@progbits\n" \
92 " .byte 0xff + (664f-663f) - (662b-661b)\n" /* rlen <= slen */ \ 93 " .byte 0xff + (664f-663f) - (662b-661b)\n" /* rlen <= slen */ \
93 ".previous\n" \ 94 ".previous\n" \
94 ".section .altinstr_replacement, \"ax\"\n" \ 95 ".section .altinstr_replacement, \"ax\"\n" \
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 0b205b8a4308..781a50b29a49 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -302,7 +302,7 @@ extern const char * const x86_power_flags[32];
302 * patch the target code for additional performance. 302 * patch the target code for additional performance.
303 * 303 *
304 */ 304 */
305static __always_inline __pure bool __static_cpu_has(u8 bit) 305static __always_inline __pure bool __static_cpu_has(u16 bit)
306{ 306{
307#if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) 307#if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
308 asm goto("1: jmp %l[t_no]\n" 308 asm goto("1: jmp %l[t_no]\n"
@@ -311,11 +311,11 @@ static __always_inline __pure bool __static_cpu_has(u8 bit)
311 _ASM_ALIGN "\n" 311 _ASM_ALIGN "\n"
312 _ASM_PTR "1b\n" 312 _ASM_PTR "1b\n"
313 _ASM_PTR "0\n" /* no replacement */ 313 _ASM_PTR "0\n" /* no replacement */
314 " .byte %P0\n" /* feature bit */ 314 " .word %P0\n" /* feature bit */
315 " .byte 2b - 1b\n" /* source len */ 315 " .byte 2b - 1b\n" /* source len */
316 " .byte 0\n" /* replacement len */ 316 " .byte 0\n" /* replacement len */
317 " .byte 0xff + 0 - (2b-1b)\n" /* padding */
318 ".previous\n" 317 ".previous\n"
318 /* skipping size check since replacement size = 0 */
319 : : "i" (bit) : : t_no); 319 : : "i" (bit) : : t_no);
320 return true; 320 return true;
321 t_no: 321 t_no:
@@ -329,10 +329,12 @@ static __always_inline __pure bool __static_cpu_has(u8 bit)
329 _ASM_ALIGN "\n" 329 _ASM_ALIGN "\n"
330 _ASM_PTR "1b\n" 330 _ASM_PTR "1b\n"
331 _ASM_PTR "3f\n" 331 _ASM_PTR "3f\n"
332 " .byte %P1\n" /* feature bit */ 332 " .word %P1\n" /* feature bit */
333 " .byte 2b - 1b\n" /* source len */ 333 " .byte 2b - 1b\n" /* source len */
334 " .byte 4f - 3f\n" /* replacement len */ 334 " .byte 4f - 3f\n" /* replacement len */
335 " .byte 0xff + (4f-3f) - (2b-1b)\n" /* padding */ 335 ".previous\n"
336 ".section .discard,\"aw\",@progbits\n"
337 " .byte 0xff + (4f-3f) - (2b-1b)\n" /* size check */
336 ".previous\n" 338 ".previous\n"
337 ".section .altinstr_replacement,\"ax\"\n" 339 ".section .altinstr_replacement,\"ax\"\n"
338 "3: movb $1,%0\n" 340 "3: movb $1,%0\n"
@@ -348,7 +350,7 @@ static __always_inline __pure bool __static_cpu_has(u8 bit)
348( \ 350( \
349 __builtin_constant_p(boot_cpu_has(bit)) ? \ 351 __builtin_constant_p(boot_cpu_has(bit)) ? \
350 boot_cpu_has(bit) : \ 352 boot_cpu_has(bit) : \
351 (__builtin_constant_p(bit) && !((bit) & ~0xff)) ? \ 353 __builtin_constant_p(bit) ? \
352 __static_cpu_has(bit) : \ 354 __static_cpu_has(bit) : \
353 boot_cpu_has(bit) \ 355 boot_cpu_has(bit) \
354) 356)