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authorKuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>2013-10-17 18:35:32 -0400
committerH. Peter Anvin <hpa@linux.intel.com>2013-10-17 19:40:50 -0400
commit49c72a0a8ad640fa6026962056eeaf85a4ce79fd (patch)
tree4c138230a1b6b4b357fb2f99b1e033272decb018 /arch/x86/include
parent3fd79ae4275001f293dbd170479e89df6c433226 (diff)
intel_mid: Added custom handler for ipc devices
Added a custom handler for medfield based ipc devices and moved devs_id structure defintion to header file. Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Link: http://lkml.kernel.org/r/1382049336-21316-9-git-send-email-david.a.cohen@linux.intel.com Signed-off-by: David Cohen <david.a.cohen@linux.intel.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'arch/x86/include')
-rw-r--r--arch/x86/include/asm/intel-mid.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/x86/include/asm/intel-mid.h b/arch/x86/include/asm/intel-mid.h
index beb7a5f1862a..ad236ae45c1f 100644
--- a/arch/x86/include/asm/intel-mid.h
+++ b/arch/x86/include/asm/intel-mid.h
@@ -19,6 +19,21 @@ extern int sfi_mrtc_num;
19extern struct sfi_rtc_table_entry sfi_mrtc_array[]; 19extern struct sfi_rtc_table_entry sfi_mrtc_array[];
20 20
21/* 21/*
22 * Here defines the array of devices platform data that IAFW would export
23 * through SFI "DEVS" table, we use name and type to match the device and
24 * its platform data.
25 */
26struct devs_id {
27 char name[SFI_NAME_LEN + 1];
28 u8 type;
29 u8 delay;
30 void *(*get_platform_data)(void *info);
31 /* Custom handler for devices */
32 void (*device_handler)(struct sfi_device_table_entry *pentry,
33 struct devs_id *dev);
34};
35
36/*
22 * Medfield is the follow-up of Moorestown, it combines two chip solution into 37 * Medfield is the follow-up of Moorestown, it combines two chip solution into
23 * one. Other than that it also added always-on and constant tsc and lapic 38 * one. Other than that it also added always-on and constant tsc and lapic
24 * timers. Medfield is the platform name, and the chip name is called Penwell 39 * timers. Medfield is the platform name, and the chip name is called Penwell