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author | Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> | 2009-02-11 14:52:22 -0500 |
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committer | Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> | 2009-02-11 14:52:22 -0500 |
commit | 9049a11de73d3ecc623f1903100d099f82ede56c (patch) | |
tree | c03d130d58168e337a66fe999682452b7a02b42b /arch/x86/include/asm/stackprotector.h | |
parent | c47c1b1f3a9d6973108020df1dcab7604f7774dd (diff) | |
parent | e4d0407185cdbdcfd99fc23bde2e5454bbc46329 (diff) |
Merge commit 'remotes/tip/x86/paravirt' into x86/untangle2
* commit 'remotes/tip/x86/paravirt': (175 commits)
xen: use direct ops on 64-bit
xen: make direct versions of irq_enable/disable/save/restore to common code
xen: setup percpu data pointers
xen: fix 32-bit build resulting from mmu move
x86/paravirt: return full 64-bit result
x86, percpu: fix kexec with vmlinux
x86/vmi: fix interrupt enable/disable/save/restore calling convention.
x86/paravirt: don't restore second return reg
xen: setup percpu data pointers
x86: split loading percpu segments from loading gdt
x86: pass in cpu number to switch_to_new_gdt()
x86: UV fix uv_flush_send_and_wait()
x86/paravirt: fix missing callee-save call on pud_val
x86/paravirt: use callee-saved convention for pte_val/make_pte/etc
x86/paravirt: implement PVOP_CALL macros for callee-save functions
x86/paravirt: add register-saving thunks to reduce caller register pressure
x86/paravirt: selectively save/restore regs around pvops calls
x86: fix paravirt clobber in entry_64.S
x86/pvops: add a paravirt_ident functions to allow special patching
xen: move remaining mmu-related stuff into mmu.c
...
Conflicts:
arch/x86/mach-voyager/voyager_smp.c
arch/x86/mm/fault.c
Diffstat (limited to 'arch/x86/include/asm/stackprotector.h')
-rw-r--r-- | arch/x86/include/asm/stackprotector.h | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/x86/include/asm/stackprotector.h b/arch/x86/include/asm/stackprotector.h new file mode 100644 index 000000000000..36a700acaf2b --- /dev/null +++ b/arch/x86/include/asm/stackprotector.h | |||
@@ -0,0 +1,38 @@ | |||
1 | #ifndef _ASM_STACKPROTECTOR_H | ||
2 | #define _ASM_STACKPROTECTOR_H 1 | ||
3 | |||
4 | #include <asm/tsc.h> | ||
5 | #include <asm/processor.h> | ||
6 | |||
7 | /* | ||
8 | * Initialize the stackprotector canary value. | ||
9 | * | ||
10 | * NOTE: this must only be called from functions that never return, | ||
11 | * and it must always be inlined. | ||
12 | */ | ||
13 | static __always_inline void boot_init_stack_canary(void) | ||
14 | { | ||
15 | u64 canary; | ||
16 | u64 tsc; | ||
17 | |||
18 | /* | ||
19 | * Build time only check to make sure the stack_canary is at | ||
20 | * offset 40 in the pda; this is a gcc ABI requirement | ||
21 | */ | ||
22 | BUILD_BUG_ON(offsetof(union irq_stack_union, stack_canary) != 40); | ||
23 | |||
24 | /* | ||
25 | * We both use the random pool and the current TSC as a source | ||
26 | * of randomness. The TSC only matters for very early init, | ||
27 | * there it already has some randomness on most systems. Later | ||
28 | * on during the bootup the random pool has true entropy too. | ||
29 | */ | ||
30 | get_random_bytes(&canary, sizeof(canary)); | ||
31 | tsc = __native_read_tsc(); | ||
32 | canary += tsc + (tsc << 32UL); | ||
33 | |||
34 | current->stack_canary = canary; | ||
35 | percpu_write(irq_stack_union.stack_canary, canary); | ||
36 | } | ||
37 | |||
38 | #endif | ||