Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp

Conflicts:
	litmus/sched_cedf.c

1 files changed, 26 insertions, 8 deletions

diff --git a/arch/x86/include/asm/pgtable-3level.h b/arch/x86/include/asm/pgtable-3level.h
index 177b0165ea01..effff47a3c82 100644
--- a/arch/x86/include/asm/pgtable-3level.h
+++ b/arch/x86/include/asm/pgtable-3level.h
@@ -69,8 +69,6 @@ static inline void native_pmd_clear(pmd_t *pmd)
 
 static inline void pud_clear(pud_t *pudp)
 {
-        unsigned long pgd;
-
         set_pud(pudp, __pud(0));
 
         /*
@@ -79,13 +77,10 @@ static inline void pud_clear(pud_t *pudp)
          * section 8.1: in PAE mode we explicitly have to flush the
          * TLB via cr3 if the top-level pgd is changed...
          *
-         * Make sure the pud entry we're updating is within the
-         * current pgd to avoid unnecessary TLB flushes.
+         * Currently all places where pud_clear() is called either have
+         * flush_tlb_mm() followed or don't need TLB flush (x86_64 code or
+         * pud_clear_bad()), so we don't need TLB flush here.
          */
-        pgd = read_cr3();
-        if (__pa(pudp) >= pgd && __pa(pudp) <
-            (pgd + sizeof(pgd_t)*PTRS_PER_PGD))
-                write_cr3(pgd);
 }
 
 #ifdef CONFIG_SMP
@@ -104,6 +99,29 @@ static inline pte_t native_ptep_get_and_clear(pte_t *ptep)
 #define native_ptep_get_and_clear(xp) native_local_ptep_get_and_clear(xp)
 #endif
 
+#ifdef CONFIG_SMP
+union split_pmd {
+        struct {
+                u32 pmd_low;
+                u32 pmd_high;
+        };
+        pmd_t pmd;
+};
+static inline pmd_t native_pmdp_get_and_clear(pmd_t *pmdp)
+{
+        union split_pmd res, *orig = (union split_pmd *)pmdp;
+
+        /* xchg acts as a barrier before setting of the high bits */
+        res.pmd_low = xchg(&orig->pmd_low, 0);
+        res.pmd_high = orig->pmd_high;
+        orig->pmd_high = 0;
+
+        return res.pmd;
+}
+#else
+#define native_pmdp_get_and_clear(xp) native_local_pmdp_get_and_clear(xp)
+#endif
+
 /*
  * Bits 0, 6 and 7 are taken in the low part of the pte,
  * put the 32 bits of offset into the high part.