diff options
author | Jan Beulich <JBeulich@suse.com> | 2012-09-10 07:04:16 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@kernel.org> | 2012-09-13 11:43:58 -0400 |
commit | 1edfbb4153bd29bcf8d2236676238d5237972be1 (patch) | |
tree | 2c1e7fdf7f0d25adf12e6b334194dcbd2c6e3e56 /arch/x86/include/asm/bitops.h | |
parent | 6eebdda35e6b18d0dddb2a44e34211bd94f0cad6 (diff) |
x86/64: Adjust types of temporaries used by ffs()/fls()/fls64()
The 64-bit special cases of the former two (the thrird one is
64-bit only anyway) don't need to use "long" temporaries, as the
result will always fit in a 32-bit variable, and the functions
return plain "int". This avoids a few REX prefixes, i.e.
minimally reduces code size.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Link: http://lkml.kernel.org/r/504DE550020000780009A258@nat28.tlf.novell.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/include/asm/bitops.h')
-rw-r--r-- | arch/x86/include/asm/bitops.h | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h index 72f5009deb5a..ebaee695394e 100644 --- a/arch/x86/include/asm/bitops.h +++ b/arch/x86/include/asm/bitops.h | |||
@@ -417,10 +417,9 @@ static inline int ffs(int x) | |||
417 | * We cannot do this on 32 bits because at the very least some | 417 | * We cannot do this on 32 bits because at the very least some |
418 | * 486 CPUs did not behave this way. | 418 | * 486 CPUs did not behave this way. |
419 | */ | 419 | */ |
420 | long tmp = -1; | ||
421 | asm("bsfl %1,%0" | 420 | asm("bsfl %1,%0" |
422 | : "=r" (r) | 421 | : "=r" (r) |
423 | : "rm" (x), "0" (tmp)); | 422 | : "rm" (x), "0" (-1)); |
424 | #elif defined(CONFIG_X86_CMOV) | 423 | #elif defined(CONFIG_X86_CMOV) |
425 | asm("bsfl %1,%0\n\t" | 424 | asm("bsfl %1,%0\n\t" |
426 | "cmovzl %2,%0" | 425 | "cmovzl %2,%0" |
@@ -459,10 +458,9 @@ static inline int fls(int x) | |||
459 | * We cannot do this on 32 bits because at the very least some | 458 | * We cannot do this on 32 bits because at the very least some |
460 | * 486 CPUs did not behave this way. | 459 | * 486 CPUs did not behave this way. |
461 | */ | 460 | */ |
462 | long tmp = -1; | ||
463 | asm("bsrl %1,%0" | 461 | asm("bsrl %1,%0" |
464 | : "=r" (r) | 462 | : "=r" (r) |
465 | : "rm" (x), "0" (tmp)); | 463 | : "rm" (x), "0" (-1)); |
466 | #elif defined(CONFIG_X86_CMOV) | 464 | #elif defined(CONFIG_X86_CMOV) |
467 | asm("bsrl %1,%0\n\t" | 465 | asm("bsrl %1,%0\n\t" |
468 | "cmovzl %2,%0" | 466 | "cmovzl %2,%0" |
@@ -490,13 +488,13 @@ static inline int fls(int x) | |||
490 | #ifdef CONFIG_X86_64 | 488 | #ifdef CONFIG_X86_64 |
491 | static __always_inline int fls64(__u64 x) | 489 | static __always_inline int fls64(__u64 x) |
492 | { | 490 | { |
493 | long bitpos = -1; | 491 | int bitpos = -1; |
494 | /* | 492 | /* |
495 | * AMD64 says BSRQ won't clobber the dest reg if x==0; Intel64 says the | 493 | * AMD64 says BSRQ won't clobber the dest reg if x==0; Intel64 says the |
496 | * dest reg is undefined if x==0, but their CPU architect says its | 494 | * dest reg is undefined if x==0, but their CPU architect says its |
497 | * value is written to set it to the same as before. | 495 | * value is written to set it to the same as before. |
498 | */ | 496 | */ |
499 | asm("bsrq %1,%0" | 497 | asm("bsrq %1,%q0" |
500 | : "+r" (bitpos) | 498 | : "+r" (bitpos) |
501 | : "rm" (x)); | 499 | : "rm" (x)); |
502 | return bitpos + 1; | 500 | return bitpos + 1; |