aboutsummaryrefslogtreecommitdiffstats
path: root/arch/x86/crypto
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2013-06-21 12:28:39 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2013-06-21 12:28:39 -0400
commit92616ee65422d03930816250cb1e6ce7493cf14d (patch)
tree648ceee001f717be24058a4dad6b27f8232f9532 /arch/x86/crypto
parent7ecba6f2f3f6e862287e07908ba583199c7772a9 (diff)
parentfe6510b5d6349a8999b83ef7c5671e5a561b803a (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
Pull crypto fix from Herbert Xu: "This fixes an unaligned crash in XTS mode when using aseni_intel" * git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: crypto: aesni_intel - fix accessing of unaligned memory
Diffstat (limited to 'arch/x86/crypto')
-rw-r--r--arch/x86/crypto/aesni-intel_asm.S48
1 files changed, 32 insertions, 16 deletions
diff --git a/arch/x86/crypto/aesni-intel_asm.S b/arch/x86/crypto/aesni-intel_asm.S
index 62fe22cd4cba..477e9d75149b 100644
--- a/arch/x86/crypto/aesni-intel_asm.S
+++ b/arch/x86/crypto/aesni-intel_asm.S
@@ -2681,56 +2681,68 @@ ENTRY(aesni_xts_crypt8)
2681 addq %rcx, KEYP 2681 addq %rcx, KEYP
2682 2682
2683 movdqa IV, STATE1 2683 movdqa IV, STATE1
2684 pxor 0x00(INP), STATE1 2684 movdqu 0x00(INP), INC
2685 pxor INC, STATE1
2685 movdqu IV, 0x00(OUTP) 2686 movdqu IV, 0x00(OUTP)
2686 2687
2687 _aesni_gf128mul_x_ble() 2688 _aesni_gf128mul_x_ble()
2688 movdqa IV, STATE2 2689 movdqa IV, STATE2
2689 pxor 0x10(INP), STATE2 2690 movdqu 0x10(INP), INC
2691 pxor INC, STATE2
2690 movdqu IV, 0x10(OUTP) 2692 movdqu IV, 0x10(OUTP)
2691 2693
2692 _aesni_gf128mul_x_ble() 2694 _aesni_gf128mul_x_ble()
2693 movdqa IV, STATE3 2695 movdqa IV, STATE3
2694 pxor 0x20(INP), STATE3 2696 movdqu 0x20(INP), INC
2697 pxor INC, STATE3
2695 movdqu IV, 0x20(OUTP) 2698 movdqu IV, 0x20(OUTP)
2696 2699
2697 _aesni_gf128mul_x_ble() 2700 _aesni_gf128mul_x_ble()
2698 movdqa IV, STATE4 2701 movdqa IV, STATE4
2699 pxor 0x30(INP), STATE4 2702 movdqu 0x30(INP), INC
2703 pxor INC, STATE4
2700 movdqu IV, 0x30(OUTP) 2704 movdqu IV, 0x30(OUTP)
2701 2705
2702 call *%r11 2706 call *%r11
2703 2707
2704 pxor 0x00(OUTP), STATE1 2708 movdqu 0x00(OUTP), INC
2709 pxor INC, STATE1
2705 movdqu STATE1, 0x00(OUTP) 2710 movdqu STATE1, 0x00(OUTP)
2706 2711
2707 _aesni_gf128mul_x_ble() 2712 _aesni_gf128mul_x_ble()
2708 movdqa IV, STATE1 2713 movdqa IV, STATE1
2709 pxor 0x40(INP), STATE1 2714 movdqu 0x40(INP), INC
2715 pxor INC, STATE1
2710 movdqu IV, 0x40(OUTP) 2716 movdqu IV, 0x40(OUTP)
2711 2717
2712 pxor 0x10(OUTP), STATE2 2718 movdqu 0x10(OUTP), INC
2719 pxor INC, STATE2
2713 movdqu STATE2, 0x10(OUTP) 2720 movdqu STATE2, 0x10(OUTP)
2714 2721
2715 _aesni_gf128mul_x_ble() 2722 _aesni_gf128mul_x_ble()
2716 movdqa IV, STATE2 2723 movdqa IV, STATE2
2717 pxor 0x50(INP), STATE2 2724 movdqu 0x50(INP), INC
2725 pxor INC, STATE2
2718 movdqu IV, 0x50(OUTP) 2726 movdqu IV, 0x50(OUTP)
2719 2727
2720 pxor 0x20(OUTP), STATE3 2728 movdqu 0x20(OUTP), INC
2729 pxor INC, STATE3
2721 movdqu STATE3, 0x20(OUTP) 2730 movdqu STATE3, 0x20(OUTP)
2722 2731
2723 _aesni_gf128mul_x_ble() 2732 _aesni_gf128mul_x_ble()
2724 movdqa IV, STATE3 2733 movdqa IV, STATE3
2725 pxor 0x60(INP), STATE3 2734 movdqu 0x60(INP), INC
2735 pxor INC, STATE3
2726 movdqu IV, 0x60(OUTP) 2736 movdqu IV, 0x60(OUTP)
2727 2737
2728 pxor 0x30(OUTP), STATE4 2738 movdqu 0x30(OUTP), INC
2739 pxor INC, STATE4
2729 movdqu STATE4, 0x30(OUTP) 2740 movdqu STATE4, 0x30(OUTP)
2730 2741
2731 _aesni_gf128mul_x_ble() 2742 _aesni_gf128mul_x_ble()
2732 movdqa IV, STATE4 2743 movdqa IV, STATE4
2733 pxor 0x70(INP), STATE4 2744 movdqu 0x70(INP), INC
2745 pxor INC, STATE4
2734 movdqu IV, 0x70(OUTP) 2746 movdqu IV, 0x70(OUTP)
2735 2747
2736 _aesni_gf128mul_x_ble() 2748 _aesni_gf128mul_x_ble()
@@ -2738,16 +2750,20 @@ ENTRY(aesni_xts_crypt8)
2738 2750
2739 call *%r11 2751 call *%r11
2740 2752
2741 pxor 0x40(OUTP), STATE1 2753 movdqu 0x40(OUTP), INC
2754 pxor INC, STATE1
2742 movdqu STATE1, 0x40(OUTP) 2755 movdqu STATE1, 0x40(OUTP)
2743 2756
2744 pxor 0x50(OUTP), STATE2 2757 movdqu 0x50(OUTP), INC
2758 pxor INC, STATE2
2745 movdqu STATE2, 0x50(OUTP) 2759 movdqu STATE2, 0x50(OUTP)
2746 2760
2747 pxor 0x60(OUTP), STATE3 2761 movdqu 0x60(OUTP), INC
2762 pxor INC, STATE3
2748 movdqu STATE3, 0x60(OUTP) 2763 movdqu STATE3, 0x60(OUTP)
2749 2764
2750 pxor 0x70(OUTP), STATE4 2765 movdqu 0x70(OUTP), INC
2766 pxor INC, STATE4
2751 movdqu STATE4, 0x70(OUTP) 2767 movdqu STATE4, 0x70(OUTP)
2752 2768
2753 ret 2769 ret