diff options
author | H. Peter Anvin <hpa@linux.intel.com> | 2009-04-01 21:20:11 -0400 |
---|---|---|
committer | H. Peter Anvin <hpa@zytor.com> | 2009-04-09 19:08:12 -0400 |
commit | cf06de7b9cdd3efee7a59dced1977b3c21d43732 (patch) | |
tree | 22a4fd8675461fc35756573a3964e07a236cb71b /arch/x86/boot/video-vesa.c | |
parent | 0a706db320768f8f6e43bbf73b58d2aabdc93354 (diff) |
x86, setup: "glove box" BIOS interrupts in the video code
Impact: BIOS proofing
"Glove box" off BIOS interrupts in the video code.
LKML-Reference: <49DE7F79.4030106@zytor.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Rafael J. Wysocki <rjw@sisk.pl>
Diffstat (limited to 'arch/x86/boot/video-vesa.c')
-rw-r--r-- | arch/x86/boot/video-vesa.c | 137 |
1 files changed, 60 insertions, 77 deletions
diff --git a/arch/x86/boot/video-vesa.c b/arch/x86/boot/video-vesa.c index 4a58c8ce3f69..c700147d6ffb 100644 --- a/arch/x86/boot/video-vesa.c +++ b/arch/x86/boot/video-vesa.c | |||
@@ -2,6 +2,7 @@ | |||
2 | * | 2 | * |
3 | * Copyright (C) 1991, 1992 Linus Torvalds | 3 | * Copyright (C) 1991, 1992 Linus Torvalds |
4 | * Copyright 2007 rPath, Inc. - All Rights Reserved | 4 | * Copyright 2007 rPath, Inc. - All Rights Reserved |
5 | * Copyright 2009 Intel Corporation; author H. Peter Anvin | ||
5 | * | 6 | * |
6 | * This file is part of the Linux kernel, and is made available under | 7 | * This file is part of the Linux kernel, and is made available under |
7 | * the terms of the GNU General Public License version 2. | 8 | * the terms of the GNU General Public License version 2. |
@@ -31,7 +32,7 @@ static inline void vesa_store_mode_params_graphics(void) {} | |||
31 | static int vesa_probe(void) | 32 | static int vesa_probe(void) |
32 | { | 33 | { |
33 | #if defined(CONFIG_VIDEO_VESA) || defined(CONFIG_FIRMWARE_EDID) | 34 | #if defined(CONFIG_VIDEO_VESA) || defined(CONFIG_FIRMWARE_EDID) |
34 | u16 ax, cx, di; | 35 | struct biosregs ireg, oreg; |
35 | u16 mode; | 36 | u16 mode; |
36 | addr_t mode_ptr; | 37 | addr_t mode_ptr; |
37 | struct mode_info *mi; | 38 | struct mode_info *mi; |
@@ -39,13 +40,12 @@ static int vesa_probe(void) | |||
39 | 40 | ||
40 | video_vesa.modes = GET_HEAP(struct mode_info, 0); | 41 | video_vesa.modes = GET_HEAP(struct mode_info, 0); |
41 | 42 | ||
42 | ax = 0x4f00; | 43 | initregs(&ireg); |
43 | di = (size_t)&vginfo; | 44 | ireg.ax = 0x4f00; |
44 | asm(INT10 | 45 | ireg.di = (size_t)&vginfo; |
45 | : "+a" (ax), "+D" (di), "=m" (vginfo) | 46 | intcall(0x10, &ireg, &oreg); |
46 | : : "ebx", "ecx", "edx", "esi"); | ||
47 | 47 | ||
48 | if (ax != 0x004f || | 48 | if (ireg.ax != 0x004f || |
49 | vginfo.signature != VESA_MAGIC || | 49 | vginfo.signature != VESA_MAGIC || |
50 | vginfo.version < 0x0102) | 50 | vginfo.version < 0x0102) |
51 | return 0; /* Not present */ | 51 | return 0; /* Not present */ |
@@ -65,14 +65,12 @@ static int vesa_probe(void) | |||
65 | 65 | ||
66 | memset(&vminfo, 0, sizeof vminfo); /* Just in case... */ | 66 | memset(&vminfo, 0, sizeof vminfo); /* Just in case... */ |
67 | 67 | ||
68 | ax = 0x4f01; | 68 | ireg.ax = 0x4f01; |
69 | cx = mode; | 69 | ireg.cx = mode; |
70 | di = (size_t)&vminfo; | 70 | ireg.di = (size_t)&vminfo; |
71 | asm(INT10 | 71 | intcall(0x10, &ireg, &oreg); |
72 | : "+a" (ax), "+c" (cx), "+D" (di), "=m" (vminfo) | ||
73 | : : "ebx", "edx", "esi"); | ||
74 | 72 | ||
75 | if (ax != 0x004f) | 73 | if (ireg.ax != 0x004f) |
76 | continue; | 74 | continue; |
77 | 75 | ||
78 | if ((vminfo.mode_attr & 0x15) == 0x05) { | 76 | if ((vminfo.mode_attr & 0x15) == 0x05) { |
@@ -111,20 +109,19 @@ static int vesa_probe(void) | |||
111 | 109 | ||
112 | static int vesa_set_mode(struct mode_info *mode) | 110 | static int vesa_set_mode(struct mode_info *mode) |
113 | { | 111 | { |
114 | u16 ax, bx, cx, di; | 112 | struct biosregs ireg, oreg; |
115 | int is_graphic; | 113 | int is_graphic; |
116 | u16 vesa_mode = mode->mode - VIDEO_FIRST_VESA; | 114 | u16 vesa_mode = mode->mode - VIDEO_FIRST_VESA; |
117 | 115 | ||
118 | memset(&vminfo, 0, sizeof vminfo); /* Just in case... */ | 116 | memset(&vminfo, 0, sizeof vminfo); /* Just in case... */ |
119 | 117 | ||
120 | ax = 0x4f01; | 118 | initregs(&ireg); |
121 | cx = vesa_mode; | 119 | ireg.ax = 0x4f01; |
122 | di = (size_t)&vminfo; | 120 | ireg.cx = vesa_mode; |
123 | asm(INT10 | 121 | ireg.di = (size_t)&vminfo; |
124 | : "+a" (ax), "+c" (cx), "+D" (di), "=m" (vminfo) | 122 | intcall(0x10, &ireg, &oreg); |
125 | : : "ebx", "edx", "esi"); | ||
126 | 123 | ||
127 | if (ax != 0x004f) | 124 | if (oreg.ax != 0x004f) |
128 | return -1; | 125 | return -1; |
129 | 126 | ||
130 | if ((vminfo.mode_attr & 0x15) == 0x05) { | 127 | if ((vminfo.mode_attr & 0x15) == 0x05) { |
@@ -141,14 +138,12 @@ static int vesa_set_mode(struct mode_info *mode) | |||
141 | } | 138 | } |
142 | 139 | ||
143 | 140 | ||
144 | ax = 0x4f02; | 141 | initregs(&ireg); |
145 | bx = vesa_mode; | 142 | ireg.ax = 0x4f02; |
146 | di = 0; | 143 | ireg.bx = vesa_mode; |
147 | asm volatile(INT10 | 144 | intcall(0x10, &ireg, &oreg); |
148 | : "+a" (ax), "+b" (bx), "+D" (di) | ||
149 | : : "ecx", "edx", "esi"); | ||
150 | 145 | ||
151 | if (ax != 0x004f) | 146 | if (oreg.ax != 0x004f) |
152 | return -1; | 147 | return -1; |
153 | 148 | ||
154 | graphic_mode = is_graphic; | 149 | graphic_mode = is_graphic; |
@@ -171,50 +166,45 @@ static int vesa_set_mode(struct mode_info *mode) | |||
171 | /* Switch DAC to 8-bit mode */ | 166 | /* Switch DAC to 8-bit mode */ |
172 | static void vesa_dac_set_8bits(void) | 167 | static void vesa_dac_set_8bits(void) |
173 | { | 168 | { |
169 | struct biosregs ireg, oreg; | ||
174 | u8 dac_size = 6; | 170 | u8 dac_size = 6; |
175 | 171 | ||
176 | /* If possible, switch the DAC to 8-bit mode */ | 172 | /* If possible, switch the DAC to 8-bit mode */ |
177 | if (vginfo.capabilities & 1) { | 173 | if (vginfo.capabilities & 1) { |
178 | u16 ax, bx; | 174 | initregs(&ireg); |
179 | 175 | ireg.ax = 0x4f08; | |
180 | ax = 0x4f08; | 176 | ireg.bh = 0x08; |
181 | bx = 0x0800; | 177 | intcall(0x10, &ireg, &oreg); |
182 | asm volatile(INT10 | 178 | if (oreg.ax == 0x004f) |
183 | : "+a" (ax), "+b" (bx) | 179 | dac_size = oreg.bh; |
184 | : : "ecx", "edx", "esi", "edi"); | ||
185 | |||
186 | if (ax == 0x004f) | ||
187 | dac_size = bx >> 8; | ||
188 | } | 180 | } |
189 | 181 | ||
190 | /* Set the color sizes to the DAC size, and offsets to 0 */ | 182 | /* Set the color sizes to the DAC size, and offsets to 0 */ |
191 | boot_params.screen_info.red_size = dac_size; | 183 | boot_params.screen_info.red_size = dac_size; |
192 | boot_params.screen_info.green_size = dac_size; | 184 | boot_params.screen_info.green_size = dac_size; |
193 | boot_params.screen_info.blue_size = dac_size; | 185 | boot_params.screen_info.blue_size = dac_size; |
194 | boot_params.screen_info.rsvd_size = dac_size; | 186 | boot_params.screen_info.rsvd_size = dac_size; |
195 | 187 | ||
196 | boot_params.screen_info.red_pos = 0; | 188 | boot_params.screen_info.red_pos = 0; |
197 | boot_params.screen_info.green_pos = 0; | 189 | boot_params.screen_info.green_pos = 0; |
198 | boot_params.screen_info.blue_pos = 0; | 190 | boot_params.screen_info.blue_pos = 0; |
199 | boot_params.screen_info.rsvd_pos = 0; | 191 | boot_params.screen_info.rsvd_pos = 0; |
200 | } | 192 | } |
201 | 193 | ||
202 | /* Save the VESA protected mode info */ | 194 | /* Save the VESA protected mode info */ |
203 | static void vesa_store_pm_info(void) | 195 | static void vesa_store_pm_info(void) |
204 | { | 196 | { |
205 | u16 ax, bx, di, es; | 197 | struct biosregs ireg, oreg; |
206 | 198 | ||
207 | ax = 0x4f0a; | 199 | initregs(&ireg); |
208 | bx = di = 0; | 200 | ireg.ax = 0x4f0a; |
209 | asm("pushw %%es; "INT10"; movw %%es,%0; popw %%es" | 201 | intcall(0x10, &ireg, &oreg); |
210 | : "=d" (es), "+a" (ax), "+b" (bx), "+D" (di) | ||
211 | : : "ecx", "esi"); | ||
212 | 202 | ||
213 | if (ax != 0x004f) | 203 | if (oreg.ax != 0x004f) |
214 | return; | 204 | return; |
215 | 205 | ||
216 | boot_params.screen_info.vesapm_seg = es; | 206 | boot_params.screen_info.vesapm_seg = oreg.es; |
217 | boot_params.screen_info.vesapm_off = di; | 207 | boot_params.screen_info.vesapm_off = oreg.di; |
218 | } | 208 | } |
219 | 209 | ||
220 | /* | 210 | /* |
@@ -252,7 +242,7 @@ static void vesa_store_mode_params_graphics(void) | |||
252 | void vesa_store_edid(void) | 242 | void vesa_store_edid(void) |
253 | { | 243 | { |
254 | #ifdef CONFIG_FIRMWARE_EDID | 244 | #ifdef CONFIG_FIRMWARE_EDID |
255 | u16 ax, bx, cx, dx, di; | 245 | struct biosregs ireg, oreg; |
256 | 246 | ||
257 | /* Apparently used as a nonsense token... */ | 247 | /* Apparently used as a nonsense token... */ |
258 | memset(&boot_params.edid_info, 0x13, sizeof boot_params.edid_info); | 248 | memset(&boot_params.edid_info, 0x13, sizeof boot_params.edid_info); |
@@ -260,33 +250,26 @@ void vesa_store_edid(void) | |||
260 | if (vginfo.version < 0x0200) | 250 | if (vginfo.version < 0x0200) |
261 | return; /* EDID requires VBE 2.0+ */ | 251 | return; /* EDID requires VBE 2.0+ */ |
262 | 252 | ||
263 | ax = 0x4f15; /* VBE DDC */ | 253 | initregs(&ireg); |
264 | bx = 0x0000; /* Report DDC capabilities */ | 254 | ireg.ax = 0x4f15; /* VBE DDC */ |
265 | cx = 0; /* Controller 0 */ | 255 | /* ireg.bx = 0x0000; */ /* Report DDC capabilities */ |
266 | di = 0; /* ES:DI must be 0 by spec */ | 256 | /* ireg.cx = 0; */ /* Controller 0 */ |
267 | 257 | ireg.es = 0; /* ES:DI must be 0 by spec */ | |
268 | /* Note: The VBE DDC spec is different from the main VESA spec; | 258 | intcall(0x10, &ireg, &oreg); |
269 | we genuinely have to assume all registers are destroyed here. */ | ||
270 | |||
271 | asm("pushw %%es; movw %2,%%es; "INT10"; popw %%es" | ||
272 | : "+a" (ax), "+b" (bx), "+c" (cx), "+D" (di) | ||
273 | : : "esi", "edx"); | ||
274 | 259 | ||
275 | if (ax != 0x004f) | 260 | if (oreg.ax != 0x004f) |
276 | return; /* No EDID */ | 261 | return; /* No EDID */ |
277 | 262 | ||
278 | /* BH = time in seconds to transfer EDD information */ | 263 | /* BH = time in seconds to transfer EDD information */ |
279 | /* BL = DDC level supported */ | 264 | /* BL = DDC level supported */ |
280 | 265 | ||
281 | ax = 0x4f15; /* VBE DDC */ | 266 | ireg.ax = 0x4f15; /* VBE DDC */ |
282 | bx = 0x0001; /* Read EDID */ | 267 | ireg.bx = 0x0001; /* Read EDID */ |
283 | cx = 0; /* Controller 0 */ | 268 | /* ireg.cx = 0; */ /* Controller 0 */ |
284 | dx = 0; /* EDID block number */ | 269 | /* ireg.dx = 0; */ /* EDID block number */ |
285 | di =(size_t) &boot_params.edid_info; /* (ES:)Pointer to block */ | 270 | ireg.es = ds(); |
286 | asm(INT10 | 271 | ireg.di =(size_t)&boot_params.edid_info; /* (ES:)Pointer to block */ |
287 | : "+a" (ax), "+b" (bx), "+d" (dx), "=m" (boot_params.edid_info), | 272 | intcall(0x10, &ireg, &oreg); |
288 | "+c" (cx), "+D" (di) | ||
289 | : : "esi"); | ||
290 | #endif /* CONFIG_FIRMWARE_EDID */ | 273 | #endif /* CONFIG_FIRMWARE_EDID */ |
291 | } | 274 | } |
292 | 275 | ||