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authorChris Metcalf <cmetcalf@tilera.com>2013-08-05 13:40:47 -0400
committerChris Metcalf <cmetcalf@tilera.com>2013-08-06 12:56:00 -0400
commitdc7d5cf2cab6d1fbb43c5c0569f43b7e4c822760 (patch)
tree1260be5d29786ad3ac5e515d2033095721a31c9b /arch/tile
parent8d9e53b93de7383d5bb4b3507f146bfcd83c6e5d (diff)
tile PCI RC: add dma_get_required_mask()
The standard kernel function dma_get_required_mask() uses the highest DRAM address to determine if 32-bit or 64-bit DMA addressing is needed. This only works on architectures that have direct mapping between the PA and the PCI address space, i.e. those that don't have I/O TLBs or have I/O TLB but choose to use direct mapping. Neither of these are true for tilegx. Whether to use 64-bit DMA should depend on the PCI device's capability only, not on the amount of DRAM installeds, so we now advertise a 64-bit DMA mask unconditionally. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Diffstat (limited to 'arch/tile')
-rw-r--r--arch/tile/include/asm/dma-mapping.h4
-rw-r--r--arch/tile/kernel/pci-dma.c18
2 files changed, 22 insertions, 0 deletions
diff --git a/arch/tile/include/asm/dma-mapping.h b/arch/tile/include/asm/dma-mapping.h
index 4a60059876e6..6f522d569132 100644
--- a/arch/tile/include/asm/dma-mapping.h
+++ b/arch/tile/include/asm/dma-mapping.h
@@ -20,6 +20,10 @@
20#include <linux/cache.h> 20#include <linux/cache.h>
21#include <linux/io.h> 21#include <linux/io.h>
22 22
23#ifdef __tilegx__
24#define ARCH_HAS_DMA_GET_REQUIRED_MASK
25#endif
26
23extern struct dma_map_ops *tile_dma_map_ops; 27extern struct dma_map_ops *tile_dma_map_ops;
24extern struct dma_map_ops *gx_pci_dma_map_ops; 28extern struct dma_map_ops *gx_pci_dma_map_ops;
25extern struct dma_map_ops *gx_legacy_pci_dma_map_ops; 29extern struct dma_map_ops *gx_legacy_pci_dma_map_ops;
diff --git a/arch/tile/kernel/pci-dma.c b/arch/tile/kernel/pci-dma.c
index adc369d8c77b..9fef64d70c56 100644
--- a/arch/tile/kernel/pci-dma.c
+++ b/arch/tile/kernel/pci-dma.c
@@ -607,3 +607,21 @@ int dma_set_coherent_mask(struct device *dev, u64 mask)
607} 607}
608EXPORT_SYMBOL(dma_set_coherent_mask); 608EXPORT_SYMBOL(dma_set_coherent_mask);
609#endif 609#endif
610
611#ifdef ARCH_HAS_DMA_GET_REQUIRED_MASK
612/*
613 * The generic dma_get_required_mask() uses the highest physical address
614 * (max_pfn) to provide the hint to the PCI drivers regarding 32-bit or
615 * 64-bit DMA configuration. Since TILEGx has I/O TLB/MMU, allowing the
616 * DMAs to use the full 64-bit PCI address space and not limited by
617 * the physical memory space, we always let the PCI devices use
618 * 64-bit DMA if they have that capability, by returning the 64-bit
619 * DMA mask here. The device driver has the option to use 32-bit DMA if
620 * the device is not capable of 64-bit DMA.
621 */
622u64 dma_get_required_mask(struct device *dev)
623{
624 return DMA_BIT_MASK(64);
625}
626EXPORT_SYMBOL_GPL(dma_get_required_mask);
627#endif