Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc

Pull Sparc bugfix from David Miller:
 "Sparc64 AES ctr mode bug fix"

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc:
  sparc64: Fix FPU register corruption with AES crypto offload.

2 files changed, 21 insertions, 1 deletions

diff --git a/arch/sparc/include/asm/visasm.h b/arch/sparc/include/asm/visasm.h
index b26673759283..1f0aa2024e94 100644
--- a/arch/sparc/include/asm/visasm.h
+++ b/arch/sparc/include/asm/visasm.h
@@ -39,6 +39,14 @@
 297:    wr              %o5, FPRS_FEF, %fprs;           \
 298:
 
+#define VISEntryHalfFast(fail_label)                    \
+        rd              %fprs, %o5;                     \
+        andcc           %o5, FPRS_FEF, %g0;             \
+        be,pt           %icc, 297f;                     \
+         nop;                                           \
+        ba,a,pt         %xcc, fail_label;               \
+297:    wr              %o5, FPRS_FEF, %fprs;
+
 #define VISExitHalf                                     \
         wr              %o5, 0, %fprs;
 
diff --git a/arch/sparc/lib/NG4memcpy.S b/arch/sparc/lib/NG4memcpy.S
index 9cf2ee01cee3..140527a20e7d 100644
--- a/arch/sparc/lib/NG4memcpy.S
+++ b/arch/sparc/lib/NG4memcpy.S
@@ -41,6 +41,10 @@
 #endif
 #endif
 
+#if !defined(EX_LD) && !defined(EX_ST)
+#define NON_USER_COPY
+#endif
+
 #ifndef EX_LD
 #define EX_LD(x)        x
 #endif
@@ -197,9 +201,13 @@ FUNC_NAME:	/* %o0=dst, %o1=src, %o2=len */
          mov            EX_RETVAL(%o3), %o0
 
 .Llarge_src_unaligned:
+#ifdef NON_USER_COPY
+        VISEntryHalfFast(.Lmedium_vis_entry_fail)
+#else
+        VISEntryHalf
+#endif
         andn            %o2, 0x3f, %o4
         sub             %o2, %o4, %o2
-        VISEntryHalf
         alignaddr       %o1, %g0, %g1
         add             %o1, %o4, %o1
         EX_LD(LOAD(ldd, %g1 + 0x00, %f0))
@@ -240,6 +248,10 @@ FUNC_NAME:	/* %o0=dst, %o1=src, %o2=len */
          nop
         ba,a,pt         %icc, .Lmedium_unaligned
 
+#ifdef NON_USER_COPY
+.Lmedium_vis_entry_fail:
+         or             %o0, %o1, %g2
+#endif
 .Lmedium:
         LOAD(prefetch, %o1 + 0x40, #n_reads_strong)
         andcc           %g2, 0x7, %g0