Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net

Conflicts:
	drivers/net/ieee802154/fakehard.c

A bug fix went into 'net' for ieee802154/fakehard.c, which is removed
in 'net-next'.

Add build fix into the merge from Stephen Rothwell in openvswitch, the
logging macros take a new initial 'log' argument, a new call was added
in 'net' so when we merge that in here we have to explicitly add the
new 'log' arg to it else the build fails.

Signed-off-by: David S. Miller <davem@davemloft.net>

6 files changed, 43 insertions, 20 deletions

diff --git a/arch/sparc/include/asm/atomic_32.h b/arch/sparc/include/asm/atomic_32.h
index 765c1776ec9f..0e69b7e7a439 100644
--- a/arch/sparc/include/asm/atomic_32.h
+++ b/arch/sparc/include/asm/atomic_32.h
@@ -22,7 +22,7 @@
 
 int atomic_add_return(int, atomic_t *);
 int atomic_cmpxchg(atomic_t *, int, int);
-#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
+int atomic_xchg(atomic_t *, int);
 int __atomic_add_unless(atomic_t *, int, int);
 void atomic_set(atomic_t *, int);
 
diff --git a/arch/sparc/include/asm/cmpxchg_32.h b/arch/sparc/include/asm/cmpxchg_32.h
index 32c29a133f9d..d38b52dca216 100644
--- a/arch/sparc/include/asm/cmpxchg_32.h
+++ b/arch/sparc/include/asm/cmpxchg_32.h
@@ -11,22 +11,14 @@
 #ifndef __ARCH_SPARC_CMPXCHG__
 #define __ARCH_SPARC_CMPXCHG__
 
-static inline unsigned long xchg_u32(__volatile__ unsigned long *m, unsigned long val)
-{
-        __asm__ __volatile__("swap [%2], %0"
-                             : "=&r" (val)
-                             : "0" (val), "r" (m)
-                             : "memory");
-        return val;
-}
-
+unsigned long __xchg_u32(volatile u32 *m, u32 new);
 void __xchg_called_with_bad_pointer(void);
 
 static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr, int size)
 {
         switch (size) {
         case 4:
-                return xchg_u32(ptr, x);
+                return __xchg_u32(ptr, x);
         }
         __xchg_called_with_bad_pointer();
         return x;
diff --git a/arch/sparc/include/uapi/asm/swab.h b/arch/sparc/include/uapi/asm/swab.h
index a34ad079487e..4c7c12d69bea 100644
--- a/arch/sparc/include/uapi/asm/swab.h
+++ b/arch/sparc/include/uapi/asm/swab.h
@@ -9,9 +9,9 @@ static inline __u16 __arch_swab16p(const __u16 *addr)
 {
         __u16 ret;
 
-        __asm__ __volatile__ ("lduha [%1] %2, %0"
+        __asm__ __volatile__ ("lduha [%2] %3, %0"
                               : "=r" (ret)
-                              : "r" (addr), "i" (ASI_PL));
+                              : "m" (*addr), "r" (addr), "i" (ASI_PL));
         return ret;
 }
 #define __arch_swab16p __arch_swab16p
@@ -20,9 +20,9 @@ static inline __u32 __arch_swab32p(const __u32 *addr)
 {
         __u32 ret;
 
-        __asm__ __volatile__ ("lduwa [%1] %2, %0"
+        __asm__ __volatile__ ("lduwa [%2] %3, %0"
                               : "=r" (ret)
-                              : "r" (addr), "i" (ASI_PL));
+                              : "m" (*addr), "r" (addr), "i" (ASI_PL));
         return ret;
 }
 #define __arch_swab32p __arch_swab32p
@@ -31,9 +31,9 @@ static inline __u64 __arch_swab64p(const __u64 *addr)
 {
         __u64 ret;
 
-        __asm__ __volatile__ ("ldxa [%1] %2, %0"
+        __asm__ __volatile__ ("ldxa [%2] %3, %0"
                               : "=r" (ret)
-                              : "r" (addr), "i" (ASI_PL));
+                              : "m" (*addr), "r" (addr), "i" (ASI_PL));
         return ret;
 }
 #define __arch_swab64p __arch_swab64p
diff --git a/arch/sparc/kernel/pci_schizo.c b/arch/sparc/kernel/pci_schizo.c
index 8f76f23dac38..f9c6813c132d 100644
--- a/arch/sparc/kernel/pci_schizo.c
+++ b/arch/sparc/kernel/pci_schizo.c
@@ -581,7 +581,7 @@ static irqreturn_t schizo_pcierr_intr_other(struct pci_pbm_info *pbm)
 {
         unsigned long csr_reg, csr, csr_error_bits;
         irqreturn_t ret = IRQ_NONE;
-        u16 stat;
+        u32 stat;
 
         csr_reg = pbm->pbm_regs + SCHIZO_PCI_CTRL;
         csr = upa_readq(csr_reg);
@@ -617,7 +617,7 @@ static irqreturn_t schizo_pcierr_intr_other(struct pci_pbm_info *pbm)
                                pbm->name);
                 ret = IRQ_HANDLED;
         }
-        pci_read_config_word(pbm->pci_bus->self, PCI_STATUS, &stat);
+        pbm->pci_ops->read(pbm->pci_bus, 0, PCI_STATUS, 2, &stat);
         if (stat & (PCI_STATUS_PARITY |
                     PCI_STATUS_SIG_TARGET_ABORT |
                     PCI_STATUS_REC_TARGET_ABORT |
@@ -625,7 +625,7 @@ static irqreturn_t schizo_pcierr_intr_other(struct pci_pbm_info *pbm)
                     PCI_STATUS_SIG_SYSTEM_ERROR)) {
                 printk("%s: PCI bus error, PCI_STATUS[%04x]\n",
                        pbm->name, stat);
-                pci_write_config_word(pbm->pci_bus->self, PCI_STATUS, 0xffff);
+                pbm->pci_ops->write(pbm->pci_bus, 0, PCI_STATUS, 2, 0xffff);
                 ret = IRQ_HANDLED;
         }
         return ret;
diff --git a/arch/sparc/kernel/smp_64.c b/arch/sparc/kernel/smp_64.c
index 302c476413d5..da6f1a7fc4db 100644
--- a/arch/sparc/kernel/smp_64.c
+++ b/arch/sparc/kernel/smp_64.c
@@ -816,13 +816,17 @@ void arch_send_call_function_single_ipi(int cpu)
 void __irq_entry smp_call_function_client(int irq, struct pt_regs *regs)
 {
         clear_softint(1 << irq);
+        irq_enter();
         generic_smp_call_function_interrupt();
+        irq_exit();
 }
 
 void __irq_entry smp_call_function_single_client(int irq, struct pt_regs *regs)
 {
         clear_softint(1 << irq);
+        irq_enter();
         generic_smp_call_function_single_interrupt();
+        irq_exit();
 }
 
 static void tsb_sync(void *info)
diff --git a/arch/sparc/lib/atomic32.c b/arch/sparc/lib/atomic32.c
index a7c418ac26af..71cd65ab200c 100644
--- a/arch/sparc/lib/atomic32.c
+++ b/arch/sparc/lib/atomic32.c
@@ -45,6 +45,19 @@ ATOMIC_OP(add, +=)
 
 #undef ATOMIC_OP
 
+int atomic_xchg(atomic_t *v, int new)
+{
+        int ret;
+        unsigned long flags;
+
+        spin_lock_irqsave(ATOMIC_HASH(v), flags);
+        ret = v->counter;
+        v->counter = new;
+        spin_unlock_irqrestore(ATOMIC_HASH(v), flags);
+        return ret;
+}
+EXPORT_SYMBOL(atomic_xchg);
+
 int atomic_cmpxchg(atomic_t *v, int old, int new)
 {
         int ret;
@@ -137,3 +150,17 @@ unsigned long __cmpxchg_u32(volatile u32 *ptr, u32 old, u32 new)
         return (unsigned long)prev;
 }
 EXPORT_SYMBOL(__cmpxchg_u32);
+
+unsigned long __xchg_u32(volatile u32 *ptr, u32 new)
+{
+        unsigned long flags;
+        u32 prev;
+
+        spin_lock_irqsave(ATOMIC_HASH(ptr), flags);
+        prev = *ptr;
+        *ptr = new;
+        spin_unlock_irqrestore(ATOMIC_HASH(ptr), flags);
+
+        return (unsigned long)prev;
+}
+EXPORT_SYMBOL(__xchg_u32);