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authorLinus Torvalds <torvalds@linux-foundation.org>2008-03-26 21:35:22 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2008-03-26 21:35:22 -0400
commitd55a4528f7f607ca2872fec18574bc8cec060f05 (patch)
treed7fa9184df280c53efaf5a73d648a255ed142196 /arch/sparc64/kernel
parent08dcf29e01dcb786c13dc80045bd65f804117efb (diff)
parentc101b088ba0ed16d7109b2f3c2d16798d162a535 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6: [SPARC64]: Define TASK_SIZE_OF() [SPARC64]: flush_ptrace_access() needs preemption disable. [SPARC64]: Update defconfig. [SPARC64]: Fix allnoconfig build, ptrace.c missing CONFIG_COMPAT checks. [SPARC64]: Fix __get_cpu_var in preemption-enabled area. [SPARC64]: Fix sparse warnings in arch/sparc64/kernel/signal.c [SPARC64]: Fix most sparse warnings in arch/sparc64/kernel/sys_sparc.c [SPARC64]: Fix sparse warnings in arch/sparc64/kernel/time.c [SPARC64]: Fix sparse warnings in arch/sparc64/kernel/ptrace.c [SPARC64]: Fix sparse warnings in arch/sparc64/kernel/irq.c [SPARC64]: Fix sparse warnings in arch/sparc64/kernel/iommu.c [SPARC64]: Fix sparse errors in arch/sparc64/kernel/traps.c [SPARC64]: Fix sparse warnings in arch/sparc64/kernel/{cpu,setup}.c [SPARC64]: Adjust {TLBTEMP,TSBMAP}_BASE. [SPARC64]: Make save_stack_trace() more efficient.
Diffstat (limited to 'arch/sparc64/kernel')
-rw-r--r--arch/sparc64/kernel/cpu.c10
-rw-r--r--arch/sparc64/kernel/entry.S30
-rw-r--r--arch/sparc64/kernel/entry.h196
-rw-r--r--arch/sparc64/kernel/iommu.c8
-rw-r--r--arch/sparc64/kernel/irq.c21
-rw-r--r--arch/sparc64/kernel/ptrace.c20
-rw-r--r--arch/sparc64/kernel/setup.c5
-rw-r--r--arch/sparc64/kernel/signal.c3
-rw-r--r--arch/sparc64/kernel/smp.c3
-rw-r--r--arch/sparc64/kernel/stacktrace.c4
-rw-r--r--arch/sparc64/kernel/sys_sparc.c14
-rw-r--r--arch/sparc64/kernel/systbls.h53
-rw-r--r--arch/sparc64/kernel/time.c66
-rw-r--r--arch/sparc64/kernel/traps.c49
14 files changed, 371 insertions, 111 deletions
diff --git a/arch/sparc64/kernel/cpu.c b/arch/sparc64/kernel/cpu.c
index dd5d28e3d798..0097c08dc600 100644
--- a/arch/sparc64/kernel/cpu.c
+++ b/arch/sparc64/kernel/cpu.c
@@ -15,6 +15,8 @@
15#include <asm/spitfire.h> 15#include <asm/spitfire.h>
16#include <asm/oplib.h> 16#include <asm/oplib.h>
17 17
18#include "entry.h"
19
18DEFINE_PER_CPU(cpuinfo_sparc, __cpu_data) = { 0 }; 20DEFINE_PER_CPU(cpuinfo_sparc, __cpu_data) = { 0 };
19 21
20struct cpu_iu_info { 22struct cpu_iu_info {
@@ -65,8 +67,6 @@ static struct cpu_iu_info linux_sparc_chips[] = {
65char *sparc_cpu_type; 67char *sparc_cpu_type;
66char *sparc_fpu_type; 68char *sparc_fpu_type;
67 69
68unsigned int fsr_storage;
69
70static void __init sun4v_cpu_probe(void) 70static void __init sun4v_cpu_probe(void)
71{ 71{
72 switch (sun4v_chip_type) { 72 switch (sun4v_chip_type) {
@@ -94,8 +94,10 @@ void __init cpu_probe(void)
94 unsigned long ver, fpu_vers, manuf, impl, fprs; 94 unsigned long ver, fpu_vers, manuf, impl, fprs;
95 int i; 95 int i;
96 96
97 if (tlb_type == hypervisor) 97 if (tlb_type == hypervisor) {
98 return sun4v_cpu_probe(); 98 sun4v_cpu_probe();
99 return;
100 }
99 101
100 fprs = fprs_read(); 102 fprs = fprs_read();
101 fprs_write(FPRS_FEF); 103 fprs_write(FPRS_FEF);
diff --git a/arch/sparc64/kernel/entry.S b/arch/sparc64/kernel/entry.S
index 6be4d2d2904e..49eca4b1cf25 100644
--- a/arch/sparc64/kernel/entry.S
+++ b/arch/sparc64/kernel/entry.S
@@ -1705,6 +1705,36 @@ __flushw_user:
17052: retl 17052: retl
1706 nop 1706 nop
1707 1707
1708 /* Flush %fp and %i7 to the stack for all register
1709 * windows active inside of the cpu. This allows
1710 * show_stack_trace() to avoid using an expensive
1711 * 'flushw'.
1712 */
1713 .globl stack_trace_flush
1714 .type stack_trace_flush,#function
1715stack_trace_flush:
1716 rdpr %pstate, %o0
1717 wrpr %o0, PSTATE_IE, %pstate
1718
1719 rdpr %cwp, %g1
1720 rdpr %canrestore, %g2
1721 sub %g1, 1, %g3
1722
17231: brz,pn %g2, 2f
1724 sub %g2, 1, %g2
1725 wrpr %g3, %cwp
1726 stx %fp, [%sp + STACK_BIAS + RW_V9_I6]
1727 stx %i7, [%sp + STACK_BIAS + RW_V9_I7]
1728 ba,pt %xcc, 1b
1729 sub %g3, 1, %g3
1730
17312: wrpr %g1, %cwp
1732 wrpr %o0, %pstate
1733
1734 retl
1735 nop
1736 .size stack_trace_flush,.-stack_trace_flush
1737
1708#ifdef CONFIG_SMP 1738#ifdef CONFIG_SMP
1709 .globl hard_smp_processor_id 1739 .globl hard_smp_processor_id
1710hard_smp_processor_id: 1740hard_smp_processor_id:
diff --git a/arch/sparc64/kernel/entry.h b/arch/sparc64/kernel/entry.h
new file mode 100644
index 000000000000..4a91e9c6d31b
--- /dev/null
+++ b/arch/sparc64/kernel/entry.h
@@ -0,0 +1,196 @@
1#ifndef _ENTRY_H
2#define _ENTRY_H
3
4#include <linux/kernel.h>
5#include <linux/types.h>
6#include <linux/init.h>
7
8extern char *sparc_cpu_type;
9extern char *sparc_fpu_type;
10
11extern void __init per_cpu_patch(void);
12extern void __init sun4v_patch(void);
13extern void __init boot_cpu_id_too_large(int cpu);
14extern unsigned int dcache_parity_tl1_occurred;
15extern unsigned int icache_parity_tl1_occurred;
16
17extern asmlinkage void update_perfctrs(void);
18extern asmlinkage void sparc_breakpoint(struct pt_regs *regs);
19extern void timer_interrupt(int irq, struct pt_regs *regs);
20
21extern void do_notify_resume(struct pt_regs *regs,
22 unsigned long orig_i0,
23 int restart_syscall,
24 unsigned long thread_info_flags);
25
26extern asmlinkage void syscall_trace(struct pt_regs *regs,
27 int syscall_exit_p);
28
29extern void bad_trap_tl1(struct pt_regs *regs, long lvl);
30
31extern void do_fpe_common(struct pt_regs *regs);
32extern void do_fpieee(struct pt_regs *regs);
33extern void do_fpother(struct pt_regs *regs);
34extern void do_tof(struct pt_regs *regs);
35extern void do_div0(struct pt_regs *regs);
36extern void do_illegal_instruction(struct pt_regs *regs);
37extern void mem_address_unaligned(struct pt_regs *regs,
38 unsigned long sfar,
39 unsigned long sfsr);
40extern void sun4v_do_mna(struct pt_regs *regs,
41 unsigned long addr,
42 unsigned long type_ctx);
43extern void do_privop(struct pt_regs *regs);
44extern void do_privact(struct pt_regs *regs);
45extern void do_cee(struct pt_regs *regs);
46extern void do_cee_tl1(struct pt_regs *regs);
47extern void do_dae_tl1(struct pt_regs *regs);
48extern void do_iae_tl1(struct pt_regs *regs);
49extern void do_div0_tl1(struct pt_regs *regs);
50extern void do_fpdis_tl1(struct pt_regs *regs);
51extern void do_fpieee_tl1(struct pt_regs *regs);
52extern void do_fpother_tl1(struct pt_regs *regs);
53extern void do_ill_tl1(struct pt_regs *regs);
54extern void do_irq_tl1(struct pt_regs *regs);
55extern void do_lddfmna_tl1(struct pt_regs *regs);
56extern void do_stdfmna_tl1(struct pt_regs *regs);
57extern void do_paw(struct pt_regs *regs);
58extern void do_paw_tl1(struct pt_regs *regs);
59extern void do_vaw(struct pt_regs *regs);
60extern void do_vaw_tl1(struct pt_regs *regs);
61extern void do_tof_tl1(struct pt_regs *regs);
62extern void do_getpsr(struct pt_regs *regs);
63
64extern void spitfire_insn_access_exception(struct pt_regs *regs,
65 unsigned long sfsr,
66 unsigned long sfar);
67extern void spitfire_insn_access_exception_tl1(struct pt_regs *regs,
68 unsigned long sfsr,
69 unsigned long sfar);
70extern void spitfire_data_access_exception(struct pt_regs *regs,
71 unsigned long sfsr,
72 unsigned long sfar);
73extern void spitfire_data_access_exception_tl1(struct pt_regs *regs,
74 unsigned long sfsr,
75 unsigned long sfar);
76extern void spitfire_access_error(struct pt_regs *regs,
77 unsigned long status_encoded,
78 unsigned long afar);
79
80extern void cheetah_fecc_handler(struct pt_regs *regs,
81 unsigned long afsr,
82 unsigned long afar);
83extern void cheetah_cee_handler(struct pt_regs *regs,
84 unsigned long afsr,
85 unsigned long afar);
86extern void cheetah_deferred_handler(struct pt_regs *regs,
87 unsigned long afsr,
88 unsigned long afar);
89extern void cheetah_plus_parity_error(int type, struct pt_regs *regs);
90
91extern void sun4v_insn_access_exception(struct pt_regs *regs,
92 unsigned long addr,
93 unsigned long type_ctx);
94extern void sun4v_insn_access_exception_tl1(struct pt_regs *regs,
95 unsigned long addr,
96 unsigned long type_ctx);
97extern void sun4v_data_access_exception(struct pt_regs *regs,
98 unsigned long addr,
99 unsigned long type_ctx);
100extern void sun4v_data_access_exception_tl1(struct pt_regs *regs,
101 unsigned long addr,
102 unsigned long type_ctx);
103extern void sun4v_resum_error(struct pt_regs *regs,
104 unsigned long offset);
105extern void sun4v_resum_overflow(struct pt_regs *regs);
106extern void sun4v_nonresum_error(struct pt_regs *regs,
107 unsigned long offset);
108extern void sun4v_nonresum_overflow(struct pt_regs *regs);
109
110extern unsigned long sun4v_err_itlb_vaddr;
111extern unsigned long sun4v_err_itlb_ctx;
112extern unsigned long sun4v_err_itlb_pte;
113extern unsigned long sun4v_err_itlb_error;
114
115extern void sun4v_itlb_error_report(struct pt_regs *regs, int tl);
116
117extern unsigned long sun4v_err_dtlb_vaddr;
118extern unsigned long sun4v_err_dtlb_ctx;
119extern unsigned long sun4v_err_dtlb_pte;
120extern unsigned long sun4v_err_dtlb_error;
121
122extern void sun4v_dtlb_error_report(struct pt_regs *regs, int tl);
123extern void hypervisor_tlbop_error(unsigned long err,
124 unsigned long op);
125extern void hypervisor_tlbop_error_xcall(unsigned long err,
126 unsigned long op);
127
128/* WARNING: The error trap handlers in assembly know the precise
129 * layout of the following structure.
130 *
131 * C-level handlers in traps.c use this information to log the
132 * error and then determine how to recover (if possible).
133 */
134struct cheetah_err_info {
135/*0x00*/u64 afsr;
136/*0x08*/u64 afar;
137
138 /* D-cache state */
139/*0x10*/u64 dcache_data[4]; /* The actual data */
140/*0x30*/u64 dcache_index; /* D-cache index */
141/*0x38*/u64 dcache_tag; /* D-cache tag/valid */
142/*0x40*/u64 dcache_utag; /* D-cache microtag */
143/*0x48*/u64 dcache_stag; /* D-cache snooptag */
144
145 /* I-cache state */
146/*0x50*/u64 icache_data[8]; /* The actual insns + predecode */
147/*0x90*/u64 icache_index; /* I-cache index */
148/*0x98*/u64 icache_tag; /* I-cache phys tag */
149/*0xa0*/u64 icache_utag; /* I-cache microtag */
150/*0xa8*/u64 icache_stag; /* I-cache snooptag */
151/*0xb0*/u64 icache_upper; /* I-cache upper-tag */
152/*0xb8*/u64 icache_lower; /* I-cache lower-tag */
153
154 /* E-cache state */
155/*0xc0*/u64 ecache_data[4]; /* 32 bytes from staging registers */
156/*0xe0*/u64 ecache_index; /* E-cache index */
157/*0xe8*/u64 ecache_tag; /* E-cache tag/state */
158
159/*0xf0*/u64 __pad[32 - 30];
160};
161#define CHAFSR_INVALID ((u64)-1L)
162
163/* This is allocated at boot time based upon the largest hardware
164 * cpu ID in the system. We allocate two entries per cpu, one for
165 * TL==0 logging and one for TL >= 1 logging.
166 */
167extern struct cheetah_err_info *cheetah_error_log;
168
169/* UPA nodes send interrupt packet to UltraSparc with first data reg
170 * value low 5 (7 on Starfire) bits holding the IRQ identifier being
171 * delivered. We must translate this into a non-vector IRQ so we can
172 * set the softint on this cpu.
173 *
174 * To make processing these packets efficient and race free we use
175 * an array of irq buckets below. The interrupt vector handler in
176 * entry.S feeds incoming packets into per-cpu pil-indexed lists.
177 *
178 * If you make changes to ino_bucket, please update hand coded assembler
179 * of the vectored interrupt trap handler(s) in entry.S and sun4v_ivec.S
180 */
181struct ino_bucket {
182/*0x00*/unsigned long __irq_chain_pa;
183
184 /* Virtual interrupt number assigned to this INO. */
185/*0x08*/unsigned int __virt_irq;
186/*0x0c*/unsigned int __pad;
187};
188
189extern struct ino_bucket *ivector_table;
190extern unsigned long ivector_table_pa;
191
192extern void handler_irq(int irq, struct pt_regs *regs);
193extern void init_irqwork_curcpu(void);
194extern void __cpuinit sun4v_register_mondo_queues(int this_cpu);
195
196#endif /* _ENTRY_H */
diff --git a/arch/sparc64/kernel/iommu.c b/arch/sparc64/kernel/iommu.c
index fbaab3497bfd..b781d3d54fb8 100644
--- a/arch/sparc64/kernel/iommu.c
+++ b/arch/sparc64/kernel/iommu.c
@@ -626,7 +626,7 @@ static int dma_4u_map_sg(struct device *dev, struct scatterlist *sglist,
626iommu_map_failed: 626iommu_map_failed:
627 for_each_sg(sglist, s, nelems, i) { 627 for_each_sg(sglist, s, nelems, i) {
628 if (s->dma_length != 0) { 628 if (s->dma_length != 0) {
629 unsigned long vaddr, npages, entry, i; 629 unsigned long vaddr, npages, entry, j;
630 iopte_t *base; 630 iopte_t *base;
631 631
632 vaddr = s->dma_address & IO_PAGE_MASK; 632 vaddr = s->dma_address & IO_PAGE_MASK;
@@ -637,8 +637,8 @@ iommu_map_failed:
637 >> IO_PAGE_SHIFT; 637 >> IO_PAGE_SHIFT;
638 base = iommu->page_table + entry; 638 base = iommu->page_table + entry;
639 639
640 for (i = 0; i < npages; i++) 640 for (j = 0; j < npages; j++)
641 iopte_make_dummy(iommu, base + i); 641 iopte_make_dummy(iommu, base + j);
642 642
643 s->dma_address = DMA_ERROR_CODE; 643 s->dma_address = DMA_ERROR_CODE;
644 s->dma_length = 0; 644 s->dma_length = 0;
@@ -803,7 +803,7 @@ static void dma_4u_sync_sg_for_cpu(struct device *dev,
803 spin_unlock_irqrestore(&iommu->lock, flags); 803 spin_unlock_irqrestore(&iommu->lock, flags);
804} 804}
805 805
806const struct dma_ops sun4u_dma_ops = { 806static const struct dma_ops sun4u_dma_ops = {
807 .alloc_coherent = dma_4u_alloc_coherent, 807 .alloc_coherent = dma_4u_alloc_coherent,
808 .free_coherent = dma_4u_free_coherent, 808 .free_coherent = dma_4u_free_coherent,
809 .map_single = dma_4u_map_single, 809 .map_single = dma_4u_map_single,
diff --git a/arch/sparc64/kernel/irq.c b/arch/sparc64/kernel/irq.c
index 5ec06c8c7fea..eb88bd6e674e 100644
--- a/arch/sparc64/kernel/irq.c
+++ b/arch/sparc64/kernel/irq.c
@@ -44,27 +44,10 @@
44#include <asm/hypervisor.h> 44#include <asm/hypervisor.h>
45#include <asm/cacheflush.h> 45#include <asm/cacheflush.h>
46 46
47/* UPA nodes send interrupt packet to UltraSparc with first data reg 47#include "entry.h"
48 * value low 5 (7 on Starfire) bits holding the IRQ identifier being
49 * delivered. We must translate this into a non-vector IRQ so we can
50 * set the softint on this cpu.
51 *
52 * To make processing these packets efficient and race free we use
53 * an array of irq buckets below. The interrupt vector handler in
54 * entry.S feeds incoming packets into per-cpu pil-indexed lists.
55 *
56 * If you make changes to ino_bucket, please update hand coded assembler
57 * of the vectored interrupt trap handler(s) in entry.S and sun4v_ivec.S
58 */
59struct ino_bucket {
60/*0x00*/unsigned long __irq_chain_pa;
61
62 /* Virtual interrupt number assigned to this INO. */
63/*0x08*/unsigned int __virt_irq;
64/*0x0c*/unsigned int __pad;
65};
66 48
67#define NUM_IVECS (IMAP_INR + 1) 49#define NUM_IVECS (IMAP_INR + 1)
50
68struct ino_bucket *ivector_table; 51struct ino_bucket *ivector_table;
69unsigned long ivector_table_pa; 52unsigned long ivector_table_pa;
70 53
diff --git a/arch/sparc64/kernel/ptrace.c b/arch/sparc64/kernel/ptrace.c
index 9a1ba1fe859d..aaae865e7932 100644
--- a/arch/sparc64/kernel/ptrace.c
+++ b/arch/sparc64/kernel/ptrace.c
@@ -35,6 +35,9 @@
35#include <asm/spitfire.h> 35#include <asm/spitfire.h>
36#include <asm/page.h> 36#include <asm/page.h>
37#include <asm/cpudata.h> 37#include <asm/cpudata.h>
38#include <asm/cacheflush.h>
39
40#include "entry.h"
38 41
39/* #define ALLOW_INIT_TRACING */ 42/* #define ALLOW_INIT_TRACING */
40 43
@@ -67,6 +70,8 @@ void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
67 if (tlb_type == hypervisor) 70 if (tlb_type == hypervisor)
68 return; 71 return;
69 72
73 preempt_disable();
74
70#ifdef DCACHE_ALIASING_POSSIBLE 75#ifdef DCACHE_ALIASING_POSSIBLE
71 /* If bit 13 of the kernel address we used to access the 76 /* If bit 13 of the kernel address we used to access the
72 * user page is the same as the virtual address that page 77 * user page is the same as the virtual address that page
@@ -105,6 +110,8 @@ void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
105 for (; start < end; start += icache_line_size) 110 for (; start < end; start += icache_line_size)
106 flushi(start); 111 flushi(start);
107 } 112 }
113
114 preempt_enable();
108} 115}
109 116
110enum sparc_regset { 117enum sparc_regset {
@@ -382,6 +389,7 @@ static const struct user_regset_view user_sparc64_view = {
382 .regsets = sparc64_regsets, .n = ARRAY_SIZE(sparc64_regsets) 389 .regsets = sparc64_regsets, .n = ARRAY_SIZE(sparc64_regsets)
383}; 390};
384 391
392#ifdef CONFIG_COMPAT
385static int genregs32_get(struct task_struct *target, 393static int genregs32_get(struct task_struct *target,
386 const struct user_regset *regset, 394 const struct user_regset *regset,
387 unsigned int pos, unsigned int count, 395 unsigned int pos, unsigned int count,
@@ -676,14 +684,18 @@ static const struct user_regset_view user_sparc32_view = {
676 .name = "sparc", .e_machine = EM_SPARC, 684 .name = "sparc", .e_machine = EM_SPARC,
677 .regsets = sparc32_regsets, .n = ARRAY_SIZE(sparc32_regsets) 685 .regsets = sparc32_regsets, .n = ARRAY_SIZE(sparc32_regsets)
678}; 686};
687#endif /* CONFIG_COMPAT */
679 688
680const struct user_regset_view *task_user_regset_view(struct task_struct *task) 689const struct user_regset_view *task_user_regset_view(struct task_struct *task)
681{ 690{
691#ifdef CONFIG_COMPAT
682 if (test_tsk_thread_flag(task, TIF_32BIT)) 692 if (test_tsk_thread_flag(task, TIF_32BIT))
683 return &user_sparc32_view; 693 return &user_sparc32_view;
694#endif
684 return &user_sparc64_view; 695 return &user_sparc64_view;
685} 696}
686 697
698#ifdef CONFIG_COMPAT
687struct compat_fps { 699struct compat_fps {
688 unsigned int regs[32]; 700 unsigned int regs[32];
689 unsigned int fsr; 701 unsigned int fsr;
@@ -798,6 +810,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
798 810
799 return ret; 811 return ret;
800} 812}
813#endif /* CONFIG_COMPAT */
801 814
802struct fps { 815struct fps {
803 unsigned int regs[64]; 816 unsigned int regs[64];
@@ -807,11 +820,14 @@ struct fps {
807long arch_ptrace(struct task_struct *child, long request, long addr, long data) 820long arch_ptrace(struct task_struct *child, long request, long addr, long data)
808{ 821{
809 const struct user_regset_view *view = task_user_regset_view(child); 822 const struct user_regset_view *view = task_user_regset_view(child);
810 struct pt_regs __user *pregs = (struct pt_regs __user *) addr;
811 unsigned long addr2 = task_pt_regs(current)->u_regs[UREG_I4]; 823 unsigned long addr2 = task_pt_regs(current)->u_regs[UREG_I4];
812 struct fps __user *fps = (struct fps __user *) addr; 824 struct pt_regs __user *pregs;
825 struct fps __user *fps;
813 int ret; 826 int ret;
814 827
828 pregs = (struct pt_regs __user *) (unsigned long) addr;
829 fps = (struct fps __user *) (unsigned long) addr;
830
815 switch (request) { 831 switch (request) {
816 case PTRACE_PEEKUSR: 832 case PTRACE_PEEKUSR:
817 ret = (addr != 0) ? -EIO : 0; 833 ret = (addr != 0) ? -EIO : 0;
diff --git a/arch/sparc64/kernel/setup.c b/arch/sparc64/kernel/setup.c
index d036dbe72864..6acb4c51cfe4 100644
--- a/arch/sparc64/kernel/setup.c
+++ b/arch/sparc64/kernel/setup.c
@@ -51,6 +51,8 @@
51#include <net/ipconfig.h> 51#include <net/ipconfig.h>
52#endif 52#endif
53 53
54#include "entry.h"
55
54/* Used to synchronize accesses to NatSemi SUPER I/O chip configure 56/* Used to synchronize accesses to NatSemi SUPER I/O chip configure
55 * operations in asm/ns87303.h 57 * operations in asm/ns87303.h
56 */ 58 */
@@ -335,9 +337,6 @@ void __init setup_arch(char **cmdline_p)
335 337
336/* BUFFER is PAGE_SIZE bytes long. */ 338/* BUFFER is PAGE_SIZE bytes long. */
337 339
338extern char *sparc_cpu_type;
339extern char *sparc_fpu_type;
340
341extern void smp_info(struct seq_file *); 340extern void smp_info(struct seq_file *);
342extern void smp_bogo(struct seq_file *); 341extern void smp_bogo(struct seq_file *);
343extern void mmu_info(struct seq_file *); 342extern void mmu_info(struct seq_file *);
diff --git a/arch/sparc64/kernel/signal.c b/arch/sparc64/kernel/signal.c
index fb13775b3682..94a9d64208ee 100644
--- a/arch/sparc64/kernel/signal.c
+++ b/arch/sparc64/kernel/signal.c
@@ -32,6 +32,9 @@
32#include <asm/siginfo.h> 32#include <asm/siginfo.h>
33#include <asm/visasm.h> 33#include <asm/visasm.h>
34 34
35#include "entry.h"
36#include "systbls.h"
37
35#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) 38#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
36 39
37/* {set, get}context() needed for 64-bit SparcLinux userland. */ 40/* {set, get}context() needed for 64-bit SparcLinux userland. */
diff --git a/arch/sparc64/kernel/smp.c b/arch/sparc64/kernel/smp.c
index 5a1126b363a4..59f020d69d4c 100644
--- a/arch/sparc64/kernel/smp.c
+++ b/arch/sparc64/kernel/smp.c
@@ -1,6 +1,6 @@
1/* smp.c: Sparc64 SMP support. 1/* smp.c: Sparc64 SMP support.
2 * 2 *
3 * Copyright (C) 1997, 2007 David S. Miller (davem@davemloft.net) 3 * Copyright (C) 1997, 2007, 2008 David S. Miller (davem@davemloft.net)
4 */ 4 */
5 5
6#include <linux/module.h> 6#include <linux/module.h>
@@ -30,6 +30,7 @@
30#include <asm/cpudata.h> 30#include <asm/cpudata.h>
31#include <asm/hvtramp.h> 31#include <asm/hvtramp.h>
32#include <asm/io.h> 32#include <asm/io.h>
33#include <asm/timer.h>
33 34
34#include <asm/irq.h> 35#include <asm/irq.h>
35#include <asm/irq_regs.h> 36#include <asm/irq_regs.h>
diff --git a/arch/sparc64/kernel/stacktrace.c b/arch/sparc64/kernel/stacktrace.c
index 47f92a59be18..84d39e873e88 100644
--- a/arch/sparc64/kernel/stacktrace.c
+++ b/arch/sparc64/kernel/stacktrace.c
@@ -2,13 +2,15 @@
2#include <linux/stacktrace.h> 2#include <linux/stacktrace.h>
3#include <linux/thread_info.h> 3#include <linux/thread_info.h>
4#include <asm/ptrace.h> 4#include <asm/ptrace.h>
5#include <asm/stacktrace.h>
5 6
6void save_stack_trace(struct stack_trace *trace) 7void save_stack_trace(struct stack_trace *trace)
7{ 8{
8 unsigned long ksp, fp, thread_base; 9 unsigned long ksp, fp, thread_base;
9 struct thread_info *tp = task_thread_info(current); 10 struct thread_info *tp = task_thread_info(current);
10 11
11 flushw_all(); 12 stack_trace_flush();
13
12 __asm__ __volatile__( 14 __asm__ __volatile__(
13 "mov %%fp, %0" 15 "mov %%fp, %0"
14 : "=r" (ksp) 16 : "=r" (ksp)
diff --git a/arch/sparc64/kernel/sys_sparc.c b/arch/sparc64/kernel/sys_sparc.c
index 134d801579f9..f952745d0f3d 100644
--- a/arch/sparc64/kernel/sys_sparc.c
+++ b/arch/sparc64/kernel/sys_sparc.c
@@ -1,5 +1,4 @@
1/* $Id: sys_sparc.c,v 1.57 2002/02/09 19:49:30 davem Exp $ 1/* linux/arch/sparc64/kernel/sys_sparc.c
2 * linux/arch/sparc64/kernel/sys_sparc.c
3 * 2 *
4 * This file contains various random system calls that 3 * This file contains various random system calls that
5 * have a non-standard calling sequence on the Linux/sparc 4 * have a non-standard calling sequence on the Linux/sparc
@@ -30,6 +29,9 @@
30#include <asm/perfctr.h> 29#include <asm/perfctr.h>
31#include <asm/unistd.h> 30#include <asm/unistd.h>
32 31
32#include "entry.h"
33#include "systbls.h"
34
33/* #define DEBUG_UNIMP_SYSCALL */ 35/* #define DEBUG_UNIMP_SYSCALL */
34 36
35asmlinkage unsigned long sys_getpagesize(void) 37asmlinkage unsigned long sys_getpagesize(void)
@@ -445,7 +447,8 @@ asmlinkage long sys_ipc(unsigned int call, int first, unsigned long second,
445 goto out; 447 goto out;
446 case SEMTIMEDOP: 448 case SEMTIMEDOP:
447 err = sys_semtimedop(first, ptr, (unsigned)second, 449 err = sys_semtimedop(first, ptr, (unsigned)second,
448 (const struct timespec __user *) fifth); 450 (const struct timespec __user *)
451 (unsigned long) fifth);
449 goto out; 452 goto out;
450 case SEMGET: 453 case SEMGET:
451 err = sys_semget(first, (int)second, (int)third); 454 err = sys_semget(first, (int)second, (int)third);
@@ -788,7 +791,7 @@ asmlinkage long sys_utrap_install(utrap_entry_t type,
788 } else { 791 } else {
789 if ((utrap_handler_t)current_thread_info()->utraps[type] != new_p && 792 if ((utrap_handler_t)current_thread_info()->utraps[type] != new_p &&
790 current_thread_info()->utraps[0] > 1) { 793 current_thread_info()->utraps[0] > 1) {
791 long *p = current_thread_info()->utraps; 794 unsigned long *p = current_thread_info()->utraps;
792 795
793 current_thread_info()->utraps = 796 current_thread_info()->utraps =
794 kmalloc((UT_TRAP_INSTRUCTION_31+1)*sizeof(long), 797 kmalloc((UT_TRAP_INSTRUCTION_31+1)*sizeof(long),
@@ -816,7 +819,8 @@ asmlinkage long sys_utrap_install(utrap_entry_t type,
816 return 0; 819 return 0;
817} 820}
818 821
819long sparc_memory_ordering(unsigned long model, struct pt_regs *regs) 822asmlinkage long sparc_memory_ordering(unsigned long model,
823 struct pt_regs *regs)
820{ 824{
821 if (model >= 3) 825 if (model >= 3)
822 return -EINVAL; 826 return -EINVAL;
diff --git a/arch/sparc64/kernel/systbls.h b/arch/sparc64/kernel/systbls.h
new file mode 100644
index 000000000000..8a0d20a35d0c
--- /dev/null
+++ b/arch/sparc64/kernel/systbls.h
@@ -0,0 +1,53 @@
1#ifndef _SYSTBLS_H
2#define _SYSTBLS_H
3
4#include <linux/kernel.h>
5#include <linux/types.h>
6#include <linux/utsname.h>
7#include <asm/utrap.h>
8#include <asm/signal.h>
9
10extern asmlinkage unsigned long sys_getpagesize(void);
11extern asmlinkage unsigned long sparc_brk(unsigned long brk);
12extern asmlinkage long sparc_pipe(struct pt_regs *regs);
13extern asmlinkage long sys_ipc(unsigned int call, int first,
14 unsigned long second,
15 unsigned long third,
16 void __user *ptr, long fifth);
17extern asmlinkage long sparc64_newuname(struct new_utsname __user *name);
18extern asmlinkage long sparc64_personality(unsigned long personality);
19extern asmlinkage unsigned long sys_mmap(unsigned long addr, unsigned long len,
20 unsigned long prot, unsigned long flags,
21 unsigned long fd, unsigned long off);
22extern asmlinkage long sys64_munmap(unsigned long addr, size_t len);
23extern asmlinkage unsigned long sys64_mremap(unsigned long addr,
24 unsigned long old_len,
25 unsigned long new_len,
26 unsigned long flags,
27 unsigned long new_addr);
28extern asmlinkage unsigned long c_sys_nis_syscall(struct pt_regs *regs);
29extern asmlinkage long sys_getdomainname(char __user *name, int len);
30extern asmlinkage long solaris_syscall(struct pt_regs *regs);
31extern asmlinkage long sunos_syscall(struct pt_regs *regs);
32extern asmlinkage long sys_utrap_install(utrap_entry_t type,
33 utrap_handler_t new_p,
34 utrap_handler_t new_d,
35 utrap_handler_t __user *old_p,
36 utrap_handler_t __user *old_d);
37extern asmlinkage long sparc_memory_ordering(unsigned long model,
38 struct pt_regs *regs);
39extern asmlinkage long sys_rt_sigaction(int sig,
40 const struct sigaction __user *act,
41 struct sigaction __user *oact,
42 void __user *restorer,
43 size_t sigsetsize);
44extern asmlinkage long sys_perfctr(int opcode, unsigned long arg0,
45 unsigned long arg1, unsigned long arg2);
46
47extern asmlinkage void sparc64_set_context(struct pt_regs *regs);
48extern asmlinkage void sparc64_get_context(struct pt_regs *regs);
49extern asmlinkage long sys_sigpause(unsigned int set);
50extern asmlinkage long sys_sigsuspend(old_sigset_t set);
51extern void do_rt_sigreturn(struct pt_regs *regs);
52
53#endif /* _SYSTBLS_H */
diff --git a/arch/sparc64/kernel/time.c b/arch/sparc64/kernel/time.c
index d204f1ab1d4c..e5d238970c7e 100644
--- a/arch/sparc64/kernel/time.c
+++ b/arch/sparc64/kernel/time.c
@@ -1,7 +1,6 @@
1/* $Id: time.c,v 1.42 2002/01/23 14:33:55 davem Exp $ 1/* time.c: UltraSparc timer and TOD clock support.
2 * time.c: UltraSparc timer and TOD clock support.
3 * 2 *
4 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) 3 * Copyright (C) 1997, 2008 David S. Miller (davem@davemloft.net)
5 * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be) 4 * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
6 * 5 *
7 * Based largely on code which is: 6 * Based largely on code which is:
@@ -48,6 +47,8 @@
48#include <asm/uaccess.h> 47#include <asm/uaccess.h>
49#include <asm/irq_regs.h> 48#include <asm/irq_regs.h>
50 49
50#include "entry.h"
51
51DEFINE_SPINLOCK(mostek_lock); 52DEFINE_SPINLOCK(mostek_lock);
52DEFINE_SPINLOCK(rtc_lock); 53DEFINE_SPINLOCK(rtc_lock);
53void __iomem *mstk48t02_regs = NULL; 54void __iomem *mstk48t02_regs = NULL;
@@ -508,6 +509,37 @@ static int __init has_low_battery(void)
508 return (data1 == data2); /* Was the write blocked? */ 509 return (data1 == data2); /* Was the write blocked? */
509} 510}
510 511
512static void __init mostek_set_system_time(void __iomem *mregs)
513{
514 unsigned int year, mon, day, hour, min, sec;
515 u8 tmp;
516
517 spin_lock_irq(&mostek_lock);
518
519 /* Traditional Mostek chip. */
520 tmp = mostek_read(mregs + MOSTEK_CREG);
521 tmp |= MSTK_CREG_READ;
522 mostek_write(mregs + MOSTEK_CREG, tmp);
523
524 sec = MSTK_REG_SEC(mregs);
525 min = MSTK_REG_MIN(mregs);
526 hour = MSTK_REG_HOUR(mregs);
527 day = MSTK_REG_DOM(mregs);
528 mon = MSTK_REG_MONTH(mregs);
529 year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) );
530
531 xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
532 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
533 set_normalized_timespec(&wall_to_monotonic,
534 -xtime.tv_sec, -xtime.tv_nsec);
535
536 tmp = mostek_read(mregs + MOSTEK_CREG);
537 tmp &= ~MSTK_CREG_READ;
538 mostek_write(mregs + MOSTEK_CREG, tmp);
539
540 spin_unlock_irq(&mostek_lock);
541}
542
511/* Probe for the real time clock chip. */ 543/* Probe for the real time clock chip. */
512static void __init set_system_time(void) 544static void __init set_system_time(void)
513{ 545{
@@ -520,7 +552,6 @@ static void __init set_system_time(void)
520 unsigned long dregs = 0UL; 552 unsigned long dregs = 0UL;
521 void __iomem *bregs = 0UL; 553 void __iomem *bregs = 0UL;
522#endif 554#endif
523 u8 tmp;
524 555
525 if (!mregs && !dregs && !bregs) { 556 if (!mregs && !dregs && !bregs) {
526 prom_printf("Something wrong, clock regs not mapped yet.\n"); 557 prom_printf("Something wrong, clock regs not mapped yet.\n");
@@ -528,20 +559,11 @@ static void __init set_system_time(void)
528 } 559 }
529 560
530 if (mregs) { 561 if (mregs) {
531 spin_lock_irq(&mostek_lock); 562 mostek_set_system_time(mregs);
532 563 return;
533 /* Traditional Mostek chip. */ 564 }
534 tmp = mostek_read(mregs + MOSTEK_CREG);
535 tmp |= MSTK_CREG_READ;
536 mostek_write(mregs + MOSTEK_CREG, tmp);
537 565
538 sec = MSTK_REG_SEC(mregs); 566 if (bregs) {
539 min = MSTK_REG_MIN(mregs);
540 hour = MSTK_REG_HOUR(mregs);
541 day = MSTK_REG_DOM(mregs);
542 mon = MSTK_REG_MONTH(mregs);
543 year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) );
544 } else if (bregs) {
545 unsigned char val = readb(bregs + 0x0e); 567 unsigned char val = readb(bregs + 0x0e);
546 unsigned int century; 568 unsigned int century;
547 569
@@ -596,14 +618,6 @@ static void __init set_system_time(void)
596 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ); 618 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
597 set_normalized_timespec(&wall_to_monotonic, 619 set_normalized_timespec(&wall_to_monotonic,
598 -xtime.tv_sec, -xtime.tv_nsec); 620 -xtime.tv_sec, -xtime.tv_nsec);
599
600 if (mregs) {
601 tmp = mostek_read(mregs + MOSTEK_CREG);
602 tmp &= ~MSTK_CREG_READ;
603 mostek_write(mregs + MOSTEK_CREG, tmp);
604
605 spin_unlock_irq(&mostek_lock);
606 }
607} 621}
608 622
609/* davem suggests we keep this within the 4M locked kernel image */ 623/* davem suggests we keep this within the 4M locked kernel image */
@@ -1027,7 +1041,7 @@ void __init time_init(void)
1027 setup_clockevent_multiplier(clock); 1041 setup_clockevent_multiplier(clock);
1028 1042
1029 sparc64_clockevent.max_delta_ns = 1043 sparc64_clockevent.max_delta_ns =
1030 clockevent_delta2ns(0x7fffffffffffffff, &sparc64_clockevent); 1044 clockevent_delta2ns(0x7fffffffffffffffUL, &sparc64_clockevent);
1031 sparc64_clockevent.min_delta_ns = 1045 sparc64_clockevent.min_delta_ns =
1032 clockevent_delta2ns(0xF, &sparc64_clockevent); 1046 clockevent_delta2ns(0xF, &sparc64_clockevent);
1033 1047
diff --git a/arch/sparc64/kernel/traps.c b/arch/sparc64/kernel/traps.c
index 007f5317c0de..96da847023f3 100644
--- a/arch/sparc64/kernel/traps.c
+++ b/arch/sparc64/kernel/traps.c
@@ -42,6 +42,7 @@
42#endif 42#endif
43#include <asm/prom.h> 43#include <asm/prom.h>
44 44
45#include "entry.h"
45 46
46/* When an irrecoverable trap occurs at tl > 0, the trap entry 47/* When an irrecoverable trap occurs at tl > 0, the trap entry
47 * code logs the trap state registers at every level in the trap 48 * code logs the trap state registers at every level in the trap
@@ -77,11 +78,6 @@ static void dump_tl1_traplog(struct tl1_traplog *p)
77 } 78 }
78} 79}
79 80
80void do_call_debug(struct pt_regs *regs)
81{
82 notify_die(DIE_CALL, "debug call", regs, 0, 255, SIGINT);
83}
84
85void bad_trap(struct pt_regs *regs, long lvl) 81void bad_trap(struct pt_regs *regs, long lvl)
86{ 82{
87 char buffer[32]; 83 char buffer[32];
@@ -550,41 +546,6 @@ static unsigned long ecache_flush_physbase;
550static unsigned long ecache_flush_linesize; 546static unsigned long ecache_flush_linesize;
551static unsigned long ecache_flush_size; 547static unsigned long ecache_flush_size;
552 548
553/* WARNING: The error trap handlers in assembly know the precise
554 * layout of the following structure.
555 *
556 * C-level handlers below use this information to log the error
557 * and then determine how to recover (if possible).
558 */
559struct cheetah_err_info {
560/*0x00*/u64 afsr;
561/*0x08*/u64 afar;
562
563 /* D-cache state */
564/*0x10*/u64 dcache_data[4]; /* The actual data */
565/*0x30*/u64 dcache_index; /* D-cache index */
566/*0x38*/u64 dcache_tag; /* D-cache tag/valid */
567/*0x40*/u64 dcache_utag; /* D-cache microtag */
568/*0x48*/u64 dcache_stag; /* D-cache snooptag */
569
570 /* I-cache state */
571/*0x50*/u64 icache_data[8]; /* The actual insns + predecode */
572/*0x90*/u64 icache_index; /* I-cache index */
573/*0x98*/u64 icache_tag; /* I-cache phys tag */
574/*0xa0*/u64 icache_utag; /* I-cache microtag */
575/*0xa8*/u64 icache_stag; /* I-cache snooptag */
576/*0xb0*/u64 icache_upper; /* I-cache upper-tag */
577/*0xb8*/u64 icache_lower; /* I-cache lower-tag */
578
579 /* E-cache state */
580/*0xc0*/u64 ecache_data[4]; /* 32 bytes from staging registers */
581/*0xe0*/u64 ecache_index; /* E-cache index */
582/*0xe8*/u64 ecache_tag; /* E-cache tag/state */
583
584/*0xf0*/u64 __pad[32 - 30];
585};
586#define CHAFSR_INVALID ((u64)-1L)
587
588/* This table is ordered in priority of errors and matches the 549/* This table is ordered in priority of errors and matches the
589 * AFAR overwrite policy as well. 550 * AFAR overwrite policy as well.
590 */ 551 */
@@ -758,10 +719,6 @@ static struct afsr_error_table __jalapeno_error_table[] = {
758static struct afsr_error_table *cheetah_error_table; 719static struct afsr_error_table *cheetah_error_table;
759static unsigned long cheetah_afsr_errors; 720static unsigned long cheetah_afsr_errors;
760 721
761/* This is allocated at boot time based upon the largest hardware
762 * cpu ID in the system. We allocate two entries per cpu, one for
763 * TL==0 logging and one for TL >= 1 logging.
764 */
765struct cheetah_err_info *cheetah_error_log; 722struct cheetah_err_info *cheetah_error_log;
766 723
767static inline struct cheetah_err_info *cheetah_get_error_log(unsigned long afsr) 724static inline struct cheetah_err_info *cheetah_get_error_log(unsigned long afsr)
@@ -2102,7 +2059,7 @@ void do_div0(struct pt_regs *regs)
2102 force_sig_info(SIGFPE, &info, current); 2059 force_sig_info(SIGFPE, &info, current);
2103} 2060}
2104 2061
2105void instruction_dump (unsigned int *pc) 2062static void instruction_dump(unsigned int *pc)
2106{ 2063{
2107 int i; 2064 int i;
2108 2065
@@ -2115,7 +2072,7 @@ void instruction_dump (unsigned int *pc)
2115 printk("\n"); 2072 printk("\n");
2116} 2073}
2117 2074
2118static void user_instruction_dump (unsigned int __user *pc) 2075static void user_instruction_dump(unsigned int __user *pc)
2119{ 2076{
2120 int i; 2077 int i;
2121 unsigned int buf[9]; 2078 unsigned int buf[9];