[SPARC64]: Deal with PTE layout differences in SUN4V.

Yes, you heard it right, they changed the PTE layout for
SUN4V.  Ho hum...

This is the simple and inefficient way to support this.
It'll get optimized, don't worry.

Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 5 insertions, 4 deletions

diff --git a/arch/sparc64/kernel/tsb.S b/arch/sparc64/kernel/tsb.S
index 667dcb077be7..be8f0892d721 100644
--- a/arch/sparc64/kernel/tsb.S
+++ b/arch/sparc64/kernel/tsb.S
@@ -56,10 +56,11 @@ tsb_reload:
         /* If it is larger than the base page size, don't
          * bother putting it into the TSB.
          */
-        srlx            %g5, 32, %g2
-        sethi           %hi(_PAGE_ALL_SZ_BITS >> 32), %g7
-        and             %g2, %g7, %g2
-        sethi           %hi(_PAGE_SZBITS >> 32), %g7
+        sethi           %hi(_PAGE_ALL_SZ_BITS), %g7
+        ldx             [%g7 + %lo(_PAGE_ALL_SZ_BITS)], %g7
+        and             %g5, %g7, %g2
+        sethi           %hi(_PAGE_SZBITS), %g7
+        ldx             [%g7 + %lo(_PAGE_SZBITS)], %g7
         cmp             %g2, %g7
         bne,a,pn        %xcc, tsb_tlb_reload
          TSB_STORE(%g1, %g0)