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author | Linus Torvalds <torvalds@g5.osdl.org> | 2005-10-08 17:57:20 -0400 |
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committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-10-08 17:57:20 -0400 |
commit | 582fd487611baa06b07665978429192390c29b8f (patch) | |
tree | 05625e483cc3ebf0de1a2df8dfd57bbb5a208c28 /arch/sparc64/kernel/rtrap.S | |
parent | 7ab501db8cb6659efdf04034e0de6b44c059a51b (diff) | |
parent | ba6399334dd8a75bd295de26496196c720abae0a (diff) |
Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6
Diffstat (limited to 'arch/sparc64/kernel/rtrap.S')
-rw-r--r-- | arch/sparc64/kernel/rtrap.S | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/sparc64/kernel/rtrap.S b/arch/sparc64/kernel/rtrap.S index ecfb42a69a44..090dcca00d2a 100644 --- a/arch/sparc64/kernel/rtrap.S +++ b/arch/sparc64/kernel/rtrap.S | |||
@@ -312,32 +312,33 @@ kern_fpucheck: ldub [%g6 + TI_FPDEPTH], %l5 | |||
312 | wr %g1, FPRS_FEF, %fprs | 312 | wr %g1, FPRS_FEF, %fprs |
313 | ldx [%o1 + %o5], %g1 | 313 | ldx [%o1 + %o5], %g1 |
314 | add %g6, TI_XFSR, %o1 | 314 | add %g6, TI_XFSR, %o1 |
315 | membar #StoreLoad | #LoadLoad | ||
316 | sll %o0, 8, %o2 | 315 | sll %o0, 8, %o2 |
317 | add %g6, TI_FPREGS, %o3 | 316 | add %g6, TI_FPREGS, %o3 |
318 | brz,pn %l6, 1f | 317 | brz,pn %l6, 1f |
319 | add %g6, TI_FPREGS+0x40, %o4 | 318 | add %g6, TI_FPREGS+0x40, %o4 |
320 | 319 | ||
320 | membar #Sync | ||
321 | ldda [%o3 + %o2] ASI_BLK_P, %f0 | 321 | ldda [%o3 + %o2] ASI_BLK_P, %f0 |
322 | ldda [%o4 + %o2] ASI_BLK_P, %f16 | 322 | ldda [%o4 + %o2] ASI_BLK_P, %f16 |
323 | membar #Sync | ||
323 | 1: andcc %l2, FPRS_DU, %g0 | 324 | 1: andcc %l2, FPRS_DU, %g0 |
324 | be,pn %icc, 1f | 325 | be,pn %icc, 1f |
325 | wr %g1, 0, %gsr | 326 | wr %g1, 0, %gsr |
326 | add %o2, 0x80, %o2 | 327 | add %o2, 0x80, %o2 |
328 | membar #Sync | ||
327 | ldda [%o3 + %o2] ASI_BLK_P, %f32 | 329 | ldda [%o3 + %o2] ASI_BLK_P, %f32 |
328 | ldda [%o4 + %o2] ASI_BLK_P, %f48 | 330 | ldda [%o4 + %o2] ASI_BLK_P, %f48 |
329 | |||
330 | 1: membar #Sync | 331 | 1: membar #Sync |
331 | ldx [%o1 + %o5], %fsr | 332 | ldx [%o1 + %o5], %fsr |
332 | 2: stb %l5, [%g6 + TI_FPDEPTH] | 333 | 2: stb %l5, [%g6 + TI_FPDEPTH] |
333 | ba,pt %xcc, rt_continue | 334 | ba,pt %xcc, rt_continue |
334 | nop | 335 | nop |
335 | 5: wr %g0, FPRS_FEF, %fprs | 336 | 5: wr %g0, FPRS_FEF, %fprs |
336 | membar #StoreLoad | #LoadLoad | ||
337 | sll %o0, 8, %o2 | 337 | sll %o0, 8, %o2 |
338 | 338 | ||
339 | add %g6, TI_FPREGS+0x80, %o3 | 339 | add %g6, TI_FPREGS+0x80, %o3 |
340 | add %g6, TI_FPREGS+0xc0, %o4 | 340 | add %g6, TI_FPREGS+0xc0, %o4 |
341 | membar #Sync | ||
341 | ldda [%o3 + %o2] ASI_BLK_P, %f32 | 342 | ldda [%o3 + %o2] ASI_BLK_P, %f32 |
342 | ldda [%o4 + %o2] ASI_BLK_P, %f48 | 343 | ldda [%o4 + %o2] ASI_BLK_P, %f48 |
343 | membar #Sync | 344 | membar #Sync |