[SPARC64]: Fix _PAGE_EXEC handling.

First of all, use the known _PAGE_EXEC_{4U,4V} value instead
of loading _PAGE_EXEC from memory.  We either know which one
to use by context, or we can code patch the test.

Next, we need to check executability of a PTE in the generic
TSB miss handler.

Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 5 insertions, 5 deletions

diff --git a/arch/sparc64/kernel/itlb_miss.S b/arch/sparc64/kernel/itlb_miss.S
index 6dfe3968c379..ad46e2024f4b 100644
--- a/arch/sparc64/kernel/itlb_miss.S
+++ b/arch/sparc64/kernel/itlb_miss.S
@@ -9,18 +9,18 @@
         cmp     %g4, %g6                        ! Compare TAG
 
 /* ITLB ** ICACHE line 2: TSB compare and TLB load      */
-        sethi   %hi(PAGE_EXEC), %g4             ! Setup exec check
-        ldx     [%g4 + %lo(PAGE_EXEC)], %g4
         bne,pn  %xcc, tsb_miss_itlb             ! Miss
          mov    FAULT_CODE_ITLB, %g3
-        andcc   %g5, %g4, %g0                   ! Executable?
+        andcc   %g5, _PAGE_EXEC_4U, %g0         ! Executable?
         be,pn   %xcc, tsb_do_fault
          nop                                    ! Delay slot, fill me
+        stxa    %g5, [%g0] ASI_ITLB_DATA_IN     ! Load TLB
+        retry                                   ! Trap done
         nop
 
 /* ITLB ** ICACHE line 3:                               */
-        stxa    %g5, [%g0] ASI_ITLB_DATA_IN     ! Load TLB
-        retry                                   ! Trap done
+        nop
+        nop
         nop
         nop
         nop