diff options
author | Ingo Molnar <mingo@elte.hu> | 2009-09-15 06:18:15 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2009-09-15 06:18:15 -0400 |
commit | dca2d6ac09d9ef59ff46820d4f0c94b08a671202 (patch) | |
tree | fdec753b842dad09e3a4151954fab3eb5c43500d /arch/sparc/kernel | |
parent | d6a65dffb30d8636b1e5d4c201564ef401a246cf (diff) | |
parent | 18240904960a39e582ced8ba8ececb10b8c22dd3 (diff) |
Merge branch 'linus' into tracing/hw-breakpoints
Conflicts:
arch/x86/kernel/process_64.c
Semantic conflict fixed in:
arch/x86/kvm/x86.c
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/sparc/kernel')
26 files changed, 1100 insertions, 339 deletions
diff --git a/arch/sparc/kernel/Makefile b/arch/sparc/kernel/Makefile index 475ce4696acd..247cc620cee5 100644 --- a/arch/sparc/kernel/Makefile +++ b/arch/sparc/kernel/Makefile | |||
@@ -41,6 +41,8 @@ obj-y += of_device_common.o | |||
41 | obj-y += of_device_$(BITS).o | 41 | obj-y += of_device_$(BITS).o |
42 | obj-$(CONFIG_SPARC64) += prom_irqtrans.o | 42 | obj-$(CONFIG_SPARC64) += prom_irqtrans.o |
43 | 43 | ||
44 | obj-$(CONFIG_SPARC_LEON)+= leon_kernel.o | ||
45 | |||
44 | obj-$(CONFIG_SPARC64) += reboot.o | 46 | obj-$(CONFIG_SPARC64) += reboot.o |
45 | obj-$(CONFIG_SPARC64) += sysfs.o | 47 | obj-$(CONFIG_SPARC64) += sysfs.o |
46 | obj-$(CONFIG_SPARC64) += iommu.o | 48 | obj-$(CONFIG_SPARC64) += iommu.o |
@@ -61,7 +63,7 @@ obj-$(CONFIG_SPARC64_SMP) += cpumap.o | |||
61 | obj-$(CONFIG_SPARC32) += devres.o | 63 | obj-$(CONFIG_SPARC32) += devres.o |
62 | devres-y := ../../../kernel/irq/devres.o | 64 | devres-y := ../../../kernel/irq/devres.o |
63 | 65 | ||
64 | obj-$(CONFIG_SPARC32) += dma.o | 66 | obj-y += dma.o |
65 | 67 | ||
66 | obj-$(CONFIG_SPARC32_PCI) += pcic.o | 68 | obj-$(CONFIG_SPARC32_PCI) += pcic.o |
67 | 69 | ||
@@ -101,3 +103,6 @@ obj-$(CONFIG_SUN_LDOMS) += ldc.o vio.o viohs.o ds.o | |||
101 | obj-$(CONFIG_AUDIT) += audit.o | 103 | obj-$(CONFIG_AUDIT) += audit.o |
102 | audit--$(CONFIG_AUDIT) := compat_audit.o | 104 | audit--$(CONFIG_AUDIT) := compat_audit.o |
103 | obj-$(CONFIG_COMPAT) += $(audit--y) | 105 | obj-$(CONFIG_COMPAT) += $(audit--y) |
106 | |||
107 | pc--$(CONFIG_PERF_COUNTERS) := perf_counter.o | ||
108 | obj-$(CONFIG_SPARC64) += $(pc--y) | ||
diff --git a/arch/sparc/kernel/cpu.c b/arch/sparc/kernel/cpu.c index d85c3dc4953a..1446df90ef85 100644 --- a/arch/sparc/kernel/cpu.c +++ b/arch/sparc/kernel/cpu.c | |||
@@ -312,7 +312,12 @@ void __cpuinit cpu_probe(void) | |||
312 | 312 | ||
313 | psr = get_psr(); | 313 | psr = get_psr(); |
314 | put_psr(psr | PSR_EF); | 314 | put_psr(psr | PSR_EF); |
315 | #ifdef CONFIG_SPARC_LEON | ||
316 | fpu_vers = 7; | ||
317 | #else | ||
315 | fpu_vers = ((get_fsr() >> 17) & 0x7); | 318 | fpu_vers = ((get_fsr() >> 17) & 0x7); |
319 | #endif | ||
320 | |||
316 | put_psr(psr); | 321 | put_psr(psr); |
317 | 322 | ||
318 | set_cpu_and_fpu(psr_impl, psr_vers, fpu_vers); | 323 | set_cpu_and_fpu(psr_impl, psr_vers, fpu_vers); |
diff --git a/arch/sparc/kernel/dma.c b/arch/sparc/kernel/dma.c index 524c32f97c55..e1ba8ee21b9a 100644 --- a/arch/sparc/kernel/dma.c +++ b/arch/sparc/kernel/dma.c | |||
@@ -1,178 +1,13 @@ | |||
1 | /* dma.c: PCI and SBUS DMA accessors for 32-bit sparc. | ||
2 | * | ||
3 | * Copyright (C) 2008 David S. Miller <davem@davemloft.net> | ||
4 | */ | ||
5 | |||
6 | #include <linux/kernel.h> | 1 | #include <linux/kernel.h> |
7 | #include <linux/module.h> | 2 | #include <linux/module.h> |
8 | #include <linux/dma-mapping.h> | 3 | #include <linux/dma-mapping.h> |
9 | #include <linux/scatterlist.h> | 4 | #include <linux/dma-debug.h> |
10 | #include <linux/mm.h> | ||
11 | |||
12 | #ifdef CONFIG_PCI | ||
13 | #include <linux/pci.h> | ||
14 | #endif | ||
15 | 5 | ||
16 | #include "dma.h" | 6 | #define PREALLOC_DMA_DEBUG_ENTRIES (1 << 15) |
17 | 7 | ||
18 | int dma_supported(struct device *dev, u64 mask) | 8 | static int __init dma_init(void) |
19 | { | 9 | { |
20 | #ifdef CONFIG_PCI | 10 | dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES); |
21 | if (dev->bus == &pci_bus_type) | ||
22 | return pci_dma_supported(to_pci_dev(dev), mask); | ||
23 | #endif | ||
24 | return 0; | 11 | return 0; |
25 | } | 12 | } |
26 | EXPORT_SYMBOL(dma_supported); | 13 | fs_initcall(dma_init); |
27 | |||
28 | int dma_set_mask(struct device *dev, u64 dma_mask) | ||
29 | { | ||
30 | #ifdef CONFIG_PCI | ||
31 | if (dev->bus == &pci_bus_type) | ||
32 | return pci_set_dma_mask(to_pci_dev(dev), dma_mask); | ||
33 | #endif | ||
34 | return -EOPNOTSUPP; | ||
35 | } | ||
36 | EXPORT_SYMBOL(dma_set_mask); | ||
37 | |||
38 | static void *dma32_alloc_coherent(struct device *dev, size_t size, | ||
39 | dma_addr_t *dma_handle, gfp_t flag) | ||
40 | { | ||
41 | #ifdef CONFIG_PCI | ||
42 | if (dev->bus == &pci_bus_type) | ||
43 | return pci_alloc_consistent(to_pci_dev(dev), size, dma_handle); | ||
44 | #endif | ||
45 | return sbus_alloc_consistent(dev, size, dma_handle); | ||
46 | } | ||
47 | |||
48 | static void dma32_free_coherent(struct device *dev, size_t size, | ||
49 | void *cpu_addr, dma_addr_t dma_handle) | ||
50 | { | ||
51 | #ifdef CONFIG_PCI | ||
52 | if (dev->bus == &pci_bus_type) { | ||
53 | pci_free_consistent(to_pci_dev(dev), size, | ||
54 | cpu_addr, dma_handle); | ||
55 | return; | ||
56 | } | ||
57 | #endif | ||
58 | sbus_free_consistent(dev, size, cpu_addr, dma_handle); | ||
59 | } | ||
60 | |||
61 | static dma_addr_t dma32_map_page(struct device *dev, struct page *page, | ||
62 | unsigned long offset, size_t size, | ||
63 | enum dma_data_direction direction) | ||
64 | { | ||
65 | #ifdef CONFIG_PCI | ||
66 | if (dev->bus == &pci_bus_type) | ||
67 | return pci_map_page(to_pci_dev(dev), page, offset, | ||
68 | size, (int)direction); | ||
69 | #endif | ||
70 | return sbus_map_single(dev, page_address(page) + offset, | ||
71 | size, (int)direction); | ||
72 | } | ||
73 | |||
74 | static void dma32_unmap_page(struct device *dev, dma_addr_t dma_address, | ||
75 | size_t size, enum dma_data_direction direction) | ||
76 | { | ||
77 | #ifdef CONFIG_PCI | ||
78 | if (dev->bus == &pci_bus_type) { | ||
79 | pci_unmap_page(to_pci_dev(dev), dma_address, | ||
80 | size, (int)direction); | ||
81 | return; | ||
82 | } | ||
83 | #endif | ||
84 | sbus_unmap_single(dev, dma_address, size, (int)direction); | ||
85 | } | ||
86 | |||
87 | static int dma32_map_sg(struct device *dev, struct scatterlist *sg, | ||
88 | int nents, enum dma_data_direction direction) | ||
89 | { | ||
90 | #ifdef CONFIG_PCI | ||
91 | if (dev->bus == &pci_bus_type) | ||
92 | return pci_map_sg(to_pci_dev(dev), sg, nents, (int)direction); | ||
93 | #endif | ||
94 | return sbus_map_sg(dev, sg, nents, direction); | ||
95 | } | ||
96 | |||
97 | void dma32_unmap_sg(struct device *dev, struct scatterlist *sg, | ||
98 | int nents, enum dma_data_direction direction) | ||
99 | { | ||
100 | #ifdef CONFIG_PCI | ||
101 | if (dev->bus == &pci_bus_type) { | ||
102 | pci_unmap_sg(to_pci_dev(dev), sg, nents, (int)direction); | ||
103 | return; | ||
104 | } | ||
105 | #endif | ||
106 | sbus_unmap_sg(dev, sg, nents, (int)direction); | ||
107 | } | ||
108 | |||
109 | static void dma32_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, | ||
110 | size_t size, | ||
111 | enum dma_data_direction direction) | ||
112 | { | ||
113 | #ifdef CONFIG_PCI | ||
114 | if (dev->bus == &pci_bus_type) { | ||
115 | pci_dma_sync_single_for_cpu(to_pci_dev(dev), dma_handle, | ||
116 | size, (int)direction); | ||
117 | return; | ||
118 | } | ||
119 | #endif | ||
120 | sbus_dma_sync_single_for_cpu(dev, dma_handle, size, (int) direction); | ||
121 | } | ||
122 | |||
123 | static void dma32_sync_single_for_device(struct device *dev, | ||
124 | dma_addr_t dma_handle, size_t size, | ||
125 | enum dma_data_direction direction) | ||
126 | { | ||
127 | #ifdef CONFIG_PCI | ||
128 | if (dev->bus == &pci_bus_type) { | ||
129 | pci_dma_sync_single_for_device(to_pci_dev(dev), dma_handle, | ||
130 | size, (int)direction); | ||
131 | return; | ||
132 | } | ||
133 | #endif | ||
134 | sbus_dma_sync_single_for_device(dev, dma_handle, size, (int) direction); | ||
135 | } | ||
136 | |||
137 | static void dma32_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, | ||
138 | int nelems, enum dma_data_direction direction) | ||
139 | { | ||
140 | #ifdef CONFIG_PCI | ||
141 | if (dev->bus == &pci_bus_type) { | ||
142 | pci_dma_sync_sg_for_cpu(to_pci_dev(dev), sg, | ||
143 | nelems, (int)direction); | ||
144 | return; | ||
145 | } | ||
146 | #endif | ||
147 | BUG(); | ||
148 | } | ||
149 | |||
150 | static void dma32_sync_sg_for_device(struct device *dev, | ||
151 | struct scatterlist *sg, int nelems, | ||
152 | enum dma_data_direction direction) | ||
153 | { | ||
154 | #ifdef CONFIG_PCI | ||
155 | if (dev->bus == &pci_bus_type) { | ||
156 | pci_dma_sync_sg_for_device(to_pci_dev(dev), sg, | ||
157 | nelems, (int)direction); | ||
158 | return; | ||
159 | } | ||
160 | #endif | ||
161 | BUG(); | ||
162 | } | ||
163 | |||
164 | static const struct dma_ops dma32_dma_ops = { | ||
165 | .alloc_coherent = dma32_alloc_coherent, | ||
166 | .free_coherent = dma32_free_coherent, | ||
167 | .map_page = dma32_map_page, | ||
168 | .unmap_page = dma32_unmap_page, | ||
169 | .map_sg = dma32_map_sg, | ||
170 | .unmap_sg = dma32_unmap_sg, | ||
171 | .sync_single_for_cpu = dma32_sync_single_for_cpu, | ||
172 | .sync_single_for_device = dma32_sync_single_for_device, | ||
173 | .sync_sg_for_cpu = dma32_sync_sg_for_cpu, | ||
174 | .sync_sg_for_device = dma32_sync_sg_for_device, | ||
175 | }; | ||
176 | |||
177 | const struct dma_ops *dma_ops = &dma32_dma_ops; | ||
178 | EXPORT_SYMBOL(dma_ops); | ||
diff --git a/arch/sparc/kernel/dma.h b/arch/sparc/kernel/dma.h deleted file mode 100644 index f8d8951adb53..000000000000 --- a/arch/sparc/kernel/dma.h +++ /dev/null | |||
@@ -1,14 +0,0 @@ | |||
1 | void *sbus_alloc_consistent(struct device *dev, long len, u32 *dma_addrp); | ||
2 | void sbus_free_consistent(struct device *dev, long n, void *p, u32 ba); | ||
3 | dma_addr_t sbus_map_single(struct device *dev, void *va, | ||
4 | size_t len, int direction); | ||
5 | void sbus_unmap_single(struct device *dev, dma_addr_t ba, | ||
6 | size_t n, int direction); | ||
7 | int sbus_map_sg(struct device *dev, struct scatterlist *sg, | ||
8 | int n, int direction); | ||
9 | void sbus_unmap_sg(struct device *dev, struct scatterlist *sg, | ||
10 | int n, int direction); | ||
11 | void sbus_dma_sync_single_for_cpu(struct device *dev, dma_addr_t ba, | ||
12 | size_t size, int direction); | ||
13 | void sbus_dma_sync_single_for_device(struct device *dev, dma_addr_t ba, | ||
14 | size_t size, int direction); | ||
diff --git a/arch/sparc/kernel/head_32.S b/arch/sparc/kernel/head_32.S index 6b4d8acc4c83..439d82a95ac9 100644 --- a/arch/sparc/kernel/head_32.S +++ b/arch/sparc/kernel/head_32.S | |||
@@ -809,6 +809,11 @@ found_version: | |||
809 | nop | 809 | nop |
810 | 810 | ||
811 | got_prop: | 811 | got_prop: |
812 | #ifdef CONFIG_SPARC_LEON | ||
813 | /* no cpu-type check is needed, it is a SPARC-LEON */ | ||
814 | ba sun4c_continue_boot | ||
815 | nop | ||
816 | #endif | ||
812 | set cputypval, %o2 | 817 | set cputypval, %o2 |
813 | ldub [%o2 + 0x4], %l1 | 818 | ldub [%o2 + 0x4], %l1 |
814 | 819 | ||
diff --git a/arch/sparc/kernel/idprom.c b/arch/sparc/kernel/idprom.c index 57922f69c3f7..52a15fe2db19 100644 --- a/arch/sparc/kernel/idprom.c +++ b/arch/sparc/kernel/idprom.c | |||
@@ -31,6 +31,8 @@ static struct Sun_Machine_Models Sun_Machines[NUM_SUN_MACHINES] = { | |||
31 | { .name = "Sun 4/200 Series", .id_machtype = (SM_SUN4 | SM_4_260) }, | 31 | { .name = "Sun 4/200 Series", .id_machtype = (SM_SUN4 | SM_4_260) }, |
32 | { .name = "Sun 4/300 Series", .id_machtype = (SM_SUN4 | SM_4_330) }, | 32 | { .name = "Sun 4/300 Series", .id_machtype = (SM_SUN4 | SM_4_330) }, |
33 | { .name = "Sun 4/400 Series", .id_machtype = (SM_SUN4 | SM_4_470) }, | 33 | { .name = "Sun 4/400 Series", .id_machtype = (SM_SUN4 | SM_4_470) }, |
34 | /* Now Leon */ | ||
35 | { .name = "Leon3 System-on-a-Chip", .id_machtype = (M_LEON | M_LEON3_SOC) }, | ||
34 | /* Now, Sun4c's */ | 36 | /* Now, Sun4c's */ |
35 | { .name = "Sun4c SparcStation 1", .id_machtype = (SM_SUN4C | SM_4C_SS1) }, | 37 | { .name = "Sun4c SparcStation 1", .id_machtype = (SM_SUN4C | SM_4C_SS1) }, |
36 | { .name = "Sun4c SparcStation IPC", .id_machtype = (SM_SUN4C | SM_4C_IPC) }, | 38 | { .name = "Sun4c SparcStation IPC", .id_machtype = (SM_SUN4C | SM_4C_IPC) }, |
diff --git a/arch/sparc/kernel/iommu.c b/arch/sparc/kernel/iommu.c index 0aeaefe696b9..7690cc219ecc 100644 --- a/arch/sparc/kernel/iommu.c +++ b/arch/sparc/kernel/iommu.c | |||
@@ -353,7 +353,8 @@ static void dma_4u_free_coherent(struct device *dev, size_t size, | |||
353 | 353 | ||
354 | static dma_addr_t dma_4u_map_page(struct device *dev, struct page *page, | 354 | static dma_addr_t dma_4u_map_page(struct device *dev, struct page *page, |
355 | unsigned long offset, size_t sz, | 355 | unsigned long offset, size_t sz, |
356 | enum dma_data_direction direction) | 356 | enum dma_data_direction direction, |
357 | struct dma_attrs *attrs) | ||
357 | { | 358 | { |
358 | struct iommu *iommu; | 359 | struct iommu *iommu; |
359 | struct strbuf *strbuf; | 360 | struct strbuf *strbuf; |
@@ -474,7 +475,8 @@ do_flush_sync: | |||
474 | } | 475 | } |
475 | 476 | ||
476 | static void dma_4u_unmap_page(struct device *dev, dma_addr_t bus_addr, | 477 | static void dma_4u_unmap_page(struct device *dev, dma_addr_t bus_addr, |
477 | size_t sz, enum dma_data_direction direction) | 478 | size_t sz, enum dma_data_direction direction, |
479 | struct dma_attrs *attrs) | ||
478 | { | 480 | { |
479 | struct iommu *iommu; | 481 | struct iommu *iommu; |
480 | struct strbuf *strbuf; | 482 | struct strbuf *strbuf; |
@@ -520,7 +522,8 @@ static void dma_4u_unmap_page(struct device *dev, dma_addr_t bus_addr, | |||
520 | } | 522 | } |
521 | 523 | ||
522 | static int dma_4u_map_sg(struct device *dev, struct scatterlist *sglist, | 524 | static int dma_4u_map_sg(struct device *dev, struct scatterlist *sglist, |
523 | int nelems, enum dma_data_direction direction) | 525 | int nelems, enum dma_data_direction direction, |
526 | struct dma_attrs *attrs) | ||
524 | { | 527 | { |
525 | struct scatterlist *s, *outs, *segstart; | 528 | struct scatterlist *s, *outs, *segstart; |
526 | unsigned long flags, handle, prot, ctx; | 529 | unsigned long flags, handle, prot, ctx; |
@@ -691,7 +694,8 @@ static unsigned long fetch_sg_ctx(struct iommu *iommu, struct scatterlist *sg) | |||
691 | } | 694 | } |
692 | 695 | ||
693 | static void dma_4u_unmap_sg(struct device *dev, struct scatterlist *sglist, | 696 | static void dma_4u_unmap_sg(struct device *dev, struct scatterlist *sglist, |
694 | int nelems, enum dma_data_direction direction) | 697 | int nelems, enum dma_data_direction direction, |
698 | struct dma_attrs *attrs) | ||
695 | { | 699 | { |
696 | unsigned long flags, ctx; | 700 | unsigned long flags, ctx; |
697 | struct scatterlist *sg; | 701 | struct scatterlist *sg; |
@@ -822,7 +826,7 @@ static void dma_4u_sync_sg_for_cpu(struct device *dev, | |||
822 | spin_unlock_irqrestore(&iommu->lock, flags); | 826 | spin_unlock_irqrestore(&iommu->lock, flags); |
823 | } | 827 | } |
824 | 828 | ||
825 | static const struct dma_ops sun4u_dma_ops = { | 829 | static struct dma_map_ops sun4u_dma_ops = { |
826 | .alloc_coherent = dma_4u_alloc_coherent, | 830 | .alloc_coherent = dma_4u_alloc_coherent, |
827 | .free_coherent = dma_4u_free_coherent, | 831 | .free_coherent = dma_4u_free_coherent, |
828 | .map_page = dma_4u_map_page, | 832 | .map_page = dma_4u_map_page, |
@@ -833,9 +837,11 @@ static const struct dma_ops sun4u_dma_ops = { | |||
833 | .sync_sg_for_cpu = dma_4u_sync_sg_for_cpu, | 837 | .sync_sg_for_cpu = dma_4u_sync_sg_for_cpu, |
834 | }; | 838 | }; |
835 | 839 | ||
836 | const struct dma_ops *dma_ops = &sun4u_dma_ops; | 840 | struct dma_map_ops *dma_ops = &sun4u_dma_ops; |
837 | EXPORT_SYMBOL(dma_ops); | 841 | EXPORT_SYMBOL(dma_ops); |
838 | 842 | ||
843 | extern int pci64_dma_supported(struct pci_dev *pdev, u64 device_mask); | ||
844 | |||
839 | int dma_supported(struct device *dev, u64 device_mask) | 845 | int dma_supported(struct device *dev, u64 device_mask) |
840 | { | 846 | { |
841 | struct iommu *iommu = dev->archdata.iommu; | 847 | struct iommu *iommu = dev->archdata.iommu; |
@@ -849,7 +855,7 @@ int dma_supported(struct device *dev, u64 device_mask) | |||
849 | 855 | ||
850 | #ifdef CONFIG_PCI | 856 | #ifdef CONFIG_PCI |
851 | if (dev->bus == &pci_bus_type) | 857 | if (dev->bus == &pci_bus_type) |
852 | return pci_dma_supported(to_pci_dev(dev), device_mask); | 858 | return pci64_dma_supported(to_pci_dev(dev), device_mask); |
853 | #endif | 859 | #endif |
854 | 860 | ||
855 | return 0; | 861 | return 0; |
diff --git a/arch/sparc/kernel/ioport.c b/arch/sparc/kernel/ioport.c index 87ea0d03d975..9f61fd8cbb7b 100644 --- a/arch/sparc/kernel/ioport.c +++ b/arch/sparc/kernel/ioport.c | |||
@@ -35,6 +35,7 @@ | |||
35 | #include <linux/slab.h> | 35 | #include <linux/slab.h> |
36 | #include <linux/pci.h> /* struct pci_dev */ | 36 | #include <linux/pci.h> /* struct pci_dev */ |
37 | #include <linux/proc_fs.h> | 37 | #include <linux/proc_fs.h> |
38 | #include <linux/seq_file.h> | ||
38 | #include <linux/scatterlist.h> | 39 | #include <linux/scatterlist.h> |
39 | #include <linux/of_device.h> | 40 | #include <linux/of_device.h> |
40 | 41 | ||
@@ -48,8 +49,6 @@ | |||
48 | #include <asm/iommu.h> | 49 | #include <asm/iommu.h> |
49 | #include <asm/io-unit.h> | 50 | #include <asm/io-unit.h> |
50 | 51 | ||
51 | #include "dma.h" | ||
52 | |||
53 | #define mmu_inval_dma_area(p, l) /* Anton pulled it out for 2.4.0-xx */ | 52 | #define mmu_inval_dma_area(p, l) /* Anton pulled it out for 2.4.0-xx */ |
54 | 53 | ||
55 | static struct resource *_sparc_find_resource(struct resource *r, | 54 | static struct resource *_sparc_find_resource(struct resource *r, |
@@ -246,7 +245,8 @@ EXPORT_SYMBOL(sbus_set_sbus64); | |||
246 | * Typically devices use them for control blocks. | 245 | * Typically devices use them for control blocks. |
247 | * CPU may access them without any explicit flushing. | 246 | * CPU may access them without any explicit flushing. |
248 | */ | 247 | */ |
249 | void *sbus_alloc_consistent(struct device *dev, long len, u32 *dma_addrp) | 248 | static void *sbus_alloc_coherent(struct device *dev, size_t len, |
249 | dma_addr_t *dma_addrp, gfp_t gfp) | ||
250 | { | 250 | { |
251 | struct of_device *op = to_of_device(dev); | 251 | struct of_device *op = to_of_device(dev); |
252 | unsigned long len_total = (len + PAGE_SIZE-1) & PAGE_MASK; | 252 | unsigned long len_total = (len + PAGE_SIZE-1) & PAGE_MASK; |
@@ -299,7 +299,8 @@ err_nopages: | |||
299 | return NULL; | 299 | return NULL; |
300 | } | 300 | } |
301 | 301 | ||
302 | void sbus_free_consistent(struct device *dev, long n, void *p, u32 ba) | 302 | static void sbus_free_coherent(struct device *dev, size_t n, void *p, |
303 | dma_addr_t ba) | ||
303 | { | 304 | { |
304 | struct resource *res; | 305 | struct resource *res; |
305 | struct page *pgv; | 306 | struct page *pgv; |
@@ -317,7 +318,7 @@ void sbus_free_consistent(struct device *dev, long n, void *p, u32 ba) | |||
317 | 318 | ||
318 | n = (n + PAGE_SIZE-1) & PAGE_MASK; | 319 | n = (n + PAGE_SIZE-1) & PAGE_MASK; |
319 | if ((res->end-res->start)+1 != n) { | 320 | if ((res->end-res->start)+1 != n) { |
320 | printk("sbus_free_consistent: region 0x%lx asked 0x%lx\n", | 321 | printk("sbus_free_consistent: region 0x%lx asked 0x%zx\n", |
321 | (long)((res->end-res->start)+1), n); | 322 | (long)((res->end-res->start)+1), n); |
322 | return; | 323 | return; |
323 | } | 324 | } |
@@ -337,8 +338,13 @@ void sbus_free_consistent(struct device *dev, long n, void *p, u32 ba) | |||
337 | * CPU view of this memory may be inconsistent with | 338 | * CPU view of this memory may be inconsistent with |
338 | * a device view and explicit flushing is necessary. | 339 | * a device view and explicit flushing is necessary. |
339 | */ | 340 | */ |
340 | dma_addr_t sbus_map_single(struct device *dev, void *va, size_t len, int direction) | 341 | static dma_addr_t sbus_map_page(struct device *dev, struct page *page, |
342 | unsigned long offset, size_t len, | ||
343 | enum dma_data_direction dir, | ||
344 | struct dma_attrs *attrs) | ||
341 | { | 345 | { |
346 | void *va = page_address(page) + offset; | ||
347 | |||
342 | /* XXX why are some lengths signed, others unsigned? */ | 348 | /* XXX why are some lengths signed, others unsigned? */ |
343 | if (len <= 0) { | 349 | if (len <= 0) { |
344 | return 0; | 350 | return 0; |
@@ -350,12 +356,14 @@ dma_addr_t sbus_map_single(struct device *dev, void *va, size_t len, int directi | |||
350 | return mmu_get_scsi_one(dev, va, len); | 356 | return mmu_get_scsi_one(dev, va, len); |
351 | } | 357 | } |
352 | 358 | ||
353 | void sbus_unmap_single(struct device *dev, dma_addr_t ba, size_t n, int direction) | 359 | static void sbus_unmap_page(struct device *dev, dma_addr_t ba, size_t n, |
360 | enum dma_data_direction dir, struct dma_attrs *attrs) | ||
354 | { | 361 | { |
355 | mmu_release_scsi_one(dev, ba, n); | 362 | mmu_release_scsi_one(dev, ba, n); |
356 | } | 363 | } |
357 | 364 | ||
358 | int sbus_map_sg(struct device *dev, struct scatterlist *sg, int n, int direction) | 365 | static int sbus_map_sg(struct device *dev, struct scatterlist *sg, int n, |
366 | enum dma_data_direction dir, struct dma_attrs *attrs) | ||
359 | { | 367 | { |
360 | mmu_get_scsi_sgl(dev, sg, n); | 368 | mmu_get_scsi_sgl(dev, sg, n); |
361 | 369 | ||
@@ -366,19 +374,38 @@ int sbus_map_sg(struct device *dev, struct scatterlist *sg, int n, int direction | |||
366 | return n; | 374 | return n; |
367 | } | 375 | } |
368 | 376 | ||
369 | void sbus_unmap_sg(struct device *dev, struct scatterlist *sg, int n, int direction) | 377 | static void sbus_unmap_sg(struct device *dev, struct scatterlist *sg, int n, |
378 | enum dma_data_direction dir, struct dma_attrs *attrs) | ||
370 | { | 379 | { |
371 | mmu_release_scsi_sgl(dev, sg, n); | 380 | mmu_release_scsi_sgl(dev, sg, n); |
372 | } | 381 | } |
373 | 382 | ||
374 | void sbus_dma_sync_single_for_cpu(struct device *dev, dma_addr_t ba, size_t size, int direction) | 383 | static void sbus_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, |
384 | int n, enum dma_data_direction dir) | ||
375 | { | 385 | { |
386 | BUG(); | ||
376 | } | 387 | } |
377 | 388 | ||
378 | void sbus_dma_sync_single_for_device(struct device *dev, dma_addr_t ba, size_t size, int direction) | 389 | static void sbus_sync_sg_for_device(struct device *dev, struct scatterlist *sg, |
390 | int n, enum dma_data_direction dir) | ||
379 | { | 391 | { |
392 | BUG(); | ||
380 | } | 393 | } |
381 | 394 | ||
395 | struct dma_map_ops sbus_dma_ops = { | ||
396 | .alloc_coherent = sbus_alloc_coherent, | ||
397 | .free_coherent = sbus_free_coherent, | ||
398 | .map_page = sbus_map_page, | ||
399 | .unmap_page = sbus_unmap_page, | ||
400 | .map_sg = sbus_map_sg, | ||
401 | .unmap_sg = sbus_unmap_sg, | ||
402 | .sync_sg_for_cpu = sbus_sync_sg_for_cpu, | ||
403 | .sync_sg_for_device = sbus_sync_sg_for_device, | ||
404 | }; | ||
405 | |||
406 | struct dma_map_ops *dma_ops = &sbus_dma_ops; | ||
407 | EXPORT_SYMBOL(dma_ops); | ||
408 | |||
382 | static int __init sparc_register_ioport(void) | 409 | static int __init sparc_register_ioport(void) |
383 | { | 410 | { |
384 | register_proc_sparc_ioport(); | 411 | register_proc_sparc_ioport(); |
@@ -395,7 +422,8 @@ arch_initcall(sparc_register_ioport); | |||
395 | /* Allocate and map kernel buffer using consistent mode DMA for a device. | 422 | /* Allocate and map kernel buffer using consistent mode DMA for a device. |
396 | * hwdev should be valid struct pci_dev pointer for PCI devices. | 423 | * hwdev should be valid struct pci_dev pointer for PCI devices. |
397 | */ | 424 | */ |
398 | void *pci_alloc_consistent(struct pci_dev *pdev, size_t len, dma_addr_t *pba) | 425 | static void *pci32_alloc_coherent(struct device *dev, size_t len, |
426 | dma_addr_t *pba, gfp_t gfp) | ||
399 | { | 427 | { |
400 | unsigned long len_total = (len + PAGE_SIZE-1) & PAGE_MASK; | 428 | unsigned long len_total = (len + PAGE_SIZE-1) & PAGE_MASK; |
401 | unsigned long va; | 429 | unsigned long va; |
@@ -439,7 +467,6 @@ void *pci_alloc_consistent(struct pci_dev *pdev, size_t len, dma_addr_t *pba) | |||
439 | *pba = virt_to_phys(va); /* equals virt_to_bus (R.I.P.) for us. */ | 467 | *pba = virt_to_phys(va); /* equals virt_to_bus (R.I.P.) for us. */ |
440 | return (void *) res->start; | 468 | return (void *) res->start; |
441 | } | 469 | } |
442 | EXPORT_SYMBOL(pci_alloc_consistent); | ||
443 | 470 | ||
444 | /* Free and unmap a consistent DMA buffer. | 471 | /* Free and unmap a consistent DMA buffer. |
445 | * cpu_addr is what was returned from pci_alloc_consistent, | 472 | * cpu_addr is what was returned from pci_alloc_consistent, |
@@ -449,7 +476,8 @@ EXPORT_SYMBOL(pci_alloc_consistent); | |||
449 | * References to the memory and mappings associated with cpu_addr/dma_addr | 476 | * References to the memory and mappings associated with cpu_addr/dma_addr |
450 | * past this call are illegal. | 477 | * past this call are illegal. |
451 | */ | 478 | */ |
452 | void pci_free_consistent(struct pci_dev *pdev, size_t n, void *p, dma_addr_t ba) | 479 | static void pci32_free_coherent(struct device *dev, size_t n, void *p, |
480 | dma_addr_t ba) | ||
453 | { | 481 | { |
454 | struct resource *res; | 482 | struct resource *res; |
455 | unsigned long pgp; | 483 | unsigned long pgp; |
@@ -481,60 +509,18 @@ void pci_free_consistent(struct pci_dev *pdev, size_t n, void *p, dma_addr_t ba) | |||
481 | 509 | ||
482 | free_pages(pgp, get_order(n)); | 510 | free_pages(pgp, get_order(n)); |
483 | } | 511 | } |
484 | EXPORT_SYMBOL(pci_free_consistent); | ||
485 | |||
486 | /* Map a single buffer of the indicated size for DMA in streaming mode. | ||
487 | * The 32-bit bus address to use is returned. | ||
488 | * | ||
489 | * Once the device is given the dma address, the device owns this memory | ||
490 | * until either pci_unmap_single or pci_dma_sync_single_* is performed. | ||
491 | */ | ||
492 | dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size, | ||
493 | int direction) | ||
494 | { | ||
495 | BUG_ON(direction == PCI_DMA_NONE); | ||
496 | /* IIep is write-through, not flushing. */ | ||
497 | return virt_to_phys(ptr); | ||
498 | } | ||
499 | EXPORT_SYMBOL(pci_map_single); | ||
500 | |||
501 | /* Unmap a single streaming mode DMA translation. The dma_addr and size | ||
502 | * must match what was provided for in a previous pci_map_single call. All | ||
503 | * other usages are undefined. | ||
504 | * | ||
505 | * After this call, reads by the cpu to the buffer are guaranteed to see | ||
506 | * whatever the device wrote there. | ||
507 | */ | ||
508 | void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t ba, size_t size, | ||
509 | int direction) | ||
510 | { | ||
511 | BUG_ON(direction == PCI_DMA_NONE); | ||
512 | if (direction != PCI_DMA_TODEVICE) { | ||
513 | mmu_inval_dma_area((unsigned long)phys_to_virt(ba), | ||
514 | (size + PAGE_SIZE-1) & PAGE_MASK); | ||
515 | } | ||
516 | } | ||
517 | EXPORT_SYMBOL(pci_unmap_single); | ||
518 | 512 | ||
519 | /* | 513 | /* |
520 | * Same as pci_map_single, but with pages. | 514 | * Same as pci_map_single, but with pages. |
521 | */ | 515 | */ |
522 | dma_addr_t pci_map_page(struct pci_dev *hwdev, struct page *page, | 516 | static dma_addr_t pci32_map_page(struct device *dev, struct page *page, |
523 | unsigned long offset, size_t size, int direction) | 517 | unsigned long offset, size_t size, |
518 | enum dma_data_direction dir, | ||
519 | struct dma_attrs *attrs) | ||
524 | { | 520 | { |
525 | BUG_ON(direction == PCI_DMA_NONE); | ||
526 | /* IIep is write-through, not flushing. */ | 521 | /* IIep is write-through, not flushing. */ |
527 | return page_to_phys(page) + offset; | 522 | return page_to_phys(page) + offset; |
528 | } | 523 | } |
529 | EXPORT_SYMBOL(pci_map_page); | ||
530 | |||
531 | void pci_unmap_page(struct pci_dev *hwdev, | ||
532 | dma_addr_t dma_address, size_t size, int direction) | ||
533 | { | ||
534 | BUG_ON(direction == PCI_DMA_NONE); | ||
535 | /* mmu_inval_dma_area XXX */ | ||
536 | } | ||
537 | EXPORT_SYMBOL(pci_unmap_page); | ||
538 | 524 | ||
539 | /* Map a set of buffers described by scatterlist in streaming | 525 | /* Map a set of buffers described by scatterlist in streaming |
540 | * mode for DMA. This is the scather-gather version of the | 526 | * mode for DMA. This is the scather-gather version of the |
@@ -551,13 +537,13 @@ EXPORT_SYMBOL(pci_unmap_page); | |||
551 | * Device ownership issues as mentioned above for pci_map_single are | 537 | * Device ownership issues as mentioned above for pci_map_single are |
552 | * the same here. | 538 | * the same here. |
553 | */ | 539 | */ |
554 | int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sgl, int nents, | 540 | static int pci32_map_sg(struct device *device, struct scatterlist *sgl, |
555 | int direction) | 541 | int nents, enum dma_data_direction dir, |
542 | struct dma_attrs *attrs) | ||
556 | { | 543 | { |
557 | struct scatterlist *sg; | 544 | struct scatterlist *sg; |
558 | int n; | 545 | int n; |
559 | 546 | ||
560 | BUG_ON(direction == PCI_DMA_NONE); | ||
561 | /* IIep is write-through, not flushing. */ | 547 | /* IIep is write-through, not flushing. */ |
562 | for_each_sg(sgl, sg, nents, n) { | 548 | for_each_sg(sgl, sg, nents, n) { |
563 | BUG_ON(page_address(sg_page(sg)) == NULL); | 549 | BUG_ON(page_address(sg_page(sg)) == NULL); |
@@ -566,20 +552,19 @@ int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sgl, int nents, | |||
566 | } | 552 | } |
567 | return nents; | 553 | return nents; |
568 | } | 554 | } |
569 | EXPORT_SYMBOL(pci_map_sg); | ||
570 | 555 | ||
571 | /* Unmap a set of streaming mode DMA translations. | 556 | /* Unmap a set of streaming mode DMA translations. |
572 | * Again, cpu read rules concerning calls here are the same as for | 557 | * Again, cpu read rules concerning calls here are the same as for |
573 | * pci_unmap_single() above. | 558 | * pci_unmap_single() above. |
574 | */ | 559 | */ |
575 | void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sgl, int nents, | 560 | static void pci32_unmap_sg(struct device *dev, struct scatterlist *sgl, |
576 | int direction) | 561 | int nents, enum dma_data_direction dir, |
562 | struct dma_attrs *attrs) | ||
577 | { | 563 | { |
578 | struct scatterlist *sg; | 564 | struct scatterlist *sg; |
579 | int n; | 565 | int n; |
580 | 566 | ||
581 | BUG_ON(direction == PCI_DMA_NONE); | 567 | if (dir != PCI_DMA_TODEVICE) { |
582 | if (direction != PCI_DMA_TODEVICE) { | ||
583 | for_each_sg(sgl, sg, nents, n) { | 568 | for_each_sg(sgl, sg, nents, n) { |
584 | BUG_ON(page_address(sg_page(sg)) == NULL); | 569 | BUG_ON(page_address(sg_page(sg)) == NULL); |
585 | mmu_inval_dma_area( | 570 | mmu_inval_dma_area( |
@@ -588,7 +573,6 @@ void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sgl, int nents, | |||
588 | } | 573 | } |
589 | } | 574 | } |
590 | } | 575 | } |
591 | EXPORT_SYMBOL(pci_unmap_sg); | ||
592 | 576 | ||
593 | /* Make physical memory consistent for a single | 577 | /* Make physical memory consistent for a single |
594 | * streaming mode DMA translation before or after a transfer. | 578 | * streaming mode DMA translation before or after a transfer. |
@@ -600,25 +584,23 @@ EXPORT_SYMBOL(pci_unmap_sg); | |||
600 | * must first perform a pci_dma_sync_for_device, and then the | 584 | * must first perform a pci_dma_sync_for_device, and then the |
601 | * device again owns the buffer. | 585 | * device again owns the buffer. |
602 | */ | 586 | */ |
603 | void pci_dma_sync_single_for_cpu(struct pci_dev *hwdev, dma_addr_t ba, size_t size, int direction) | 587 | static void pci32_sync_single_for_cpu(struct device *dev, dma_addr_t ba, |
588 | size_t size, enum dma_data_direction dir) | ||
604 | { | 589 | { |
605 | BUG_ON(direction == PCI_DMA_NONE); | 590 | if (dir != PCI_DMA_TODEVICE) { |
606 | if (direction != PCI_DMA_TODEVICE) { | ||
607 | mmu_inval_dma_area((unsigned long)phys_to_virt(ba), | 591 | mmu_inval_dma_area((unsigned long)phys_to_virt(ba), |
608 | (size + PAGE_SIZE-1) & PAGE_MASK); | 592 | (size + PAGE_SIZE-1) & PAGE_MASK); |
609 | } | 593 | } |
610 | } | 594 | } |
611 | EXPORT_SYMBOL(pci_dma_sync_single_for_cpu); | ||
612 | 595 | ||
613 | void pci_dma_sync_single_for_device(struct pci_dev *hwdev, dma_addr_t ba, size_t size, int direction) | 596 | static void pci32_sync_single_for_device(struct device *dev, dma_addr_t ba, |
597 | size_t size, enum dma_data_direction dir) | ||
614 | { | 598 | { |
615 | BUG_ON(direction == PCI_DMA_NONE); | 599 | if (dir != PCI_DMA_TODEVICE) { |
616 | if (direction != PCI_DMA_TODEVICE) { | ||
617 | mmu_inval_dma_area((unsigned long)phys_to_virt(ba), | 600 | mmu_inval_dma_area((unsigned long)phys_to_virt(ba), |
618 | (size + PAGE_SIZE-1) & PAGE_MASK); | 601 | (size + PAGE_SIZE-1) & PAGE_MASK); |
619 | } | 602 | } |
620 | } | 603 | } |
621 | EXPORT_SYMBOL(pci_dma_sync_single_for_device); | ||
622 | 604 | ||
623 | /* Make physical memory consistent for a set of streaming | 605 | /* Make physical memory consistent for a set of streaming |
624 | * mode DMA translations after a transfer. | 606 | * mode DMA translations after a transfer. |
@@ -626,13 +608,13 @@ EXPORT_SYMBOL(pci_dma_sync_single_for_device); | |||
626 | * The same as pci_dma_sync_single_* but for a scatter-gather list, | 608 | * The same as pci_dma_sync_single_* but for a scatter-gather list, |
627 | * same rules and usage. | 609 | * same rules and usage. |
628 | */ | 610 | */ |
629 | void pci_dma_sync_sg_for_cpu(struct pci_dev *hwdev, struct scatterlist *sgl, int nents, int direction) | 611 | static void pci32_sync_sg_for_cpu(struct device *dev, struct scatterlist *sgl, |
612 | int nents, enum dma_data_direction dir) | ||
630 | { | 613 | { |
631 | struct scatterlist *sg; | 614 | struct scatterlist *sg; |
632 | int n; | 615 | int n; |
633 | 616 | ||
634 | BUG_ON(direction == PCI_DMA_NONE); | 617 | if (dir != PCI_DMA_TODEVICE) { |
635 | if (direction != PCI_DMA_TODEVICE) { | ||
636 | for_each_sg(sgl, sg, nents, n) { | 618 | for_each_sg(sgl, sg, nents, n) { |
637 | BUG_ON(page_address(sg_page(sg)) == NULL); | 619 | BUG_ON(page_address(sg_page(sg)) == NULL); |
638 | mmu_inval_dma_area( | 620 | mmu_inval_dma_area( |
@@ -641,15 +623,14 @@ void pci_dma_sync_sg_for_cpu(struct pci_dev *hwdev, struct scatterlist *sgl, int | |||
641 | } | 623 | } |
642 | } | 624 | } |
643 | } | 625 | } |
644 | EXPORT_SYMBOL(pci_dma_sync_sg_for_cpu); | ||
645 | 626 | ||
646 | void pci_dma_sync_sg_for_device(struct pci_dev *hwdev, struct scatterlist *sgl, int nents, int direction) | 627 | static void pci32_sync_sg_for_device(struct device *device, struct scatterlist *sgl, |
628 | int nents, enum dma_data_direction dir) | ||
647 | { | 629 | { |
648 | struct scatterlist *sg; | 630 | struct scatterlist *sg; |
649 | int n; | 631 | int n; |
650 | 632 | ||
651 | BUG_ON(direction == PCI_DMA_NONE); | 633 | if (dir != PCI_DMA_TODEVICE) { |
652 | if (direction != PCI_DMA_TODEVICE) { | ||
653 | for_each_sg(sgl, sg, nents, n) { | 634 | for_each_sg(sgl, sg, nents, n) { |
654 | BUG_ON(page_address(sg_page(sg)) == NULL); | 635 | BUG_ON(page_address(sg_page(sg)) == NULL); |
655 | mmu_inval_dma_area( | 636 | mmu_inval_dma_area( |
@@ -658,31 +639,78 @@ void pci_dma_sync_sg_for_device(struct pci_dev *hwdev, struct scatterlist *sgl, | |||
658 | } | 639 | } |
659 | } | 640 | } |
660 | } | 641 | } |
661 | EXPORT_SYMBOL(pci_dma_sync_sg_for_device); | 642 | |
643 | struct dma_map_ops pci32_dma_ops = { | ||
644 | .alloc_coherent = pci32_alloc_coherent, | ||
645 | .free_coherent = pci32_free_coherent, | ||
646 | .map_page = pci32_map_page, | ||
647 | .map_sg = pci32_map_sg, | ||
648 | .unmap_sg = pci32_unmap_sg, | ||
649 | .sync_single_for_cpu = pci32_sync_single_for_cpu, | ||
650 | .sync_single_for_device = pci32_sync_single_for_device, | ||
651 | .sync_sg_for_cpu = pci32_sync_sg_for_cpu, | ||
652 | .sync_sg_for_device = pci32_sync_sg_for_device, | ||
653 | }; | ||
654 | EXPORT_SYMBOL(pci32_dma_ops); | ||
655 | |||
662 | #endif /* CONFIG_PCI */ | 656 | #endif /* CONFIG_PCI */ |
663 | 657 | ||
658 | /* | ||
659 | * Return whether the given PCI device DMA address mask can be | ||
660 | * supported properly. For example, if your device can only drive the | ||
661 | * low 24-bits during PCI bus mastering, then you would pass | ||
662 | * 0x00ffffff as the mask to this function. | ||
663 | */ | ||
664 | int dma_supported(struct device *dev, u64 mask) | ||
665 | { | ||
666 | #ifdef CONFIG_PCI | ||
667 | if (dev->bus == &pci_bus_type) | ||
668 | return 1; | ||
669 | #endif | ||
670 | return 0; | ||
671 | } | ||
672 | EXPORT_SYMBOL(dma_supported); | ||
673 | |||
674 | int dma_set_mask(struct device *dev, u64 dma_mask) | ||
675 | { | ||
676 | #ifdef CONFIG_PCI | ||
677 | if (dev->bus == &pci_bus_type) | ||
678 | return pci_set_dma_mask(to_pci_dev(dev), dma_mask); | ||
679 | #endif | ||
680 | return -EOPNOTSUPP; | ||
681 | } | ||
682 | EXPORT_SYMBOL(dma_set_mask); | ||
683 | |||
684 | |||
664 | #ifdef CONFIG_PROC_FS | 685 | #ifdef CONFIG_PROC_FS |
665 | 686 | ||
666 | static int | 687 | static int sparc_io_proc_show(struct seq_file *m, void *v) |
667 | _sparc_io_get_info(char *buf, char **start, off_t fpos, int length, int *eof, | ||
668 | void *data) | ||
669 | { | 688 | { |
670 | char *p = buf, *e = buf + length; | 689 | struct resource *root = m->private, *r; |
671 | struct resource *r; | ||
672 | const char *nm; | 690 | const char *nm; |
673 | 691 | ||
674 | for (r = ((struct resource *)data)->child; r != NULL; r = r->sibling) { | 692 | for (r = root->child; r != NULL; r = r->sibling) { |
675 | if (p + 32 >= e) /* Better than nothing */ | ||
676 | break; | ||
677 | if ((nm = r->name) == 0) nm = "???"; | 693 | if ((nm = r->name) == 0) nm = "???"; |
678 | p += sprintf(p, "%016llx-%016llx: %s\n", | 694 | seq_printf(m, "%016llx-%016llx: %s\n", |
679 | (unsigned long long)r->start, | 695 | (unsigned long long)r->start, |
680 | (unsigned long long)r->end, nm); | 696 | (unsigned long long)r->end, nm); |
681 | } | 697 | } |
682 | 698 | ||
683 | return p-buf; | 699 | return 0; |
684 | } | 700 | } |
685 | 701 | ||
702 | static int sparc_io_proc_open(struct inode *inode, struct file *file) | ||
703 | { | ||
704 | return single_open(file, sparc_io_proc_show, PDE(inode)->data); | ||
705 | } | ||
706 | |||
707 | static const struct file_operations sparc_io_proc_fops = { | ||
708 | .owner = THIS_MODULE, | ||
709 | .open = sparc_io_proc_open, | ||
710 | .read = seq_read, | ||
711 | .llseek = seq_lseek, | ||
712 | .release = single_release, | ||
713 | }; | ||
686 | #endif /* CONFIG_PROC_FS */ | 714 | #endif /* CONFIG_PROC_FS */ |
687 | 715 | ||
688 | /* | 716 | /* |
@@ -707,7 +735,7 @@ static struct resource *_sparc_find_resource(struct resource *root, | |||
707 | static void register_proc_sparc_ioport(void) | 735 | static void register_proc_sparc_ioport(void) |
708 | { | 736 | { |
709 | #ifdef CONFIG_PROC_FS | 737 | #ifdef CONFIG_PROC_FS |
710 | create_proc_read_entry("io_map",0,NULL,_sparc_io_get_info,&sparc_iomap); | 738 | proc_create_data("io_map", 0, NULL, &sparc_io_proc_fops, &sparc_iomap); |
711 | create_proc_read_entry("dvma_map",0,NULL,_sparc_io_get_info,&_sparc_dvma); | 739 | proc_create_data("dvma_map", 0, NULL, &sparc_io_proc_fops, &_sparc_dvma); |
712 | #endif | 740 | #endif |
713 | } | 741 | } |
diff --git a/arch/sparc/kernel/irq_32.c b/arch/sparc/kernel/irq_32.c index ad800b80c718..e1af43728329 100644 --- a/arch/sparc/kernel/irq_32.c +++ b/arch/sparc/kernel/irq_32.c | |||
@@ -45,6 +45,7 @@ | |||
45 | #include <asm/pcic.h> | 45 | #include <asm/pcic.h> |
46 | #include <asm/cacheflush.h> | 46 | #include <asm/cacheflush.h> |
47 | #include <asm/irq_regs.h> | 47 | #include <asm/irq_regs.h> |
48 | #include <asm/leon.h> | ||
48 | 49 | ||
49 | #include "kernel.h" | 50 | #include "kernel.h" |
50 | #include "irq.h" | 51 | #include "irq.h" |
@@ -661,6 +662,10 @@ void __init init_IRQ(void) | |||
661 | sun4d_init_IRQ(); | 662 | sun4d_init_IRQ(); |
662 | break; | 663 | break; |
663 | 664 | ||
665 | case sparc_leon: | ||
666 | leon_init_IRQ(); | ||
667 | break; | ||
668 | |||
664 | default: | 669 | default: |
665 | prom_printf("Cannot initialize IRQs on this Sun machine..."); | 670 | prom_printf("Cannot initialize IRQs on this Sun machine..."); |
666 | break; | 671 | break; |
diff --git a/arch/sparc/kernel/leon_kernel.c b/arch/sparc/kernel/leon_kernel.c new file mode 100644 index 000000000000..54d8a5bd4824 --- /dev/null +++ b/arch/sparc/kernel/leon_kernel.c | |||
@@ -0,0 +1,203 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2009 Daniel Hellstrom (daniel@gaisler.com) Aeroflex Gaisler AB | ||
3 | * Copyright (C) 2009 Konrad Eisele (konrad@gaisler.com) Aeroflex Gaisler AB | ||
4 | */ | ||
5 | |||
6 | #include <linux/kernel.h> | ||
7 | #include <linux/module.h> | ||
8 | #include <linux/errno.h> | ||
9 | #include <linux/mutex.h> | ||
10 | #include <linux/slab.h> | ||
11 | #include <linux/of.h> | ||
12 | #include <linux/of_platform.h> | ||
13 | #include <linux/interrupt.h> | ||
14 | #include <linux/of_device.h> | ||
15 | #include <asm/oplib.h> | ||
16 | #include <asm/timer.h> | ||
17 | #include <asm/prom.h> | ||
18 | #include <asm/leon.h> | ||
19 | #include <asm/leon_amba.h> | ||
20 | |||
21 | #include "prom.h" | ||
22 | #include "irq.h" | ||
23 | |||
24 | struct leon3_irqctrl_regs_map *leon3_irqctrl_regs; /* interrupt controller base address, initialized by amba_init() */ | ||
25 | struct leon3_gptimer_regs_map *leon3_gptimer_regs; /* timer controller base address, initialized by amba_init() */ | ||
26 | struct amba_apb_device leon_percpu_timer_dev[16]; | ||
27 | |||
28 | int leondebug_irq_disable; | ||
29 | int leon_debug_irqout; | ||
30 | static int dummy_master_l10_counter; | ||
31 | |||
32 | unsigned long leon3_gptimer_irq; /* interrupt controller irq number, initialized by amba_init() */ | ||
33 | unsigned int sparc_leon_eirq; | ||
34 | #define LEON_IMASK ((&leon3_irqctrl_regs->mask[0])) | ||
35 | |||
36 | /* Return the IRQ of the pending IRQ on the extended IRQ controller */ | ||
37 | int sparc_leon_eirq_get(int eirq, int cpu) | ||
38 | { | ||
39 | return LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs->intid[cpu]) & 0x1f; | ||
40 | } | ||
41 | |||
42 | irqreturn_t sparc_leon_eirq_isr(int dummy, void *dev_id) | ||
43 | { | ||
44 | printk(KERN_ERR "sparc_leon_eirq_isr: ERROR EXTENDED IRQ\n"); | ||
45 | return IRQ_HANDLED; | ||
46 | } | ||
47 | |||
48 | /* The extended IRQ controller has been found, this function registers it */ | ||
49 | void sparc_leon_eirq_register(int eirq) | ||
50 | { | ||
51 | int irq; | ||
52 | |||
53 | /* Register a "BAD" handler for this interrupt, it should never happen */ | ||
54 | irq = request_irq(eirq, sparc_leon_eirq_isr, | ||
55 | (IRQF_DISABLED | SA_STATIC_ALLOC), "extirq", NULL); | ||
56 | |||
57 | if (irq) { | ||
58 | printk(KERN_ERR | ||
59 | "sparc_leon_eirq_register: unable to attach IRQ%d\n", | ||
60 | eirq); | ||
61 | } else { | ||
62 | sparc_leon_eirq = eirq; | ||
63 | } | ||
64 | |||
65 | } | ||
66 | |||
67 | static inline unsigned long get_irqmask(unsigned int irq) | ||
68 | { | ||
69 | unsigned long mask; | ||
70 | |||
71 | if (!irq || ((irq > 0xf) && !sparc_leon_eirq) | ||
72 | || ((irq > 0x1f) && sparc_leon_eirq)) { | ||
73 | printk(KERN_ERR | ||
74 | "leon_get_irqmask: false irq number: %d\n", irq); | ||
75 | mask = 0; | ||
76 | } else { | ||
77 | mask = LEON_HARD_INT(irq); | ||
78 | } | ||
79 | return mask; | ||
80 | } | ||
81 | |||
82 | static void leon_enable_irq(unsigned int irq_nr) | ||
83 | { | ||
84 | unsigned long mask, flags; | ||
85 | mask = get_irqmask(irq_nr); | ||
86 | local_irq_save(flags); | ||
87 | LEON3_BYPASS_STORE_PA(LEON_IMASK, | ||
88 | (LEON3_BYPASS_LOAD_PA(LEON_IMASK) | (mask))); | ||
89 | local_irq_restore(flags); | ||
90 | } | ||
91 | |||
92 | static void leon_disable_irq(unsigned int irq_nr) | ||
93 | { | ||
94 | unsigned long mask, flags; | ||
95 | mask = get_irqmask(irq_nr); | ||
96 | local_irq_save(flags); | ||
97 | LEON3_BYPASS_STORE_PA(LEON_IMASK, | ||
98 | (LEON3_BYPASS_LOAD_PA(LEON_IMASK) & ~(mask))); | ||
99 | local_irq_restore(flags); | ||
100 | |||
101 | } | ||
102 | |||
103 | void __init leon_init_timers(irq_handler_t counter_fn) | ||
104 | { | ||
105 | int irq; | ||
106 | |||
107 | leondebug_irq_disable = 0; | ||
108 | leon_debug_irqout = 0; | ||
109 | master_l10_counter = (unsigned int *)&dummy_master_l10_counter; | ||
110 | dummy_master_l10_counter = 0; | ||
111 | |||
112 | if (leon3_gptimer_regs && leon3_irqctrl_regs) { | ||
113 | LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[0].val, 0); | ||
114 | LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[0].rld, | ||
115 | (((1000000 / 100) - 1))); | ||
116 | LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[0].ctrl, 0); | ||
117 | |||
118 | } else { | ||
119 | printk(KERN_ERR "No Timer/irqctrl found\n"); | ||
120 | BUG(); | ||
121 | } | ||
122 | |||
123 | irq = request_irq(leon3_gptimer_irq, | ||
124 | counter_fn, | ||
125 | (IRQF_DISABLED | SA_STATIC_ALLOC), "timer", NULL); | ||
126 | |||
127 | if (irq) { | ||
128 | printk(KERN_ERR "leon_time_init: unable to attach IRQ%d\n", | ||
129 | LEON_INTERRUPT_TIMER1); | ||
130 | prom_halt(); | ||
131 | } | ||
132 | |||
133 | if (leon3_gptimer_regs) { | ||
134 | LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[0].ctrl, | ||
135 | LEON3_GPTIMER_EN | | ||
136 | LEON3_GPTIMER_RL | | ||
137 | LEON3_GPTIMER_LD | LEON3_GPTIMER_IRQEN); | ||
138 | } | ||
139 | } | ||
140 | |||
141 | void leon_clear_clock_irq(void) | ||
142 | { | ||
143 | } | ||
144 | |||
145 | void leon_load_profile_irq(int cpu, unsigned int limit) | ||
146 | { | ||
147 | BUG(); | ||
148 | } | ||
149 | |||
150 | |||
151 | |||
152 | |||
153 | void __init leon_trans_init(struct device_node *dp) | ||
154 | { | ||
155 | if (strcmp(dp->type, "cpu") == 0 && strcmp(dp->name, "<NULL>") == 0) { | ||
156 | struct property *p; | ||
157 | p = of_find_property(dp, "mid", (void *)0); | ||
158 | if (p) { | ||
159 | int mid; | ||
160 | dp->name = prom_early_alloc(5 + 1); | ||
161 | memcpy(&mid, p->value, p->length); | ||
162 | sprintf((char *)dp->name, "cpu%.2d", mid); | ||
163 | } | ||
164 | } | ||
165 | } | ||
166 | |||
167 | void __initdata (*prom_amba_init)(struct device_node *dp, struct device_node ***nextp) = 0; | ||
168 | |||
169 | void __init leon_node_init(struct device_node *dp, struct device_node ***nextp) | ||
170 | { | ||
171 | if (prom_amba_init && | ||
172 | strcmp(dp->type, "ambapp") == 0 && | ||
173 | strcmp(dp->name, "ambapp0") == 0) { | ||
174 | prom_amba_init(dp, nextp); | ||
175 | } | ||
176 | } | ||
177 | |||
178 | void __init leon_init_IRQ(void) | ||
179 | { | ||
180 | sparc_init_timers = leon_init_timers; | ||
181 | |||
182 | BTFIXUPSET_CALL(enable_irq, leon_enable_irq, BTFIXUPCALL_NORM); | ||
183 | BTFIXUPSET_CALL(disable_irq, leon_disable_irq, BTFIXUPCALL_NORM); | ||
184 | BTFIXUPSET_CALL(enable_pil_irq, leon_enable_irq, BTFIXUPCALL_NORM); | ||
185 | BTFIXUPSET_CALL(disable_pil_irq, leon_disable_irq, BTFIXUPCALL_NORM); | ||
186 | |||
187 | BTFIXUPSET_CALL(clear_clock_irq, leon_clear_clock_irq, | ||
188 | BTFIXUPCALL_NORM); | ||
189 | BTFIXUPSET_CALL(load_profile_irq, leon_load_profile_irq, | ||
190 | BTFIXUPCALL_NOP); | ||
191 | |||
192 | #ifdef CONFIG_SMP | ||
193 | BTFIXUPSET_CALL(set_cpu_int, leon_set_cpu_int, BTFIXUPCALL_NORM); | ||
194 | BTFIXUPSET_CALL(clear_cpu_int, leon_clear_ipi, BTFIXUPCALL_NORM); | ||
195 | BTFIXUPSET_CALL(set_irq_udt, leon_set_udt, BTFIXUPCALL_NORM); | ||
196 | #endif | ||
197 | |||
198 | } | ||
199 | |||
200 | void __init leon_init(void) | ||
201 | { | ||
202 | prom_build_more = &leon_node_init; | ||
203 | } | ||
diff --git a/arch/sparc/kernel/nmi.c b/arch/sparc/kernel/nmi.c index b75bf502cd42..378eb53e0776 100644 --- a/arch/sparc/kernel/nmi.c +++ b/arch/sparc/kernel/nmi.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <linux/delay.h> | 19 | #include <linux/delay.h> |
20 | #include <linux/smp.h> | 20 | #include <linux/smp.h> |
21 | 21 | ||
22 | #include <asm/perf_counter.h> | ||
22 | #include <asm/ptrace.h> | 23 | #include <asm/ptrace.h> |
23 | #include <asm/local.h> | 24 | #include <asm/local.h> |
24 | #include <asm/pcr.h> | 25 | #include <asm/pcr.h> |
@@ -31,13 +32,19 @@ | |||
31 | * level 14 as our IRQ off level. | 32 | * level 14 as our IRQ off level. |
32 | */ | 33 | */ |
33 | 34 | ||
34 | static int nmi_watchdog_active; | ||
35 | static int panic_on_timeout; | 35 | static int panic_on_timeout; |
36 | 36 | ||
37 | int nmi_usable; | 37 | /* nmi_active: |
38 | EXPORT_SYMBOL_GPL(nmi_usable); | 38 | * >0: the NMI watchdog is active, but can be disabled |
39 | * <0: the NMI watchdog has not been set up, and cannot be enabled | ||
40 | * 0: the NMI watchdog is disabled, but can be enabled | ||
41 | */ | ||
42 | atomic_t nmi_active = ATOMIC_INIT(0); /* oprofile uses this */ | ||
43 | EXPORT_SYMBOL(nmi_active); | ||
39 | 44 | ||
40 | static unsigned int nmi_hz = HZ; | 45 | static unsigned int nmi_hz = HZ; |
46 | static DEFINE_PER_CPU(short, wd_enabled); | ||
47 | static int endflag __initdata; | ||
41 | 48 | ||
42 | static DEFINE_PER_CPU(unsigned int, last_irq_sum); | 49 | static DEFINE_PER_CPU(unsigned int, last_irq_sum); |
43 | static DEFINE_PER_CPU(local_t, alert_counter); | 50 | static DEFINE_PER_CPU(local_t, alert_counter); |
@@ -45,7 +52,7 @@ static DEFINE_PER_CPU(int, nmi_touch); | |||
45 | 52 | ||
46 | void touch_nmi_watchdog(void) | 53 | void touch_nmi_watchdog(void) |
47 | { | 54 | { |
48 | if (nmi_watchdog_active) { | 55 | if (atomic_read(&nmi_active)) { |
49 | int cpu; | 56 | int cpu; |
50 | 57 | ||
51 | for_each_present_cpu(cpu) { | 58 | for_each_present_cpu(cpu) { |
@@ -78,6 +85,7 @@ static void die_nmi(const char *str, struct pt_regs *regs, int do_panic) | |||
78 | if (do_panic || panic_on_oops) | 85 | if (do_panic || panic_on_oops) |
79 | panic("Non maskable interrupt"); | 86 | panic("Non maskable interrupt"); |
80 | 87 | ||
88 | nmi_exit(); | ||
81 | local_irq_enable(); | 89 | local_irq_enable(); |
82 | do_exit(SIGBUS); | 90 | do_exit(SIGBUS); |
83 | } | 91 | } |
@@ -92,6 +100,8 @@ notrace __kprobes void perfctr_irq(int irq, struct pt_regs *regs) | |||
92 | 100 | ||
93 | local_cpu_data().__nmi_count++; | 101 | local_cpu_data().__nmi_count++; |
94 | 102 | ||
103 | nmi_enter(); | ||
104 | |||
95 | if (notify_die(DIE_NMI, "nmi", regs, 0, | 105 | if (notify_die(DIE_NMI, "nmi", regs, 0, |
96 | pt_regs_trap_type(regs), SIGINT) == NOTIFY_STOP) | 106 | pt_regs_trap_type(regs), SIGINT) == NOTIFY_STOP) |
97 | touched = 1; | 107 | touched = 1; |
@@ -110,10 +120,12 @@ notrace __kprobes void perfctr_irq(int irq, struct pt_regs *regs) | |||
110 | __get_cpu_var(last_irq_sum) = sum; | 120 | __get_cpu_var(last_irq_sum) = sum; |
111 | local_set(&__get_cpu_var(alert_counter), 0); | 121 | local_set(&__get_cpu_var(alert_counter), 0); |
112 | } | 122 | } |
113 | if (nmi_usable) { | 123 | if (__get_cpu_var(wd_enabled)) { |
114 | write_pic(picl_value(nmi_hz)); | 124 | write_pic(picl_value(nmi_hz)); |
115 | pcr_ops->write(pcr_enable); | 125 | pcr_ops->write(pcr_enable); |
116 | } | 126 | } |
127 | |||
128 | nmi_exit(); | ||
117 | } | 129 | } |
118 | 130 | ||
119 | static inline unsigned int get_nmi_count(int cpu) | 131 | static inline unsigned int get_nmi_count(int cpu) |
@@ -121,8 +133,6 @@ static inline unsigned int get_nmi_count(int cpu) | |||
121 | return cpu_data(cpu).__nmi_count; | 133 | return cpu_data(cpu).__nmi_count; |
122 | } | 134 | } |
123 | 135 | ||
124 | static int endflag __initdata; | ||
125 | |||
126 | static __init void nmi_cpu_busy(void *data) | 136 | static __init void nmi_cpu_busy(void *data) |
127 | { | 137 | { |
128 | local_irq_enable_in_hardirq(); | 138 | local_irq_enable_in_hardirq(); |
@@ -143,12 +153,15 @@ static void report_broken_nmi(int cpu, int *prev_nmi_count) | |||
143 | printk(KERN_WARNING | 153 | printk(KERN_WARNING |
144 | "and attach the output of the 'dmesg' command.\n"); | 154 | "and attach the output of the 'dmesg' command.\n"); |
145 | 155 | ||
146 | nmi_usable = 0; | 156 | per_cpu(wd_enabled, cpu) = 0; |
157 | atomic_dec(&nmi_active); | ||
147 | } | 158 | } |
148 | 159 | ||
149 | static void stop_watchdog(void *unused) | 160 | void stop_nmi_watchdog(void *unused) |
150 | { | 161 | { |
151 | pcr_ops->write(PCR_PIC_PRIV); | 162 | pcr_ops->write(PCR_PIC_PRIV); |
163 | __get_cpu_var(wd_enabled) = 0; | ||
164 | atomic_dec(&nmi_active); | ||
152 | } | 165 | } |
153 | 166 | ||
154 | static int __init check_nmi_watchdog(void) | 167 | static int __init check_nmi_watchdog(void) |
@@ -156,6 +169,9 @@ static int __init check_nmi_watchdog(void) | |||
156 | unsigned int *prev_nmi_count; | 169 | unsigned int *prev_nmi_count; |
157 | int cpu, err; | 170 | int cpu, err; |
158 | 171 | ||
172 | if (!atomic_read(&nmi_active)) | ||
173 | return 0; | ||
174 | |||
159 | prev_nmi_count = kmalloc(nr_cpu_ids * sizeof(unsigned int), GFP_KERNEL); | 175 | prev_nmi_count = kmalloc(nr_cpu_ids * sizeof(unsigned int), GFP_KERNEL); |
160 | if (!prev_nmi_count) { | 176 | if (!prev_nmi_count) { |
161 | err = -ENOMEM; | 177 | err = -ENOMEM; |
@@ -172,12 +188,15 @@ static int __init check_nmi_watchdog(void) | |||
172 | mdelay((20 * 1000) / nmi_hz); /* wait 20 ticks */ | 188 | mdelay((20 * 1000) / nmi_hz); /* wait 20 ticks */ |
173 | 189 | ||
174 | for_each_online_cpu(cpu) { | 190 | for_each_online_cpu(cpu) { |
191 | if (!per_cpu(wd_enabled, cpu)) | ||
192 | continue; | ||
175 | if (get_nmi_count(cpu) - prev_nmi_count[cpu] <= 5) | 193 | if (get_nmi_count(cpu) - prev_nmi_count[cpu] <= 5) |
176 | report_broken_nmi(cpu, prev_nmi_count); | 194 | report_broken_nmi(cpu, prev_nmi_count); |
177 | } | 195 | } |
178 | endflag = 1; | 196 | endflag = 1; |
179 | if (!nmi_usable) { | 197 | if (!atomic_read(&nmi_active)) { |
180 | kfree(prev_nmi_count); | 198 | kfree(prev_nmi_count); |
199 | atomic_set(&nmi_active, -1); | ||
181 | err = -ENODEV; | 200 | err = -ENODEV; |
182 | goto error; | 201 | goto error; |
183 | } | 202 | } |
@@ -188,12 +207,26 @@ static int __init check_nmi_watchdog(void) | |||
188 | kfree(prev_nmi_count); | 207 | kfree(prev_nmi_count); |
189 | return 0; | 208 | return 0; |
190 | error: | 209 | error: |
191 | on_each_cpu(stop_watchdog, NULL, 1); | 210 | on_each_cpu(stop_nmi_watchdog, NULL, 1); |
192 | return err; | 211 | return err; |
193 | } | 212 | } |
194 | 213 | ||
195 | static void start_watchdog(void *unused) | 214 | void start_nmi_watchdog(void *unused) |
196 | { | 215 | { |
216 | __get_cpu_var(wd_enabled) = 1; | ||
217 | atomic_inc(&nmi_active); | ||
218 | |||
219 | pcr_ops->write(PCR_PIC_PRIV); | ||
220 | write_pic(picl_value(nmi_hz)); | ||
221 | |||
222 | pcr_ops->write(pcr_enable); | ||
223 | } | ||
224 | |||
225 | static void nmi_adjust_hz_one(void *unused) | ||
226 | { | ||
227 | if (!__get_cpu_var(wd_enabled)) | ||
228 | return; | ||
229 | |||
197 | pcr_ops->write(PCR_PIC_PRIV); | 230 | pcr_ops->write(PCR_PIC_PRIV); |
198 | write_pic(picl_value(nmi_hz)); | 231 | write_pic(picl_value(nmi_hz)); |
199 | 232 | ||
@@ -203,13 +236,13 @@ static void start_watchdog(void *unused) | |||
203 | void nmi_adjust_hz(unsigned int new_hz) | 236 | void nmi_adjust_hz(unsigned int new_hz) |
204 | { | 237 | { |
205 | nmi_hz = new_hz; | 238 | nmi_hz = new_hz; |
206 | on_each_cpu(start_watchdog, NULL, 1); | 239 | on_each_cpu(nmi_adjust_hz_one, NULL, 1); |
207 | } | 240 | } |
208 | EXPORT_SYMBOL_GPL(nmi_adjust_hz); | 241 | EXPORT_SYMBOL_GPL(nmi_adjust_hz); |
209 | 242 | ||
210 | static int nmi_shutdown(struct notifier_block *nb, unsigned long cmd, void *p) | 243 | static int nmi_shutdown(struct notifier_block *nb, unsigned long cmd, void *p) |
211 | { | 244 | { |
212 | on_each_cpu(stop_watchdog, NULL, 1); | 245 | on_each_cpu(stop_nmi_watchdog, NULL, 1); |
213 | return 0; | 246 | return 0; |
214 | } | 247 | } |
215 | 248 | ||
@@ -221,18 +254,19 @@ int __init nmi_init(void) | |||
221 | { | 254 | { |
222 | int err; | 255 | int err; |
223 | 256 | ||
224 | nmi_usable = 1; | 257 | on_each_cpu(start_nmi_watchdog, NULL, 1); |
225 | |||
226 | on_each_cpu(start_watchdog, NULL, 1); | ||
227 | 258 | ||
228 | err = check_nmi_watchdog(); | 259 | err = check_nmi_watchdog(); |
229 | if (!err) { | 260 | if (!err) { |
230 | err = register_reboot_notifier(&nmi_reboot_notifier); | 261 | err = register_reboot_notifier(&nmi_reboot_notifier); |
231 | if (err) { | 262 | if (err) { |
232 | nmi_usable = 0; | 263 | on_each_cpu(stop_nmi_watchdog, NULL, 1); |
233 | on_each_cpu(stop_watchdog, NULL, 1); | 264 | atomic_set(&nmi_active, -1); |
234 | } | 265 | } |
235 | } | 266 | } |
267 | if (!err) | ||
268 | init_hw_perf_counters(); | ||
269 | |||
236 | return err; | 270 | return err; |
237 | } | 271 | } |
238 | 272 | ||
diff --git a/arch/sparc/kernel/of_device_32.c b/arch/sparc/kernel/of_device_32.c index 90396702ea2c..4c26eb59e742 100644 --- a/arch/sparc/kernel/of_device_32.c +++ b/arch/sparc/kernel/of_device_32.c | |||
@@ -9,6 +9,8 @@ | |||
9 | #include <linux/irq.h> | 9 | #include <linux/irq.h> |
10 | #include <linux/of_device.h> | 10 | #include <linux/of_device.h> |
11 | #include <linux/of_platform.h> | 11 | #include <linux/of_platform.h> |
12 | #include <asm/leon.h> | ||
13 | #include <asm/leon_amba.h> | ||
12 | 14 | ||
13 | #include "of_device_common.h" | 15 | #include "of_device_common.h" |
14 | 16 | ||
@@ -97,6 +99,35 @@ static unsigned long of_bus_sbus_get_flags(const u32 *addr, unsigned long flags) | |||
97 | return IORESOURCE_MEM; | 99 | return IORESOURCE_MEM; |
98 | } | 100 | } |
99 | 101 | ||
102 | /* | ||
103 | * AMBAPP bus specific translator | ||
104 | */ | ||
105 | |||
106 | static int of_bus_ambapp_match(struct device_node *np) | ||
107 | { | ||
108 | return !strcmp(np->name, "ambapp"); | ||
109 | } | ||
110 | |||
111 | static void of_bus_ambapp_count_cells(struct device_node *child, | ||
112 | int *addrc, int *sizec) | ||
113 | { | ||
114 | if (addrc) | ||
115 | *addrc = 1; | ||
116 | if (sizec) | ||
117 | *sizec = 1; | ||
118 | } | ||
119 | |||
120 | static int of_bus_ambapp_map(u32 *addr, const u32 *range, | ||
121 | int na, int ns, int pna) | ||
122 | { | ||
123 | return of_bus_default_map(addr, range, na, ns, pna); | ||
124 | } | ||
125 | |||
126 | static unsigned long of_bus_ambapp_get_flags(const u32 *addr, | ||
127 | unsigned long flags) | ||
128 | { | ||
129 | return IORESOURCE_MEM; | ||
130 | } | ||
100 | 131 | ||
101 | /* | 132 | /* |
102 | * Array of bus specific translators | 133 | * Array of bus specific translators |
@@ -121,6 +152,15 @@ static struct of_bus of_busses[] = { | |||
121 | .map = of_bus_default_map, | 152 | .map = of_bus_default_map, |
122 | .get_flags = of_bus_sbus_get_flags, | 153 | .get_flags = of_bus_sbus_get_flags, |
123 | }, | 154 | }, |
155 | /* AMBA */ | ||
156 | { | ||
157 | .name = "ambapp", | ||
158 | .addr_prop_name = "reg", | ||
159 | .match = of_bus_ambapp_match, | ||
160 | .count_cells = of_bus_ambapp_count_cells, | ||
161 | .map = of_bus_ambapp_map, | ||
162 | .get_flags = of_bus_ambapp_get_flags, | ||
163 | }, | ||
124 | /* Default */ | 164 | /* Default */ |
125 | { | 165 | { |
126 | .name = "default", | 166 | .name = "default", |
diff --git a/arch/sparc/kernel/pci.c b/arch/sparc/kernel/pci.c index 57859ad23547..c68648662802 100644 --- a/arch/sparc/kernel/pci.c +++ b/arch/sparc/kernel/pci.c | |||
@@ -1039,7 +1039,7 @@ static void ali_sound_dma_hack(struct pci_dev *pdev, int set_bit) | |||
1039 | pci_dev_put(ali_isa_bridge); | 1039 | pci_dev_put(ali_isa_bridge); |
1040 | } | 1040 | } |
1041 | 1041 | ||
1042 | int pci_dma_supported(struct pci_dev *pdev, u64 device_mask) | 1042 | int pci64_dma_supported(struct pci_dev *pdev, u64 device_mask) |
1043 | { | 1043 | { |
1044 | u64 dma_addr_mask; | 1044 | u64 dma_addr_mask; |
1045 | 1045 | ||
diff --git a/arch/sparc/kernel/pci_sun4v.c b/arch/sparc/kernel/pci_sun4v.c index 2485eaa23101..23c33ff9c31e 100644 --- a/arch/sparc/kernel/pci_sun4v.c +++ b/arch/sparc/kernel/pci_sun4v.c | |||
@@ -232,7 +232,8 @@ static void dma_4v_free_coherent(struct device *dev, size_t size, void *cpu, | |||
232 | 232 | ||
233 | static dma_addr_t dma_4v_map_page(struct device *dev, struct page *page, | 233 | static dma_addr_t dma_4v_map_page(struct device *dev, struct page *page, |
234 | unsigned long offset, size_t sz, | 234 | unsigned long offset, size_t sz, |
235 | enum dma_data_direction direction) | 235 | enum dma_data_direction direction, |
236 | struct dma_attrs *attrs) | ||
236 | { | 237 | { |
237 | struct iommu *iommu; | 238 | struct iommu *iommu; |
238 | unsigned long flags, npages, oaddr; | 239 | unsigned long flags, npages, oaddr; |
@@ -296,7 +297,8 @@ iommu_map_fail: | |||
296 | } | 297 | } |
297 | 298 | ||
298 | static void dma_4v_unmap_page(struct device *dev, dma_addr_t bus_addr, | 299 | static void dma_4v_unmap_page(struct device *dev, dma_addr_t bus_addr, |
299 | size_t sz, enum dma_data_direction direction) | 300 | size_t sz, enum dma_data_direction direction, |
301 | struct dma_attrs *attrs) | ||
300 | { | 302 | { |
301 | struct pci_pbm_info *pbm; | 303 | struct pci_pbm_info *pbm; |
302 | struct iommu *iommu; | 304 | struct iommu *iommu; |
@@ -336,7 +338,8 @@ static void dma_4v_unmap_page(struct device *dev, dma_addr_t bus_addr, | |||
336 | } | 338 | } |
337 | 339 | ||
338 | static int dma_4v_map_sg(struct device *dev, struct scatterlist *sglist, | 340 | static int dma_4v_map_sg(struct device *dev, struct scatterlist *sglist, |
339 | int nelems, enum dma_data_direction direction) | 341 | int nelems, enum dma_data_direction direction, |
342 | struct dma_attrs *attrs) | ||
340 | { | 343 | { |
341 | struct scatterlist *s, *outs, *segstart; | 344 | struct scatterlist *s, *outs, *segstart; |
342 | unsigned long flags, handle, prot; | 345 | unsigned long flags, handle, prot; |
@@ -478,7 +481,8 @@ iommu_map_failed: | |||
478 | } | 481 | } |
479 | 482 | ||
480 | static void dma_4v_unmap_sg(struct device *dev, struct scatterlist *sglist, | 483 | static void dma_4v_unmap_sg(struct device *dev, struct scatterlist *sglist, |
481 | int nelems, enum dma_data_direction direction) | 484 | int nelems, enum dma_data_direction direction, |
485 | struct dma_attrs *attrs) | ||
482 | { | 486 | { |
483 | struct pci_pbm_info *pbm; | 487 | struct pci_pbm_info *pbm; |
484 | struct scatterlist *sg; | 488 | struct scatterlist *sg; |
@@ -521,29 +525,13 @@ static void dma_4v_unmap_sg(struct device *dev, struct scatterlist *sglist, | |||
521 | spin_unlock_irqrestore(&iommu->lock, flags); | 525 | spin_unlock_irqrestore(&iommu->lock, flags); |
522 | } | 526 | } |
523 | 527 | ||
524 | static void dma_4v_sync_single_for_cpu(struct device *dev, | 528 | static struct dma_map_ops sun4v_dma_ops = { |
525 | dma_addr_t bus_addr, size_t sz, | ||
526 | enum dma_data_direction direction) | ||
527 | { | ||
528 | /* Nothing to do... */ | ||
529 | } | ||
530 | |||
531 | static void dma_4v_sync_sg_for_cpu(struct device *dev, | ||
532 | struct scatterlist *sglist, int nelems, | ||
533 | enum dma_data_direction direction) | ||
534 | { | ||
535 | /* Nothing to do... */ | ||
536 | } | ||
537 | |||
538 | static const struct dma_ops sun4v_dma_ops = { | ||
539 | .alloc_coherent = dma_4v_alloc_coherent, | 529 | .alloc_coherent = dma_4v_alloc_coherent, |
540 | .free_coherent = dma_4v_free_coherent, | 530 | .free_coherent = dma_4v_free_coherent, |
541 | .map_page = dma_4v_map_page, | 531 | .map_page = dma_4v_map_page, |
542 | .unmap_page = dma_4v_unmap_page, | 532 | .unmap_page = dma_4v_unmap_page, |
543 | .map_sg = dma_4v_map_sg, | 533 | .map_sg = dma_4v_map_sg, |
544 | .unmap_sg = dma_4v_unmap_sg, | 534 | .unmap_sg = dma_4v_unmap_sg, |
545 | .sync_single_for_cpu = dma_4v_sync_single_for_cpu, | ||
546 | .sync_sg_for_cpu = dma_4v_sync_sg_for_cpu, | ||
547 | }; | 535 | }; |
548 | 536 | ||
549 | static void __devinit pci_sun4v_scan_bus(struct pci_pbm_info *pbm, | 537 | static void __devinit pci_sun4v_scan_bus(struct pci_pbm_info *pbm, |
diff --git a/arch/sparc/kernel/pcr.c b/arch/sparc/kernel/pcr.c index 1ae8cdd7e703..68ff00107073 100644 --- a/arch/sparc/kernel/pcr.c +++ b/arch/sparc/kernel/pcr.c | |||
@@ -7,6 +7,8 @@ | |||
7 | #include <linux/init.h> | 7 | #include <linux/init.h> |
8 | #include <linux/irq.h> | 8 | #include <linux/irq.h> |
9 | 9 | ||
10 | #include <linux/perf_counter.h> | ||
11 | |||
10 | #include <asm/pil.h> | 12 | #include <asm/pil.h> |
11 | #include <asm/pcr.h> | 13 | #include <asm/pcr.h> |
12 | #include <asm/nmi.h> | 14 | #include <asm/nmi.h> |
@@ -34,10 +36,20 @@ unsigned int picl_shift; | |||
34 | */ | 36 | */ |
35 | void deferred_pcr_work_irq(int irq, struct pt_regs *regs) | 37 | void deferred_pcr_work_irq(int irq, struct pt_regs *regs) |
36 | { | 38 | { |
39 | struct pt_regs *old_regs; | ||
40 | |||
37 | clear_softint(1 << PIL_DEFERRED_PCR_WORK); | 41 | clear_softint(1 << PIL_DEFERRED_PCR_WORK); |
42 | |||
43 | old_regs = set_irq_regs(regs); | ||
44 | irq_enter(); | ||
45 | #ifdef CONFIG_PERF_COUNTERS | ||
46 | perf_counter_do_pending(); | ||
47 | #endif | ||
48 | irq_exit(); | ||
49 | set_irq_regs(old_regs); | ||
38 | } | 50 | } |
39 | 51 | ||
40 | void schedule_deferred_pcr_work(void) | 52 | void set_perf_counter_pending(void) |
41 | { | 53 | { |
42 | set_softint(1 << PIL_DEFERRED_PCR_WORK); | 54 | set_softint(1 << PIL_DEFERRED_PCR_WORK); |
43 | } | 55 | } |
diff --git a/arch/sparc/kernel/perf_counter.c b/arch/sparc/kernel/perf_counter.c new file mode 100644 index 000000000000..09de4035eaa9 --- /dev/null +++ b/arch/sparc/kernel/perf_counter.c | |||
@@ -0,0 +1,557 @@ | |||
1 | /* Performance counter support for sparc64. | ||
2 | * | ||
3 | * Copyright (C) 2009 David S. Miller <davem@davemloft.net> | ||
4 | * | ||
5 | * This code is based almost entirely upon the x86 perf counter | ||
6 | * code, which is: | ||
7 | * | ||
8 | * Copyright (C) 2008 Thomas Gleixner <tglx@linutronix.de> | ||
9 | * Copyright (C) 2008-2009 Red Hat, Inc., Ingo Molnar | ||
10 | * Copyright (C) 2009 Jaswinder Singh Rajput | ||
11 | * Copyright (C) 2009 Advanced Micro Devices, Inc., Robert Richter | ||
12 | * Copyright (C) 2008-2009 Red Hat, Inc., Peter Zijlstra <pzijlstr@redhat.com> | ||
13 | */ | ||
14 | |||
15 | #include <linux/perf_counter.h> | ||
16 | #include <linux/kprobes.h> | ||
17 | #include <linux/kernel.h> | ||
18 | #include <linux/kdebug.h> | ||
19 | #include <linux/mutex.h> | ||
20 | |||
21 | #include <asm/cpudata.h> | ||
22 | #include <asm/atomic.h> | ||
23 | #include <asm/nmi.h> | ||
24 | #include <asm/pcr.h> | ||
25 | |||
26 | /* Sparc64 chips have two performance counters, 32-bits each, with | ||
27 | * overflow interrupts generated on transition from 0xffffffff to 0. | ||
28 | * The counters are accessed in one go using a 64-bit register. | ||
29 | * | ||
30 | * Both counters are controlled using a single control register. The | ||
31 | * only way to stop all sampling is to clear all of the context (user, | ||
32 | * supervisor, hypervisor) sampling enable bits. But these bits apply | ||
33 | * to both counters, thus the two counters can't be enabled/disabled | ||
34 | * individually. | ||
35 | * | ||
36 | * The control register has two event fields, one for each of the two | ||
37 | * counters. It's thus nearly impossible to have one counter going | ||
38 | * while keeping the other one stopped. Therefore it is possible to | ||
39 | * get overflow interrupts for counters not currently "in use" and | ||
40 | * that condition must be checked in the overflow interrupt handler. | ||
41 | * | ||
42 | * So we use a hack, in that we program inactive counters with the | ||
43 | * "sw_count0" and "sw_count1" events. These count how many times | ||
44 | * the instruction "sethi %hi(0xfc000), %g0" is executed. It's an | ||
45 | * unusual way to encode a NOP and therefore will not trigger in | ||
46 | * normal code. | ||
47 | */ | ||
48 | |||
49 | #define MAX_HWCOUNTERS 2 | ||
50 | #define MAX_PERIOD ((1UL << 32) - 1) | ||
51 | |||
52 | #define PIC_UPPER_INDEX 0 | ||
53 | #define PIC_LOWER_INDEX 1 | ||
54 | |||
55 | struct cpu_hw_counters { | ||
56 | struct perf_counter *counters[MAX_HWCOUNTERS]; | ||
57 | unsigned long used_mask[BITS_TO_LONGS(MAX_HWCOUNTERS)]; | ||
58 | unsigned long active_mask[BITS_TO_LONGS(MAX_HWCOUNTERS)]; | ||
59 | int enabled; | ||
60 | }; | ||
61 | DEFINE_PER_CPU(struct cpu_hw_counters, cpu_hw_counters) = { .enabled = 1, }; | ||
62 | |||
63 | struct perf_event_map { | ||
64 | u16 encoding; | ||
65 | u8 pic_mask; | ||
66 | #define PIC_NONE 0x00 | ||
67 | #define PIC_UPPER 0x01 | ||
68 | #define PIC_LOWER 0x02 | ||
69 | }; | ||
70 | |||
71 | struct sparc_pmu { | ||
72 | const struct perf_event_map *(*event_map)(int); | ||
73 | int max_events; | ||
74 | int upper_shift; | ||
75 | int lower_shift; | ||
76 | int event_mask; | ||
77 | int hv_bit; | ||
78 | int irq_bit; | ||
79 | int upper_nop; | ||
80 | int lower_nop; | ||
81 | }; | ||
82 | |||
83 | static const struct perf_event_map ultra3i_perfmon_event_map[] = { | ||
84 | [PERF_COUNT_HW_CPU_CYCLES] = { 0x0000, PIC_UPPER | PIC_LOWER }, | ||
85 | [PERF_COUNT_HW_INSTRUCTIONS] = { 0x0001, PIC_UPPER | PIC_LOWER }, | ||
86 | [PERF_COUNT_HW_CACHE_REFERENCES] = { 0x0009, PIC_LOWER }, | ||
87 | [PERF_COUNT_HW_CACHE_MISSES] = { 0x0009, PIC_UPPER }, | ||
88 | }; | ||
89 | |||
90 | static const struct perf_event_map *ultra3i_event_map(int event) | ||
91 | { | ||
92 | return &ultra3i_perfmon_event_map[event]; | ||
93 | } | ||
94 | |||
95 | static const struct sparc_pmu ultra3i_pmu = { | ||
96 | .event_map = ultra3i_event_map, | ||
97 | .max_events = ARRAY_SIZE(ultra3i_perfmon_event_map), | ||
98 | .upper_shift = 11, | ||
99 | .lower_shift = 4, | ||
100 | .event_mask = 0x3f, | ||
101 | .upper_nop = 0x1c, | ||
102 | .lower_nop = 0x14, | ||
103 | }; | ||
104 | |||
105 | static const struct perf_event_map niagara2_perfmon_event_map[] = { | ||
106 | [PERF_COUNT_HW_CPU_CYCLES] = { 0x02ff, PIC_UPPER | PIC_LOWER }, | ||
107 | [PERF_COUNT_HW_INSTRUCTIONS] = { 0x02ff, PIC_UPPER | PIC_LOWER }, | ||
108 | [PERF_COUNT_HW_CACHE_REFERENCES] = { 0x0208, PIC_UPPER | PIC_LOWER }, | ||
109 | [PERF_COUNT_HW_CACHE_MISSES] = { 0x0302, PIC_UPPER | PIC_LOWER }, | ||
110 | [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = { 0x0201, PIC_UPPER | PIC_LOWER }, | ||
111 | [PERF_COUNT_HW_BRANCH_MISSES] = { 0x0202, PIC_UPPER | PIC_LOWER }, | ||
112 | }; | ||
113 | |||
114 | static const struct perf_event_map *niagara2_event_map(int event) | ||
115 | { | ||
116 | return &niagara2_perfmon_event_map[event]; | ||
117 | } | ||
118 | |||
119 | static const struct sparc_pmu niagara2_pmu = { | ||
120 | .event_map = niagara2_event_map, | ||
121 | .max_events = ARRAY_SIZE(niagara2_perfmon_event_map), | ||
122 | .upper_shift = 19, | ||
123 | .lower_shift = 6, | ||
124 | .event_mask = 0xfff, | ||
125 | .hv_bit = 0x8, | ||
126 | .irq_bit = 0x03, | ||
127 | .upper_nop = 0x220, | ||
128 | .lower_nop = 0x220, | ||
129 | }; | ||
130 | |||
131 | static const struct sparc_pmu *sparc_pmu __read_mostly; | ||
132 | |||
133 | static u64 event_encoding(u64 event, int idx) | ||
134 | { | ||
135 | if (idx == PIC_UPPER_INDEX) | ||
136 | event <<= sparc_pmu->upper_shift; | ||
137 | else | ||
138 | event <<= sparc_pmu->lower_shift; | ||
139 | return event; | ||
140 | } | ||
141 | |||
142 | static u64 mask_for_index(int idx) | ||
143 | { | ||
144 | return event_encoding(sparc_pmu->event_mask, idx); | ||
145 | } | ||
146 | |||
147 | static u64 nop_for_index(int idx) | ||
148 | { | ||
149 | return event_encoding(idx == PIC_UPPER_INDEX ? | ||
150 | sparc_pmu->upper_nop : | ||
151 | sparc_pmu->lower_nop, idx); | ||
152 | } | ||
153 | |||
154 | static inline void sparc_pmu_enable_counter(struct hw_perf_counter *hwc, | ||
155 | int idx) | ||
156 | { | ||
157 | u64 val, mask = mask_for_index(idx); | ||
158 | |||
159 | val = pcr_ops->read(); | ||
160 | pcr_ops->write((val & ~mask) | hwc->config); | ||
161 | } | ||
162 | |||
163 | static inline void sparc_pmu_disable_counter(struct hw_perf_counter *hwc, | ||
164 | int idx) | ||
165 | { | ||
166 | u64 mask = mask_for_index(idx); | ||
167 | u64 nop = nop_for_index(idx); | ||
168 | u64 val = pcr_ops->read(); | ||
169 | |||
170 | pcr_ops->write((val & ~mask) | nop); | ||
171 | } | ||
172 | |||
173 | void hw_perf_enable(void) | ||
174 | { | ||
175 | struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters); | ||
176 | u64 val; | ||
177 | int i; | ||
178 | |||
179 | if (cpuc->enabled) | ||
180 | return; | ||
181 | |||
182 | cpuc->enabled = 1; | ||
183 | barrier(); | ||
184 | |||
185 | val = pcr_ops->read(); | ||
186 | |||
187 | for (i = 0; i < MAX_HWCOUNTERS; i++) { | ||
188 | struct perf_counter *cp = cpuc->counters[i]; | ||
189 | struct hw_perf_counter *hwc; | ||
190 | |||
191 | if (!cp) | ||
192 | continue; | ||
193 | hwc = &cp->hw; | ||
194 | val |= hwc->config_base; | ||
195 | } | ||
196 | |||
197 | pcr_ops->write(val); | ||
198 | } | ||
199 | |||
200 | void hw_perf_disable(void) | ||
201 | { | ||
202 | struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters); | ||
203 | u64 val; | ||
204 | |||
205 | if (!cpuc->enabled) | ||
206 | return; | ||
207 | |||
208 | cpuc->enabled = 0; | ||
209 | |||
210 | val = pcr_ops->read(); | ||
211 | val &= ~(PCR_UTRACE | PCR_STRACE | | ||
212 | sparc_pmu->hv_bit | sparc_pmu->irq_bit); | ||
213 | pcr_ops->write(val); | ||
214 | } | ||
215 | |||
216 | static u32 read_pmc(int idx) | ||
217 | { | ||
218 | u64 val; | ||
219 | |||
220 | read_pic(val); | ||
221 | if (idx == PIC_UPPER_INDEX) | ||
222 | val >>= 32; | ||
223 | |||
224 | return val & 0xffffffff; | ||
225 | } | ||
226 | |||
227 | static void write_pmc(int idx, u64 val) | ||
228 | { | ||
229 | u64 shift, mask, pic; | ||
230 | |||
231 | shift = 0; | ||
232 | if (idx == PIC_UPPER_INDEX) | ||
233 | shift = 32; | ||
234 | |||
235 | mask = ((u64) 0xffffffff) << shift; | ||
236 | val <<= shift; | ||
237 | |||
238 | read_pic(pic); | ||
239 | pic &= ~mask; | ||
240 | pic |= val; | ||
241 | write_pic(pic); | ||
242 | } | ||
243 | |||
244 | static int sparc_perf_counter_set_period(struct perf_counter *counter, | ||
245 | struct hw_perf_counter *hwc, int idx) | ||
246 | { | ||
247 | s64 left = atomic64_read(&hwc->period_left); | ||
248 | s64 period = hwc->sample_period; | ||
249 | int ret = 0; | ||
250 | |||
251 | if (unlikely(left <= -period)) { | ||
252 | left = period; | ||
253 | atomic64_set(&hwc->period_left, left); | ||
254 | hwc->last_period = period; | ||
255 | ret = 1; | ||
256 | } | ||
257 | |||
258 | if (unlikely(left <= 0)) { | ||
259 | left += period; | ||
260 | atomic64_set(&hwc->period_left, left); | ||
261 | hwc->last_period = period; | ||
262 | ret = 1; | ||
263 | } | ||
264 | if (left > MAX_PERIOD) | ||
265 | left = MAX_PERIOD; | ||
266 | |||
267 | atomic64_set(&hwc->prev_count, (u64)-left); | ||
268 | |||
269 | write_pmc(idx, (u64)(-left) & 0xffffffff); | ||
270 | |||
271 | perf_counter_update_userpage(counter); | ||
272 | |||
273 | return ret; | ||
274 | } | ||
275 | |||
276 | static int sparc_pmu_enable(struct perf_counter *counter) | ||
277 | { | ||
278 | struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters); | ||
279 | struct hw_perf_counter *hwc = &counter->hw; | ||
280 | int idx = hwc->idx; | ||
281 | |||
282 | if (test_and_set_bit(idx, cpuc->used_mask)) | ||
283 | return -EAGAIN; | ||
284 | |||
285 | sparc_pmu_disable_counter(hwc, idx); | ||
286 | |||
287 | cpuc->counters[idx] = counter; | ||
288 | set_bit(idx, cpuc->active_mask); | ||
289 | |||
290 | sparc_perf_counter_set_period(counter, hwc, idx); | ||
291 | sparc_pmu_enable_counter(hwc, idx); | ||
292 | perf_counter_update_userpage(counter); | ||
293 | return 0; | ||
294 | } | ||
295 | |||
296 | static u64 sparc_perf_counter_update(struct perf_counter *counter, | ||
297 | struct hw_perf_counter *hwc, int idx) | ||
298 | { | ||
299 | int shift = 64 - 32; | ||
300 | u64 prev_raw_count, new_raw_count; | ||
301 | s64 delta; | ||
302 | |||
303 | again: | ||
304 | prev_raw_count = atomic64_read(&hwc->prev_count); | ||
305 | new_raw_count = read_pmc(idx); | ||
306 | |||
307 | if (atomic64_cmpxchg(&hwc->prev_count, prev_raw_count, | ||
308 | new_raw_count) != prev_raw_count) | ||
309 | goto again; | ||
310 | |||
311 | delta = (new_raw_count << shift) - (prev_raw_count << shift); | ||
312 | delta >>= shift; | ||
313 | |||
314 | atomic64_add(delta, &counter->count); | ||
315 | atomic64_sub(delta, &hwc->period_left); | ||
316 | |||
317 | return new_raw_count; | ||
318 | } | ||
319 | |||
320 | static void sparc_pmu_disable(struct perf_counter *counter) | ||
321 | { | ||
322 | struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters); | ||
323 | struct hw_perf_counter *hwc = &counter->hw; | ||
324 | int idx = hwc->idx; | ||
325 | |||
326 | clear_bit(idx, cpuc->active_mask); | ||
327 | sparc_pmu_disable_counter(hwc, idx); | ||
328 | |||
329 | barrier(); | ||
330 | |||
331 | sparc_perf_counter_update(counter, hwc, idx); | ||
332 | cpuc->counters[idx] = NULL; | ||
333 | clear_bit(idx, cpuc->used_mask); | ||
334 | |||
335 | perf_counter_update_userpage(counter); | ||
336 | } | ||
337 | |||
338 | static void sparc_pmu_read(struct perf_counter *counter) | ||
339 | { | ||
340 | struct hw_perf_counter *hwc = &counter->hw; | ||
341 | sparc_perf_counter_update(counter, hwc, hwc->idx); | ||
342 | } | ||
343 | |||
344 | static void sparc_pmu_unthrottle(struct perf_counter *counter) | ||
345 | { | ||
346 | struct hw_perf_counter *hwc = &counter->hw; | ||
347 | sparc_pmu_enable_counter(hwc, hwc->idx); | ||
348 | } | ||
349 | |||
350 | static atomic_t active_counters = ATOMIC_INIT(0); | ||
351 | static DEFINE_MUTEX(pmc_grab_mutex); | ||
352 | |||
353 | void perf_counter_grab_pmc(void) | ||
354 | { | ||
355 | if (atomic_inc_not_zero(&active_counters)) | ||
356 | return; | ||
357 | |||
358 | mutex_lock(&pmc_grab_mutex); | ||
359 | if (atomic_read(&active_counters) == 0) { | ||
360 | if (atomic_read(&nmi_active) > 0) { | ||
361 | on_each_cpu(stop_nmi_watchdog, NULL, 1); | ||
362 | BUG_ON(atomic_read(&nmi_active) != 0); | ||
363 | } | ||
364 | atomic_inc(&active_counters); | ||
365 | } | ||
366 | mutex_unlock(&pmc_grab_mutex); | ||
367 | } | ||
368 | |||
369 | void perf_counter_release_pmc(void) | ||
370 | { | ||
371 | if (atomic_dec_and_mutex_lock(&active_counters, &pmc_grab_mutex)) { | ||
372 | if (atomic_read(&nmi_active) == 0) | ||
373 | on_each_cpu(start_nmi_watchdog, NULL, 1); | ||
374 | mutex_unlock(&pmc_grab_mutex); | ||
375 | } | ||
376 | } | ||
377 | |||
378 | static void hw_perf_counter_destroy(struct perf_counter *counter) | ||
379 | { | ||
380 | perf_counter_release_pmc(); | ||
381 | } | ||
382 | |||
383 | static int __hw_perf_counter_init(struct perf_counter *counter) | ||
384 | { | ||
385 | struct perf_counter_attr *attr = &counter->attr; | ||
386 | struct hw_perf_counter *hwc = &counter->hw; | ||
387 | const struct perf_event_map *pmap; | ||
388 | u64 enc; | ||
389 | |||
390 | if (atomic_read(&nmi_active) < 0) | ||
391 | return -ENODEV; | ||
392 | |||
393 | if (attr->type != PERF_TYPE_HARDWARE) | ||
394 | return -EOPNOTSUPP; | ||
395 | |||
396 | if (attr->config >= sparc_pmu->max_events) | ||
397 | return -EINVAL; | ||
398 | |||
399 | perf_counter_grab_pmc(); | ||
400 | counter->destroy = hw_perf_counter_destroy; | ||
401 | |||
402 | /* We save the enable bits in the config_base. So to | ||
403 | * turn off sampling just write 'config', and to enable | ||
404 | * things write 'config | config_base'. | ||
405 | */ | ||
406 | hwc->config_base = sparc_pmu->irq_bit; | ||
407 | if (!attr->exclude_user) | ||
408 | hwc->config_base |= PCR_UTRACE; | ||
409 | if (!attr->exclude_kernel) | ||
410 | hwc->config_base |= PCR_STRACE; | ||
411 | if (!attr->exclude_hv) | ||
412 | hwc->config_base |= sparc_pmu->hv_bit; | ||
413 | |||
414 | if (!hwc->sample_period) { | ||
415 | hwc->sample_period = MAX_PERIOD; | ||
416 | hwc->last_period = hwc->sample_period; | ||
417 | atomic64_set(&hwc->period_left, hwc->sample_period); | ||
418 | } | ||
419 | |||
420 | pmap = sparc_pmu->event_map(attr->config); | ||
421 | |||
422 | enc = pmap->encoding; | ||
423 | if (pmap->pic_mask & PIC_UPPER) { | ||
424 | hwc->idx = PIC_UPPER_INDEX; | ||
425 | enc <<= sparc_pmu->upper_shift; | ||
426 | } else { | ||
427 | hwc->idx = PIC_LOWER_INDEX; | ||
428 | enc <<= sparc_pmu->lower_shift; | ||
429 | } | ||
430 | |||
431 | hwc->config |= enc; | ||
432 | return 0; | ||
433 | } | ||
434 | |||
435 | static const struct pmu pmu = { | ||
436 | .enable = sparc_pmu_enable, | ||
437 | .disable = sparc_pmu_disable, | ||
438 | .read = sparc_pmu_read, | ||
439 | .unthrottle = sparc_pmu_unthrottle, | ||
440 | }; | ||
441 | |||
442 | const struct pmu *hw_perf_counter_init(struct perf_counter *counter) | ||
443 | { | ||
444 | int err = __hw_perf_counter_init(counter); | ||
445 | |||
446 | if (err) | ||
447 | return ERR_PTR(err); | ||
448 | return &pmu; | ||
449 | } | ||
450 | |||
451 | void perf_counter_print_debug(void) | ||
452 | { | ||
453 | unsigned long flags; | ||
454 | u64 pcr, pic; | ||
455 | int cpu; | ||
456 | |||
457 | if (!sparc_pmu) | ||
458 | return; | ||
459 | |||
460 | local_irq_save(flags); | ||
461 | |||
462 | cpu = smp_processor_id(); | ||
463 | |||
464 | pcr = pcr_ops->read(); | ||
465 | read_pic(pic); | ||
466 | |||
467 | pr_info("\n"); | ||
468 | pr_info("CPU#%d: PCR[%016llx] PIC[%016llx]\n", | ||
469 | cpu, pcr, pic); | ||
470 | |||
471 | local_irq_restore(flags); | ||
472 | } | ||
473 | |||
474 | static int __kprobes perf_counter_nmi_handler(struct notifier_block *self, | ||
475 | unsigned long cmd, void *__args) | ||
476 | { | ||
477 | struct die_args *args = __args; | ||
478 | struct perf_sample_data data; | ||
479 | struct cpu_hw_counters *cpuc; | ||
480 | struct pt_regs *regs; | ||
481 | int idx; | ||
482 | |||
483 | if (!atomic_read(&active_counters)) | ||
484 | return NOTIFY_DONE; | ||
485 | |||
486 | switch (cmd) { | ||
487 | case DIE_NMI: | ||
488 | break; | ||
489 | |||
490 | default: | ||
491 | return NOTIFY_DONE; | ||
492 | } | ||
493 | |||
494 | regs = args->regs; | ||
495 | |||
496 | data.regs = regs; | ||
497 | data.addr = 0; | ||
498 | |||
499 | cpuc = &__get_cpu_var(cpu_hw_counters); | ||
500 | for (idx = 0; idx < MAX_HWCOUNTERS; idx++) { | ||
501 | struct perf_counter *counter = cpuc->counters[idx]; | ||
502 | struct hw_perf_counter *hwc; | ||
503 | u64 val; | ||
504 | |||
505 | if (!test_bit(idx, cpuc->active_mask)) | ||
506 | continue; | ||
507 | hwc = &counter->hw; | ||
508 | val = sparc_perf_counter_update(counter, hwc, idx); | ||
509 | if (val & (1ULL << 31)) | ||
510 | continue; | ||
511 | |||
512 | data.period = counter->hw.last_period; | ||
513 | if (!sparc_perf_counter_set_period(counter, hwc, idx)) | ||
514 | continue; | ||
515 | |||
516 | if (perf_counter_overflow(counter, 1, &data)) | ||
517 | sparc_pmu_disable_counter(hwc, idx); | ||
518 | } | ||
519 | |||
520 | return NOTIFY_STOP; | ||
521 | } | ||
522 | |||
523 | static __read_mostly struct notifier_block perf_counter_nmi_notifier = { | ||
524 | .notifier_call = perf_counter_nmi_handler, | ||
525 | }; | ||
526 | |||
527 | static bool __init supported_pmu(void) | ||
528 | { | ||
529 | if (!strcmp(sparc_pmu_type, "ultra3i")) { | ||
530 | sparc_pmu = &ultra3i_pmu; | ||
531 | return true; | ||
532 | } | ||
533 | if (!strcmp(sparc_pmu_type, "niagara2")) { | ||
534 | sparc_pmu = &niagara2_pmu; | ||
535 | return true; | ||
536 | } | ||
537 | return false; | ||
538 | } | ||
539 | |||
540 | void __init init_hw_perf_counters(void) | ||
541 | { | ||
542 | pr_info("Performance counters: "); | ||
543 | |||
544 | if (!supported_pmu()) { | ||
545 | pr_cont("No support for PMU type '%s'\n", sparc_pmu_type); | ||
546 | return; | ||
547 | } | ||
548 | |||
549 | pr_cont("Supported PMU type is '%s'\n", sparc_pmu_type); | ||
550 | |||
551 | /* All sparc64 PMUs currently have 2 counters. But this simple | ||
552 | * driver only supports one active counter at a time. | ||
553 | */ | ||
554 | perf_max_counters = 1; | ||
555 | |||
556 | register_die_notifier(&perf_counter_nmi_notifier); | ||
557 | } | ||
diff --git a/arch/sparc/kernel/process_64.c b/arch/sparc/kernel/process_64.c index 4041f94e7724..18d67854a1b8 100644 --- a/arch/sparc/kernel/process_64.c +++ b/arch/sparc/kernel/process_64.c | |||
@@ -251,7 +251,7 @@ static void __global_reg_poll(struct global_reg_snapshot *gp) | |||
251 | } | 251 | } |
252 | } | 252 | } |
253 | 253 | ||
254 | void __trigger_all_cpu_backtrace(void) | 254 | void arch_trigger_all_cpu_backtrace(void) |
255 | { | 255 | { |
256 | struct thread_info *tp = current_thread_info(); | 256 | struct thread_info *tp = current_thread_info(); |
257 | struct pt_regs *regs = get_irq_regs(); | 257 | struct pt_regs *regs = get_irq_regs(); |
@@ -304,7 +304,7 @@ void __trigger_all_cpu_backtrace(void) | |||
304 | 304 | ||
305 | static void sysrq_handle_globreg(int key, struct tty_struct *tty) | 305 | static void sysrq_handle_globreg(int key, struct tty_struct *tty) |
306 | { | 306 | { |
307 | __trigger_all_cpu_backtrace(); | 307 | arch_trigger_all_cpu_backtrace(); |
308 | } | 308 | } |
309 | 309 | ||
310 | static struct sysrq_key_op sparc_globalreg_op = { | 310 | static struct sysrq_key_op sparc_globalreg_op = { |
diff --git a/arch/sparc/kernel/prom_32.c b/arch/sparc/kernel/prom_32.c index fe43e80772db..0a37e8cfd160 100644 --- a/arch/sparc/kernel/prom_32.c +++ b/arch/sparc/kernel/prom_32.c | |||
@@ -24,6 +24,8 @@ | |||
24 | 24 | ||
25 | #include <asm/prom.h> | 25 | #include <asm/prom.h> |
26 | #include <asm/oplib.h> | 26 | #include <asm/oplib.h> |
27 | #include <asm/leon.h> | ||
28 | #include <asm/leon_amba.h> | ||
27 | 29 | ||
28 | #include "prom.h" | 30 | #include "prom.h" |
29 | 31 | ||
@@ -131,6 +133,35 @@ static void __init ebus_path_component(struct device_node *dp, char *tmp_buf) | |||
131 | regs->which_io, regs->phys_addr); | 133 | regs->which_io, regs->phys_addr); |
132 | } | 134 | } |
133 | 135 | ||
136 | /* "name:vendor:device@irq,addrlo" */ | ||
137 | static void __init ambapp_path_component(struct device_node *dp, char *tmp_buf) | ||
138 | { | ||
139 | struct amba_prom_registers *regs; unsigned int *intr; | ||
140 | unsigned int *device, *vendor; | ||
141 | struct property *prop; | ||
142 | |||
143 | prop = of_find_property(dp, "reg", NULL); | ||
144 | if (!prop) | ||
145 | return; | ||
146 | regs = prop->value; | ||
147 | prop = of_find_property(dp, "interrupts", NULL); | ||
148 | if (!prop) | ||
149 | return; | ||
150 | intr = prop->value; | ||
151 | prop = of_find_property(dp, "vendor", NULL); | ||
152 | if (!prop) | ||
153 | return; | ||
154 | vendor = prop->value; | ||
155 | prop = of_find_property(dp, "device", NULL); | ||
156 | if (!prop) | ||
157 | return; | ||
158 | device = prop->value; | ||
159 | |||
160 | sprintf(tmp_buf, "%s:%d:%d@%x,%x", | ||
161 | dp->name, *vendor, *device, | ||
162 | *intr, regs->phys_addr); | ||
163 | } | ||
164 | |||
134 | static void __init __build_path_component(struct device_node *dp, char *tmp_buf) | 165 | static void __init __build_path_component(struct device_node *dp, char *tmp_buf) |
135 | { | 166 | { |
136 | struct device_node *parent = dp->parent; | 167 | struct device_node *parent = dp->parent; |
@@ -143,6 +174,8 @@ static void __init __build_path_component(struct device_node *dp, char *tmp_buf) | |||
143 | return sbus_path_component(dp, tmp_buf); | 174 | return sbus_path_component(dp, tmp_buf); |
144 | if (!strcmp(parent->type, "ebus")) | 175 | if (!strcmp(parent->type, "ebus")) |
145 | return ebus_path_component(dp, tmp_buf); | 176 | return ebus_path_component(dp, tmp_buf); |
177 | if (!strcmp(parent->type, "ambapp")) | ||
178 | return ambapp_path_component(dp, tmp_buf); | ||
146 | 179 | ||
147 | /* "isa" is handled with platform naming */ | 180 | /* "isa" is handled with platform naming */ |
148 | } | 181 | } |
diff --git a/arch/sparc/kernel/prom_common.c b/arch/sparc/kernel/prom_common.c index 0fb5789d43c8..138910c67206 100644 --- a/arch/sparc/kernel/prom_common.c +++ b/arch/sparc/kernel/prom_common.c | |||
@@ -22,9 +22,12 @@ | |||
22 | #include <linux/of.h> | 22 | #include <linux/of.h> |
23 | #include <asm/prom.h> | 23 | #include <asm/prom.h> |
24 | #include <asm/oplib.h> | 24 | #include <asm/oplib.h> |
25 | #include <asm/leon.h> | ||
25 | 26 | ||
26 | #include "prom.h" | 27 | #include "prom.h" |
27 | 28 | ||
29 | void (*prom_build_more)(struct device_node *dp, struct device_node ***nextp); | ||
30 | |||
28 | struct device_node *of_console_device; | 31 | struct device_node *of_console_device; |
29 | EXPORT_SYMBOL(of_console_device); | 32 | EXPORT_SYMBOL(of_console_device); |
30 | 33 | ||
@@ -161,7 +164,7 @@ static struct property * __init build_one_prop(phandle node, char *prev, | |||
161 | name = prom_nextprop(node, prev, p->name); | 164 | name = prom_nextprop(node, prev, p->name); |
162 | } | 165 | } |
163 | 166 | ||
164 | if (strlen(name) == 0) { | 167 | if (!name || strlen(name) == 0) { |
165 | tmp = p; | 168 | tmp = p; |
166 | return NULL; | 169 | return NULL; |
167 | } | 170 | } |
@@ -242,7 +245,7 @@ static struct device_node * __init prom_create_node(phandle node, | |||
242 | return dp; | 245 | return dp; |
243 | } | 246 | } |
244 | 247 | ||
245 | static char * __init build_full_name(struct device_node *dp) | 248 | char * __init build_full_name(struct device_node *dp) |
246 | { | 249 | { |
247 | int len, ourlen, plen; | 250 | int len, ourlen, plen; |
248 | char *n; | 251 | char *n; |
@@ -289,6 +292,9 @@ static struct device_node * __init prom_build_tree(struct device_node *parent, | |||
289 | 292 | ||
290 | dp->child = prom_build_tree(dp, prom_getchild(node), nextp); | 293 | dp->child = prom_build_tree(dp, prom_getchild(node), nextp); |
291 | 294 | ||
295 | if (prom_build_more) | ||
296 | prom_build_more(dp, nextp); | ||
297 | |||
292 | node = prom_getsibling(node); | 298 | node = prom_getsibling(node); |
293 | } | 299 | } |
294 | 300 | ||
diff --git a/arch/sparc/kernel/setup_32.c b/arch/sparc/kernel/setup_32.c index 998cadb4e7f2..16a47ffe03c1 100644 --- a/arch/sparc/kernel/setup_32.c +++ b/arch/sparc/kernel/setup_32.c | |||
@@ -235,6 +235,8 @@ void __init setup_arch(char **cmdline_p) | |||
235 | sparc_cpu_model = sun4e; | 235 | sparc_cpu_model = sun4e; |
236 | if (!strcmp(&cputypval,"sun4u")) | 236 | if (!strcmp(&cputypval,"sun4u")) |
237 | sparc_cpu_model = sun4u; | 237 | sparc_cpu_model = sun4u; |
238 | if (!strncmp(&cputypval, "leon" , 4)) | ||
239 | sparc_cpu_model = sparc_leon; | ||
238 | 240 | ||
239 | printk("ARCH: "); | 241 | printk("ARCH: "); |
240 | switch(sparc_cpu_model) { | 242 | switch(sparc_cpu_model) { |
@@ -256,6 +258,9 @@ void __init setup_arch(char **cmdline_p) | |||
256 | case sun4u: | 258 | case sun4u: |
257 | printk("SUN4U\n"); | 259 | printk("SUN4U\n"); |
258 | break; | 260 | break; |
261 | case sparc_leon: | ||
262 | printk("LEON\n"); | ||
263 | break; | ||
259 | default: | 264 | default: |
260 | printk("UNKNOWN!\n"); | 265 | printk("UNKNOWN!\n"); |
261 | break; | 266 | break; |
diff --git a/arch/sparc/kernel/signal_32.c b/arch/sparc/kernel/signal_32.c index 181d069a2d44..7ce1a1005b1d 100644 --- a/arch/sparc/kernel/signal_32.c +++ b/arch/sparc/kernel/signal_32.c | |||
@@ -590,6 +590,8 @@ void do_notify_resume(struct pt_regs *regs, unsigned long orig_i0, | |||
590 | if (thread_info_flags & _TIF_NOTIFY_RESUME) { | 590 | if (thread_info_flags & _TIF_NOTIFY_RESUME) { |
591 | clear_thread_flag(TIF_NOTIFY_RESUME); | 591 | clear_thread_flag(TIF_NOTIFY_RESUME); |
592 | tracehook_notify_resume(regs); | 592 | tracehook_notify_resume(regs); |
593 | if (current->replacement_session_keyring) | ||
594 | key_replace_session_keyring(); | ||
593 | } | 595 | } |
594 | } | 596 | } |
595 | 597 | ||
diff --git a/arch/sparc/kernel/signal_64.c b/arch/sparc/kernel/signal_64.c index ec82d76dc6f2..647afbda7ae1 100644 --- a/arch/sparc/kernel/signal_64.c +++ b/arch/sparc/kernel/signal_64.c | |||
@@ -613,5 +613,8 @@ void do_notify_resume(struct pt_regs *regs, unsigned long orig_i0, unsigned long | |||
613 | if (thread_info_flags & _TIF_NOTIFY_RESUME) { | 613 | if (thread_info_flags & _TIF_NOTIFY_RESUME) { |
614 | clear_thread_flag(TIF_NOTIFY_RESUME); | 614 | clear_thread_flag(TIF_NOTIFY_RESUME); |
615 | tracehook_notify_resume(regs); | 615 | tracehook_notify_resume(regs); |
616 | if (current->replacement_session_keyring) | ||
617 | key_replace_session_keyring(); | ||
616 | } | 618 | } |
617 | } | 619 | } |
620 | |||
diff --git a/arch/sparc/kernel/sys32.S b/arch/sparc/kernel/sys32.S index aed94869ad6a..e7061138c98a 100644 --- a/arch/sparc/kernel/sys32.S +++ b/arch/sparc/kernel/sys32.S | |||
@@ -121,7 +121,7 @@ SIGN2(sys32_syslog, sys_syslog, %o0, %o2) | |||
121 | SIGN1(sys32_umask, sys_umask, %o0) | 121 | SIGN1(sys32_umask, sys_umask, %o0) |
122 | SIGN3(sys32_tgkill, sys_tgkill, %o0, %o1, %o2) | 122 | SIGN3(sys32_tgkill, sys_tgkill, %o0, %o1, %o2) |
123 | SIGN1(sys32_sendto, sys_sendto, %o0) | 123 | SIGN1(sys32_sendto, sys_sendto, %o0) |
124 | SIGN1(sys32_recvfrom, sys_recvfrom, %o0) | 124 | SIGN1(sys32_recvfrom, compat_sys_recvfrom, %o0) |
125 | SIGN3(sys32_socket, sys_socket, %o0, %o1, %o2) | 125 | SIGN3(sys32_socket, sys_socket, %o0, %o1, %o2) |
126 | SIGN2(sys32_connect, sys_connect, %o0, %o2) | 126 | SIGN2(sys32_connect, sys_connect, %o0, %o2) |
127 | SIGN2(sys32_bind, sys_bind, %o0, %o2) | 127 | SIGN2(sys32_bind, sys_bind, %o0, %o2) |
diff --git a/arch/sparc/kernel/sysfs.c b/arch/sparc/kernel/sysfs.c index d28f496f4669..ca39c606fe8e 100644 --- a/arch/sparc/kernel/sysfs.c +++ b/arch/sparc/kernel/sysfs.c | |||
@@ -2,6 +2,7 @@ | |||
2 | * | 2 | * |
3 | * Copyright (C) 2007 David S. Miller <davem@davemloft.net> | 3 | * Copyright (C) 2007 David S. Miller <davem@davemloft.net> |
4 | */ | 4 | */ |
5 | #include <linux/sched.h> | ||
5 | #include <linux/sysdev.h> | 6 | #include <linux/sysdev.h> |
6 | #include <linux/cpu.h> | 7 | #include <linux/cpu.h> |
7 | #include <linux/smp.h> | 8 | #include <linux/smp.h> |
diff --git a/arch/sparc/kernel/systbls_32.S b/arch/sparc/kernel/systbls_32.S index 690901657291..04181577cb65 100644 --- a/arch/sparc/kernel/systbls_32.S +++ b/arch/sparc/kernel/systbls_32.S | |||
@@ -82,5 +82,5 @@ sys_call_table: | |||
82 | /*310*/ .long sys_utimensat, sys_signalfd, sys_timerfd_create, sys_eventfd, sys_fallocate | 82 | /*310*/ .long sys_utimensat, sys_signalfd, sys_timerfd_create, sys_eventfd, sys_fallocate |
83 | /*315*/ .long sys_timerfd_settime, sys_timerfd_gettime, sys_signalfd4, sys_eventfd2, sys_epoll_create1 | 83 | /*315*/ .long sys_timerfd_settime, sys_timerfd_gettime, sys_signalfd4, sys_eventfd2, sys_epoll_create1 |
84 | /*320*/ .long sys_dup3, sys_pipe2, sys_inotify_init1, sys_accept4, sys_preadv | 84 | /*320*/ .long sys_dup3, sys_pipe2, sys_inotify_init1, sys_accept4, sys_preadv |
85 | /*325*/ .long sys_pwritev, sys_rt_tgsigqueueinfo | 85 | /*325*/ .long sys_pwritev, sys_rt_tgsigqueueinfo, sys_perf_counter_open |
86 | 86 | ||
diff --git a/arch/sparc/kernel/systbls_64.S b/arch/sparc/kernel/systbls_64.S index 2ee7250ba7ae..91b06b7f7acf 100644 --- a/arch/sparc/kernel/systbls_64.S +++ b/arch/sparc/kernel/systbls_64.S | |||
@@ -83,7 +83,7 @@ sys_call_table32: | |||
83 | /*310*/ .word compat_sys_utimensat, compat_sys_signalfd, sys_timerfd_create, sys_eventfd, compat_sys_fallocate | 83 | /*310*/ .word compat_sys_utimensat, compat_sys_signalfd, sys_timerfd_create, sys_eventfd, compat_sys_fallocate |
84 | .word compat_sys_timerfd_settime, compat_sys_timerfd_gettime, compat_sys_signalfd4, sys_eventfd2, sys_epoll_create1 | 84 | .word compat_sys_timerfd_settime, compat_sys_timerfd_gettime, compat_sys_signalfd4, sys_eventfd2, sys_epoll_create1 |
85 | /*320*/ .word sys_dup3, sys_pipe2, sys_inotify_init1, sys_accept4, compat_sys_preadv | 85 | /*320*/ .word sys_dup3, sys_pipe2, sys_inotify_init1, sys_accept4, compat_sys_preadv |
86 | .word compat_sys_pwritev, compat_sys_rt_tgsigqueueinfo | 86 | .word compat_sys_pwritev, compat_sys_rt_tgsigqueueinfo, sys_perf_counter_open |
87 | 87 | ||
88 | #endif /* CONFIG_COMPAT */ | 88 | #endif /* CONFIG_COMPAT */ |
89 | 89 | ||
@@ -158,4 +158,4 @@ sys_call_table: | |||
158 | /*310*/ .word sys_utimensat, sys_signalfd, sys_timerfd_create, sys_eventfd, sys_fallocate | 158 | /*310*/ .word sys_utimensat, sys_signalfd, sys_timerfd_create, sys_eventfd, sys_fallocate |
159 | .word sys_timerfd_settime, sys_timerfd_gettime, sys_signalfd4, sys_eventfd2, sys_epoll_create1 | 159 | .word sys_timerfd_settime, sys_timerfd_gettime, sys_signalfd4, sys_eventfd2, sys_epoll_create1 |
160 | /*320*/ .word sys_dup3, sys_pipe2, sys_inotify_init1, sys_accept4, sys_preadv | 160 | /*320*/ .word sys_dup3, sys_pipe2, sys_inotify_init1, sys_accept4, sys_preadv |
161 | .word sys_pwritev, sys_rt_tgsigqueueinfo | 161 | .word sys_pwritev, sys_rt_tgsigqueueinfo, sys_perf_counter_open |