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authorSam Ravnborg <sam@ravnborg.org>2008-12-05 22:07:35 -0500
committerDavid S. Miller <davem@davemloft.net>2008-12-05 22:07:35 -0500
commit8a563f016049bcdc9b0de0c8622afcf04b860e5e (patch)
tree7c812f09604a11a044899f6d281433576430ae93 /arch/sparc/kernel
parentad07aed8ca2023bcfe224a5e3e55bafec2c741d0 (diff)
sparc: beautify kernel/cpu_32.c
Fixed style issues Use C99 struct assignments Use KERN_DEBUG for printk Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc/kernel')
-rw-r--r--arch/sparc/kernel/cpu_32.c204
1 files changed, 104 insertions, 100 deletions
diff --git a/arch/sparc/kernel/cpu_32.c b/arch/sparc/kernel/cpu_32.c
index 1fc17f59c6bf..d0fe5d249206 100644
--- a/arch/sparc/kernel/cpu_32.c
+++ b/arch/sparc/kernel/cpu_32.c
@@ -18,105 +18,109 @@
18DEFINE_PER_CPU(cpuinfo_sparc, __cpu_data) = { 0 }; 18DEFINE_PER_CPU(cpuinfo_sparc, __cpu_data) = { 0 };
19 19
20struct cpu_iu_info { 20struct cpu_iu_info {
21 int psr_impl; 21 int psr_impl;
22 int psr_vers; 22 int psr_vers;
23 char* cpu_name; /* should be enough I hope... */ 23 char *cpu_name; /* should be enough I hope... */
24}; 24};
25 25
26struct cpu_fp_info { 26struct cpu_fp_info {
27 int psr_impl; 27 int psr_impl;
28 int fp_vers; 28 int fp_vers;
29 char* fp_name; 29 char *fp_name;
30}; 30};
31 31
32/* In order to get the fpu type correct, you need to take the IDPROM's 32/* In order to get the fpu type correct, you need to take the IDPROM's
33 * machine type value into consideration too. I will fix this. 33 * machine type value into consideration too. I will fix this.
34 */ 34 */
35#define CPU_FP(psr, ver, name) \
36{ .psr_impl = (psr), .fp_vers = (ver), .fp_name = (name) }
35static struct cpu_fp_info linux_sparc_fpu[] = { 37static struct cpu_fp_info linux_sparc_fpu[] = {
36 { 0, 0, "Fujitsu MB86910 or Weitek WTL1164/5"}, 38 CPU_FP(0, 0, "Fujitsu MB86910 or Weitek WTL1164/5"),
37 { 0, 1, "Fujitsu MB86911 or Weitek WTL1164/5 or LSI L64831"}, 39 CPU_FP(0, 1, "Fujitsu MB86911 or Weitek WTL1164/5 or LSI L64831"),
38 { 0, 2, "LSI Logic L64802 or Texas Instruments ACT8847"}, 40 CPU_FP(0, 2, "LSI Logic L64802 or Texas Instruments ACT8847"),
39 /* SparcStation SLC, SparcStation1 */ 41 /* SparcStation SLC, SparcStation1 */
40 { 0, 3, "Weitek WTL3170/2"}, 42 CPU_FP(0, 3, "Weitek WTL3170/2"),
41 /* SPARCstation-5 */ 43 /* SPARCstation-5 */
42 { 0, 4, "Lsi Logic/Meiko L64804 or compatible"}, 44 CPU_FP(0, 4, "Lsi Logic/Meiko L64804 or compatible"),
43 { 0, 5, "reserved"}, 45 CPU_FP(0, 5, "reserved"),
44 { 0, 6, "reserved"}, 46 CPU_FP(0, 6, "reserved"),
45 { 0, 7, "No FPU"}, 47 CPU_FP(0, 7, "No FPU"),
46 { 1, 0, "ROSS HyperSparc combined IU/FPU"}, 48 CPU_FP(1, 0, "ROSS HyperSparc combined IU/FPU"),
47 { 1, 1, "Lsi Logic L64814"}, 49 CPU_FP(1, 1, "Lsi Logic L64814"),
48 { 1, 2, "Texas Instruments TMS390-C602A"}, 50 CPU_FP(1, 2, "Texas Instruments TMS390-C602A"),
49 { 1, 3, "Cypress CY7C602 FPU"}, 51 CPU_FP(1, 3, "Cypress CY7C602 FPU"),
50 { 1, 4, "reserved"}, 52 CPU_FP(1, 4, "reserved"),
51 { 1, 5, "reserved"}, 53 CPU_FP(1, 5, "reserved"),
52 { 1, 6, "reserved"}, 54 CPU_FP(1, 6, "reserved"),
53 { 1, 7, "No FPU"}, 55 CPU_FP(1, 7, "No FPU"),
54 { 2, 0, "BIT B5010 or B5110/20 or B5210"}, 56 CPU_FP(2, 0, "BIT B5010 or B5110/20 or B5210"),
55 { 2, 1, "reserved"}, 57 CPU_FP(2, 1, "reserved"),
56 { 2, 2, "reserved"}, 58 CPU_FP(2, 2, "reserved"),
57 { 2, 3, "reserved"}, 59 CPU_FP(2, 3, "reserved"),
58 { 2, 4, "reserved"}, 60 CPU_FP(2, 4, "reserved"),
59 { 2, 5, "reserved"}, 61 CPU_FP(2, 5, "reserved"),
60 { 2, 6, "reserved"}, 62 CPU_FP(2, 6, "reserved"),
61 { 2, 7, "No FPU"}, 63 CPU_FP(2, 7, "No FPU"),
62 /* SuperSparc 50 module */ 64 /* SuperSparc 50 module */
63 { 4, 0, "SuperSparc on-chip FPU"}, 65 CPU_FP(4, 0, "SuperSparc on-chip FPU"),
64 /* SparcClassic */ 66 /* SparcClassic */
65 { 4, 4, "TI MicroSparc on chip FPU"}, 67 CPU_FP(4, 4, "TI MicroSparc on chip FPU"),
66 { 5, 0, "Matsushita MN10501"}, 68 CPU_FP(5, 0, "Matsushita MN10501"),
67 { 5, 1, "reserved"}, 69 CPU_FP(5, 1, "reserved"),
68 { 5, 2, "reserved"}, 70 CPU_FP(5, 2, "reserved"),
69 { 5, 3, "reserved"}, 71 CPU_FP(5, 3, "reserved"),
70 { 5, 4, "reserved"}, 72 CPU_FP(5, 4, "reserved"),
71 { 5, 5, "reserved"}, 73 CPU_FP(5, 5, "reserved"),
72 { 5, 6, "reserved"}, 74 CPU_FP(5, 6, "reserved"),
73 { 5, 7, "No FPU"}, 75 CPU_FP(5, 7, "No FPU"),
74 { 9, 3, "Fujitsu or Weitek on-chip FPU"}, 76 CPU_FP(9, 3, "Fujitsu or Weitek on-chip FPU"),
75}; 77};
76 78
77#define NSPARCFPU ARRAY_SIZE(linux_sparc_fpu) 79#define NSPARCFPU ARRAY_SIZE(linux_sparc_fpu)
78 80
81#define CPU_INFO(psr, ver, name) \
82{ .psr_impl = (psr), .psr_vers = (ver), .cpu_name = (name) }
79static struct cpu_iu_info linux_sparc_chips[] = { 83static struct cpu_iu_info linux_sparc_chips[] = {
80 /* Sun4/100, 4/200, SLC */ 84 /* Sun4/100, 4/200, SLC */
81 { 0, 0, "Fujitsu MB86900/1A or LSI L64831 SparcKIT-40"}, 85 CPU_INFO(0, 0, "Fujitsu MB86900/1A or LSI L64831 SparcKIT-40"),
82 /* borned STP1012PGA */ 86 /* borned STP1012PGA */
83 { 0, 4, "Fujitsu MB86904"}, 87 CPU_INFO(0, 4, "Fujitsu MB86904"),
84 { 0, 5, "Fujitsu TurboSparc MB86907"}, 88 CPU_INFO(0, 5, "Fujitsu TurboSparc MB86907"),
85 /* SparcStation2, SparcServer 490 & 690 */ 89 /* SparcStation2, SparcServer 490 & 690 */
86 { 1, 0, "LSI Logic Corporation - L64811"}, 90 CPU_INFO(1, 0, "LSI Logic Corporation - L64811"),
87 /* SparcStation2 */ 91 /* SparcStation2 */
88 { 1, 1, "Cypress/ROSS CY7C601"}, 92 CPU_INFO(1, 1, "Cypress/ROSS CY7C601"),
89 /* Embedded controller */ 93 /* Embedded controller */
90 { 1, 3, "Cypress/ROSS CY7C611"}, 94 CPU_INFO(1, 3, "Cypress/ROSS CY7C611"),
91 /* Ross Technologies HyperSparc */ 95 /* Ross Technologies HyperSparc */
92 { 1, 0xf, "ROSS HyperSparc RT620"}, 96 CPU_INFO(1, 0xf, "ROSS HyperSparc RT620"),
93 { 1, 0xe, "ROSS HyperSparc RT625 or RT626"}, 97 CPU_INFO(1, 0xe, "ROSS HyperSparc RT625 or RT626"),
94 /* ECL Implementation, CRAY S-MP Supercomputer... AIEEE! */ 98 /* ECL Implementation, CRAY S-MP Supercomputer... AIEEE! */
95 /* Someone please write the code to support this beast! ;) */ 99 /* Someone please write the code to support this beast! ;) */
96 { 2, 0, "Bipolar Integrated Technology - B5010"}, 100 CPU_INFO(2, 0, "Bipolar Integrated Technology - B5010"),
97 { 3, 0, "LSI Logic Corporation - unknown-type"}, 101 CPU_INFO(3, 0, "LSI Logic Corporation - unknown-type"),
98 { 4, 0, "Texas Instruments, Inc. - SuperSparc-(II)"}, 102 CPU_INFO(4, 0, "Texas Instruments, Inc. - SuperSparc-(II)"),
99 /* SparcClassic -- borned STP1010TAB-50*/ 103 /* SparcClassic -- borned STP1010TAB-50*/
100 { 4, 1, "Texas Instruments, Inc. - MicroSparc"}, 104 CPU_INFO(4, 1, "Texas Instruments, Inc. - MicroSparc"),
101 { 4, 2, "Texas Instruments, Inc. - MicroSparc II"}, 105 CPU_INFO(4, 2, "Texas Instruments, Inc. - MicroSparc II"),
102 { 4, 3, "Texas Instruments, Inc. - SuperSparc 51"}, 106 CPU_INFO(4, 3, "Texas Instruments, Inc. - SuperSparc 51"),
103 { 4, 4, "Texas Instruments, Inc. - SuperSparc 61"}, 107 CPU_INFO(4, 4, "Texas Instruments, Inc. - SuperSparc 61"),
104 { 4, 5, "Texas Instruments, Inc. - unknown"}, 108 CPU_INFO(4, 5, "Texas Instruments, Inc. - unknown"),
105 { 5, 0, "Matsushita - MN10501"}, 109 CPU_INFO(5, 0, "Matsushita - MN10501"),
106 { 6, 0, "Philips Corporation - unknown"}, 110 CPU_INFO(6, 0, "Philips Corporation - unknown"),
107 { 7, 0, "Harvest VLSI Design Center, Inc. - unknown"}, 111 CPU_INFO(7, 0, "Harvest VLSI Design Center, Inc. - unknown"),
108 /* Gallium arsenide 200MHz, BOOOOGOOOOMIPS!!! */ 112 /* Gallium arsenide 200MHz, BOOOOGOOOOMIPS!!! */
109 { 8, 0, "Systems and Processes Engineering Corporation (SPEC)"}, 113 CPU_INFO(8, 0, "Systems and Processes Engineering Corporation (SPEC)"),
110 { 9, 0, "Fujitsu or Weitek Power-UP"}, 114 CPU_INFO(9, 0, "Fujitsu or Weitek Power-UP"),
111 { 9, 1, "Fujitsu or Weitek Power-UP"}, 115 CPU_INFO(9, 1, "Fujitsu or Weitek Power-UP"),
112 { 9, 2, "Fujitsu or Weitek Power-UP"}, 116 CPU_INFO(9, 2, "Fujitsu or Weitek Power-UP"),
113 { 9, 3, "Fujitsu or Weitek Power-UP"}, 117 CPU_INFO(9, 3, "Fujitsu or Weitek Power-UP"),
114 { 0xa, 0, "UNKNOWN CPU-VENDOR/TYPE"}, 118 CPU_INFO(0xa, 0, "UNKNOWN CPU-VENDOR/TYPE"),
115 { 0xb, 0, "UNKNOWN CPU-VENDOR/TYPE"}, 119 CPU_INFO(0xb, 0, "UNKNOWN CPU-VENDOR/TYPE"),
116 { 0xc, 0, "UNKNOWN CPU-VENDOR/TYPE"}, 120 CPU_INFO(0xc, 0, "UNKNOWN CPU-VENDOR/TYPE"),
117 { 0xd, 0, "UNKNOWN CPU-VENDOR/TYPE"}, 121 CPU_INFO(0xd, 0, "UNKNOWN CPU-VENDOR/TYPE"),
118 { 0xe, 0, "UNKNOWN CPU-VENDOR/TYPE"}, 122 CPU_INFO(0xe, 0, "UNKNOWN CPU-VENDOR/TYPE"),
119 { 0xf, 0, "UNKNOWN CPU-VENDOR/TYPE"}, 123 CPU_INFO(0xf, 0, "UNKNOWN CPU-VENDOR/TYPE"),
120}; 124};
121 125
122#define NSPARCCHIPS ARRAY_SIZE(linux_sparc_chips) 126#define NSPARCCHIPS ARRAY_SIZE(linux_sparc_chips)
@@ -131,37 +135,37 @@ void __cpuinit cpu_probe(void)
131 int psr_impl, psr_vers, fpu_vers; 135 int psr_impl, psr_vers, fpu_vers;
132 int i, psr; 136 int i, psr;
133 137
134 psr_impl = ((get_psr()>>28)&0xf); 138 psr_impl = ((get_psr() >> 28) & 0xf);
135 psr_vers = ((get_psr()>>24)&0xf); 139 psr_vers = ((get_psr() >> 24) & 0xf);
136 140
137 psr = get_psr(); 141 psr = get_psr();
138 put_psr(psr | PSR_EF); 142 put_psr(psr | PSR_EF);
139 fpu_vers = ((get_fsr()>>17)&0x7); 143 fpu_vers = ((get_fsr() >> 17) & 0x7);
140 put_psr(psr); 144 put_psr(psr);
141 145
142 for(i = 0; i<NSPARCCHIPS; i++) { 146 for (i = 0; i < NSPARCCHIPS; i++) {
143 if(linux_sparc_chips[i].psr_impl == psr_impl) 147 if (linux_sparc_chips[i].psr_impl == psr_impl)
144 if(linux_sparc_chips[i].psr_vers == psr_vers) { 148 if (linux_sparc_chips[i].psr_vers == psr_vers) {
145 sparc_cpu_type = linux_sparc_chips[i].cpu_name; 149 sparc_cpu_type = linux_sparc_chips[i].cpu_name;
146 break; 150 break;
147 } 151 }
148 } 152 }
149 153
150 if(i==NSPARCCHIPS) 154 if (i == NSPARCCHIPS)
151 printk("DEBUG: psr.impl = 0x%x psr.vers = 0x%x\n", psr_impl, 155 printk(KERN_DEBUG "psr.impl = 0x%x psr.vers = 0x%x\n",
152 psr_vers); 156 psr_impl, psr_vers);
153 157
154 for(i = 0; i<NSPARCFPU; i++) { 158 for (i = 0; i < NSPARCFPU; i++) {
155 if(linux_sparc_fpu[i].psr_impl == psr_impl) 159 if (linux_sparc_fpu[i].psr_impl == psr_impl)
156 if(linux_sparc_fpu[i].fp_vers == fpu_vers) { 160 if (linux_sparc_fpu[i].fp_vers == fpu_vers) {
157 sparc_fpu_type = linux_sparc_fpu[i].fp_name; 161 sparc_fpu_type = linux_sparc_fpu[i].fp_name;
158 break; 162 break;
159 } 163 }
160 } 164 }
161 165
162 if(i == NSPARCFPU) { 166 if (i == NSPARCFPU) {
163 printk("DEBUG: psr.impl = 0x%x fsr.vers = 0x%x\n", psr_impl, 167 printk(KERN_DEBUG "psr.impl = 0x%x fsr.vers = 0x%x\n",
164 fpu_vers); 168 psr_impl, fpu_vers);
165 sparc_fpu_type = linux_sparc_fpu[31].fp_name; 169 sparc_fpu_type = linux_sparc_fpu[31].fp_name;
166 } 170 }
167} 171}