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authorDavid S. Miller <davem@davemloft.net>2012-08-17 02:31:59 -0400
committerDavid S. Miller <davem@davemloft.net>2012-08-19 02:26:19 -0400
commitce4a925c29208cf48084d9fa174d965a65246a8d (patch)
tree9b99aafebe393782e602d6960da416dd36bb89e8 /arch/sparc/kernel/nmi.c
parent73a6b0538c131d489fe7a2581deddb72faca496b (diff)
sparc64: Abstract away the %pcr values used to enable/disable NMI
We assumed PCR_PIC_PRIV can always be used to disable it, but that won't be true for SPARC-T4. This allows us also to get rid of some messy defines used in only one location. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc/kernel/nmi.c')
-rw-r--r--arch/sparc/kernel/nmi.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/sparc/kernel/nmi.c b/arch/sparc/kernel/nmi.c
index 4c45158d4c88..6479256fd5a4 100644
--- a/arch/sparc/kernel/nmi.c
+++ b/arch/sparc/kernel/nmi.c
@@ -108,7 +108,7 @@ notrace __kprobes void perfctr_irq(int irq, struct pt_regs *regs)
108 pt_regs_trap_type(regs), SIGINT) == NOTIFY_STOP) 108 pt_regs_trap_type(regs), SIGINT) == NOTIFY_STOP)
109 touched = 1; 109 touched = 1;
110 else 110 else
111 pcr_ops->write_pcr(0, PCR_PIC_PRIV); 111 pcr_ops->write_pcr(0, pcr_ops->pcr_nmi_disable);
112 112
113 sum = local_cpu_data().irq0_irqs; 113 sum = local_cpu_data().irq0_irqs;
114 if (__get_cpu_var(nmi_touch)) { 114 if (__get_cpu_var(nmi_touch)) {
@@ -126,7 +126,7 @@ notrace __kprobes void perfctr_irq(int irq, struct pt_regs *regs)
126 } 126 }
127 if (__get_cpu_var(wd_enabled)) { 127 if (__get_cpu_var(wd_enabled)) {
128 pcr_ops->write_pic(0, pcr_ops->nmi_picl_value(nmi_hz)); 128 pcr_ops->write_pic(0, pcr_ops->nmi_picl_value(nmi_hz));
129 pcr_ops->write_pcr(0, pcr_enable); 129 pcr_ops->write_pcr(0, pcr_ops->pcr_nmi_enable);
130 } 130 }
131 131
132 restore_hardirq_stack(orig_sp); 132 restore_hardirq_stack(orig_sp);
@@ -165,7 +165,7 @@ static void report_broken_nmi(int cpu, int *prev_nmi_count)
165 165
166void stop_nmi_watchdog(void *unused) 166void stop_nmi_watchdog(void *unused)
167{ 167{
168 pcr_ops->write_pcr(0, PCR_PIC_PRIV); 168 pcr_ops->write_pcr(0, pcr_ops->pcr_nmi_disable);
169 __get_cpu_var(wd_enabled) = 0; 169 __get_cpu_var(wd_enabled) = 0;
170 atomic_dec(&nmi_active); 170 atomic_dec(&nmi_active);
171} 171}
@@ -222,10 +222,10 @@ void start_nmi_watchdog(void *unused)
222 __get_cpu_var(wd_enabled) = 1; 222 __get_cpu_var(wd_enabled) = 1;
223 atomic_inc(&nmi_active); 223 atomic_inc(&nmi_active);
224 224
225 pcr_ops->write_pcr(0, PCR_PIC_PRIV); 225 pcr_ops->write_pcr(0, pcr_ops->pcr_nmi_disable);
226 pcr_ops->write_pic(0, pcr_ops->nmi_picl_value(nmi_hz)); 226 pcr_ops->write_pic(0, pcr_ops->nmi_picl_value(nmi_hz));
227 227
228 pcr_ops->write_pcr(0, pcr_enable); 228 pcr_ops->write_pcr(0, pcr_ops->pcr_nmi_enable);
229} 229}
230 230
231static void nmi_adjust_hz_one(void *unused) 231static void nmi_adjust_hz_one(void *unused)
@@ -233,10 +233,10 @@ static void nmi_adjust_hz_one(void *unused)
233 if (!__get_cpu_var(wd_enabled)) 233 if (!__get_cpu_var(wd_enabled))
234 return; 234 return;
235 235
236 pcr_ops->write_pcr(0, PCR_PIC_PRIV); 236 pcr_ops->write_pcr(0, pcr_ops->pcr_nmi_disable);
237 pcr_ops->write_pic(0, pcr_ops->nmi_picl_value(nmi_hz)); 237 pcr_ops->write_pic(0, pcr_ops->nmi_picl_value(nmi_hz));
238 238
239 pcr_ops->write_pcr(0, pcr_enable); 239 pcr_ops->write_pcr(0, pcr_ops->pcr_nmi_enable);
240} 240}
241 241
242void nmi_adjust_hz(unsigned int new_hz) 242void nmi_adjust_hz(unsigned int new_hz)