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authorSam Ravnborg <sam@ravnborg.org>2012-05-25 17:20:17 -0400
committerDavid S. Miller <davem@davemloft.net>2012-05-28 02:52:49 -0400
commit6729cf7967f6c11f6de6a0b43ec277905a00c146 (patch)
tree7e0b3a10176185c302f5ebc7d6e7f8a0d74eb00c /arch/sparc/include
parent1ec8cf62338b950fdbf76bbdfa3064bc1c0b7a81 (diff)
sparc32: introduce run-time patching of srmmu access functions
LEON uses a different ASI than SUN for MMUREGS Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Cc: Daniel Hellstrom <daniel@gaisler.com> Cc: Konrad Eisele <konrad@gaisler.com>
Diffstat (limited to 'arch/sparc/include')
-rw-r--r--arch/sparc/include/asm/pgtsrmmu.h68
1 files changed, 7 insertions, 61 deletions
diff --git a/arch/sparc/include/asm/pgtsrmmu.h b/arch/sparc/include/asm/pgtsrmmu.h
index 394fe25e79d1..72f71214ef87 100644
--- a/arch/sparc/include/asm/pgtsrmmu.h
+++ b/arch/sparc/include/asm/pgtsrmmu.h
@@ -149,67 +149,13 @@ extern void *srmmu_nocache_pool;
149#define __nocache_fix(VADDR) __va(__nocache_pa(VADDR)) 149#define __nocache_fix(VADDR) __va(__nocache_pa(VADDR))
150 150
151/* Accessing the MMU control register. */ 151/* Accessing the MMU control register. */
152static inline unsigned int srmmu_get_mmureg(void) 152unsigned int srmmu_get_mmureg(void);
153{ 153void srmmu_set_mmureg(unsigned long regval);
154 unsigned int retval; 154void srmmu_set_ctable_ptr(unsigned long paddr);
155 __asm__ __volatile__("lda [%%g0] %1, %0\n\t" : 155void srmmu_set_context(int context);
156 "=r" (retval) : 156int srmmu_get_context(void);
157 "i" (ASI_M_MMUREGS)); 157unsigned int srmmu_get_fstatus(void);
158 return retval; 158unsigned int srmmu_get_faddr(void);
159}
160
161static inline void srmmu_set_mmureg(unsigned long regval)
162{
163 __asm__ __volatile__("sta %0, [%%g0] %1\n\t" : :
164 "r" (regval), "i" (ASI_M_MMUREGS) : "memory");
165
166}
167
168static inline void srmmu_set_ctable_ptr(unsigned long paddr)
169{
170 paddr = ((paddr >> 4) & SRMMU_CTX_PMASK);
171 __asm__ __volatile__("sta %0, [%1] %2\n\t" : :
172 "r" (paddr), "r" (SRMMU_CTXTBL_PTR),
173 "i" (ASI_M_MMUREGS) :
174 "memory");
175}
176
177static inline void srmmu_set_context(int context)
178{
179 __asm__ __volatile__("sta %0, [%1] %2\n\t" : :
180 "r" (context), "r" (SRMMU_CTX_REG),
181 "i" (ASI_M_MMUREGS) : "memory");
182}
183
184static inline int srmmu_get_context(void)
185{
186 register int retval;
187 __asm__ __volatile__("lda [%1] %2, %0\n\t" :
188 "=r" (retval) :
189 "r" (SRMMU_CTX_REG),
190 "i" (ASI_M_MMUREGS));
191 return retval;
192}
193
194static inline unsigned int srmmu_get_fstatus(void)
195{
196 unsigned int retval;
197
198 __asm__ __volatile__("lda [%1] %2, %0\n\t" :
199 "=r" (retval) :
200 "r" (SRMMU_FAULT_STATUS), "i" (ASI_M_MMUREGS));
201 return retval;
202}
203
204static inline unsigned int srmmu_get_faddr(void)
205{
206 unsigned int retval;
207
208 __asm__ __volatile__("lda [%1] %2, %0\n\t" :
209 "=r" (retval) :
210 "r" (SRMMU_FAULT_ADDR), "i" (ASI_M_MMUREGS));
211 return retval;
212}
213 159
214/* This is guaranteed on all SRMMU's. */ 160/* This is guaranteed on all SRMMU's. */
215static inline void srmmu_flush_whole_tlb(void) 161static inline void srmmu_flush_whole_tlb(void)