diff options
author | David S. Miller <davem@davemloft.net> | 2009-11-19 01:19:03 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-11-19 01:19:03 -0500 |
commit | 3505d1a9fd65e2d3e00827857b6795d9d8983658 (patch) | |
tree | 941cfafdb57c427bb6b7ebf6354ee93b2a3693b5 /arch/sparc/include | |
parent | dfef948ed2ba69cf041840b5e860d6b4e16fa0b1 (diff) | |
parent | 66b00a7c93ec782d118d2c03bd599cfd041e80a1 (diff) |
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
Conflicts:
drivers/net/sfc/sfe4001.c
drivers/net/wireless/libertas/cmd.c
drivers/staging/Kconfig
drivers/staging/Makefile
drivers/staging/rtl8187se/Kconfig
drivers/staging/rtl8192e/Kconfig
Diffstat (limited to 'arch/sparc/include')
-rw-r--r-- | arch/sparc/include/asm/hardirq_32.h | 12 | ||||
-rw-r--r-- | arch/sparc/include/asm/irq_32.h | 4 | ||||
-rw-r--r-- | arch/sparc/include/asm/pgtable_64.h | 4 | ||||
-rw-r--r-- | arch/sparc/include/asm/system_64.h | 4 |
4 files changed, 9 insertions, 15 deletions
diff --git a/arch/sparc/include/asm/hardirq_32.h b/arch/sparc/include/asm/hardirq_32.h index 4f63ed8df551..162007643cdc 100644 --- a/arch/sparc/include/asm/hardirq_32.h +++ b/arch/sparc/include/asm/hardirq_32.h | |||
@@ -7,17 +7,7 @@ | |||
7 | #ifndef __SPARC_HARDIRQ_H | 7 | #ifndef __SPARC_HARDIRQ_H |
8 | #define __SPARC_HARDIRQ_H | 8 | #define __SPARC_HARDIRQ_H |
9 | 9 | ||
10 | #include <linux/threads.h> | ||
11 | #include <linux/spinlock.h> | ||
12 | #include <linux/cache.h> | ||
13 | |||
14 | /* entry.S is sensitive to the offsets of these fields */ /* XXX P3 Is it? */ | ||
15 | typedef struct { | ||
16 | unsigned int __softirq_pending; | ||
17 | } ____cacheline_aligned irq_cpustat_t; | ||
18 | |||
19 | #include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */ | ||
20 | |||
21 | #define HARDIRQ_BITS 8 | 10 | #define HARDIRQ_BITS 8 |
11 | #include <asm-generic/hardirq.h> | ||
22 | 12 | ||
23 | #endif /* __SPARC_HARDIRQ_H */ | 13 | #endif /* __SPARC_HARDIRQ_H */ |
diff --git a/arch/sparc/include/asm/irq_32.h b/arch/sparc/include/asm/irq_32.h index ea43057d4763..cbf4801deaaf 100644 --- a/arch/sparc/include/asm/irq_32.h +++ b/arch/sparc/include/asm/irq_32.h | |||
@@ -6,10 +6,10 @@ | |||
6 | #ifndef _SPARC_IRQ_H | 6 | #ifndef _SPARC_IRQ_H |
7 | #define _SPARC_IRQ_H | 7 | #define _SPARC_IRQ_H |
8 | 8 | ||
9 | #include <linux/interrupt.h> | ||
10 | |||
11 | #define NR_IRQS 16 | 9 | #define NR_IRQS 16 |
12 | 10 | ||
11 | #include <linux/interrupt.h> | ||
12 | |||
13 | #define irq_canonicalize(irq) (irq) | 13 | #define irq_canonicalize(irq) (irq) |
14 | 14 | ||
15 | extern void __init init_IRQ(void); | 15 | extern void __init init_IRQ(void); |
diff --git a/arch/sparc/include/asm/pgtable_64.h b/arch/sparc/include/asm/pgtable_64.h index 0ff92fa22064..f3cb790fa2ae 100644 --- a/arch/sparc/include/asm/pgtable_64.h +++ b/arch/sparc/include/asm/pgtable_64.h | |||
@@ -41,8 +41,8 @@ | |||
41 | #define LOW_OBP_ADDRESS _AC(0x00000000f0000000,UL) | 41 | #define LOW_OBP_ADDRESS _AC(0x00000000f0000000,UL) |
42 | #define HI_OBP_ADDRESS _AC(0x0000000100000000,UL) | 42 | #define HI_OBP_ADDRESS _AC(0x0000000100000000,UL) |
43 | #define VMALLOC_START _AC(0x0000000100000000,UL) | 43 | #define VMALLOC_START _AC(0x0000000100000000,UL) |
44 | #define VMALLOC_END _AC(0x0000000200000000,UL) | 44 | #define VMALLOC_END _AC(0x0000010000000000,UL) |
45 | #define VMEMMAP_BASE _AC(0x0000000200000000,UL) | 45 | #define VMEMMAP_BASE _AC(0x0000010000000000,UL) |
46 | 46 | ||
47 | #define vmemmap ((struct page *)VMEMMAP_BASE) | 47 | #define vmemmap ((struct page *)VMEMMAP_BASE) |
48 | 48 | ||
diff --git a/arch/sparc/include/asm/system_64.h b/arch/sparc/include/asm/system_64.h index 25e848f0cad7..d47a98e66972 100644 --- a/arch/sparc/include/asm/system_64.h +++ b/arch/sparc/include/asm/system_64.h | |||
@@ -63,6 +63,10 @@ do { __asm__ __volatile__("ba,pt %%xcc, 1f\n\t" \ | |||
63 | : : : "memory"); \ | 63 | : : : "memory"); \ |
64 | } while (0) | 64 | } while (0) |
65 | 65 | ||
66 | /* The kernel always executes in TSO memory model these days, | ||
67 | * and furthermore most sparc64 chips implement more stringent | ||
68 | * memory ordering than required by the specifications. | ||
69 | */ | ||
66 | #define mb() membar_safe("#StoreLoad") | 70 | #define mb() membar_safe("#StoreLoad") |
67 | #define rmb() __asm__ __volatile__("":::"memory") | 71 | #define rmb() __asm__ __volatile__("":::"memory") |
68 | #define wmb() __asm__ __volatile__("":::"memory") | 72 | #define wmb() __asm__ __volatile__("":::"memory") |