diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2009-12-03 14:08:46 -0500 |
---|---|---|
committer | Thomas Gleixner <tglx@linutronix.de> | 2009-12-14 17:55:32 -0500 |
commit | e5931943d02bf751b1ec849c0d2ade23d76a8d41 (patch) | |
tree | 119fe3bc583d0d043d97cb9edd98bad52692a546 /arch/sparc/include/asm | |
parent | fb3a6bbc912b12347614e5742c7c61416cdb0ca0 (diff) |
locking: Convert raw_rwlock functions to arch_rwlock
Name space cleanup for rwlock functions. No functional change.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Peter Zijlstra <peterz@infradead.org>
Acked-by: David S. Miller <davem@davemloft.net>
Acked-by: Ingo Molnar <mingo@elte.hu>
Cc: linux-arch@vger.kernel.org
Diffstat (limited to 'arch/sparc/include/asm')
-rw-r--r-- | arch/sparc/include/asm/spinlock_32.h | 32 | ||||
-rw-r--r-- | arch/sparc/include/asm/spinlock_64.h | 22 |
2 files changed, 27 insertions, 27 deletions
diff --git a/arch/sparc/include/asm/spinlock_32.h b/arch/sparc/include/asm/spinlock_32.h index 06d37e588fde..7f9b9dba38a6 100644 --- a/arch/sparc/include/asm/spinlock_32.h +++ b/arch/sparc/include/asm/spinlock_32.h | |||
@@ -76,7 +76,7 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock) | |||
76 | * | 76 | * |
77 | * Unfortunately this scheme limits us to ~16,000,000 cpus. | 77 | * Unfortunately this scheme limits us to ~16,000,000 cpus. |
78 | */ | 78 | */ |
79 | static inline void arch_read_lock(arch_rwlock_t *rw) | 79 | static inline void __arch_read_lock(arch_rwlock_t *rw) |
80 | { | 80 | { |
81 | register arch_rwlock_t *lp asm("g1"); | 81 | register arch_rwlock_t *lp asm("g1"); |
82 | lp = rw; | 82 | lp = rw; |
@@ -89,14 +89,14 @@ static inline void arch_read_lock(arch_rwlock_t *rw) | |||
89 | : "g2", "g4", "memory", "cc"); | 89 | : "g2", "g4", "memory", "cc"); |
90 | } | 90 | } |
91 | 91 | ||
92 | #define __raw_read_lock(lock) \ | 92 | #define arch_read_lock(lock) \ |
93 | do { unsigned long flags; \ | 93 | do { unsigned long flags; \ |
94 | local_irq_save(flags); \ | 94 | local_irq_save(flags); \ |
95 | arch_read_lock(lock); \ | 95 | __arch_read_lock(lock); \ |
96 | local_irq_restore(flags); \ | 96 | local_irq_restore(flags); \ |
97 | } while(0) | 97 | } while(0) |
98 | 98 | ||
99 | static inline void arch_read_unlock(arch_rwlock_t *rw) | 99 | static inline void __arch_read_unlock(arch_rwlock_t *rw) |
100 | { | 100 | { |
101 | register arch_rwlock_t *lp asm("g1"); | 101 | register arch_rwlock_t *lp asm("g1"); |
102 | lp = rw; | 102 | lp = rw; |
@@ -109,14 +109,14 @@ static inline void arch_read_unlock(arch_rwlock_t *rw) | |||
109 | : "g2", "g4", "memory", "cc"); | 109 | : "g2", "g4", "memory", "cc"); |
110 | } | 110 | } |
111 | 111 | ||
112 | #define __raw_read_unlock(lock) \ | 112 | #define arch_read_unlock(lock) \ |
113 | do { unsigned long flags; \ | 113 | do { unsigned long flags; \ |
114 | local_irq_save(flags); \ | 114 | local_irq_save(flags); \ |
115 | arch_read_unlock(lock); \ | 115 | __arch_read_unlock(lock); \ |
116 | local_irq_restore(flags); \ | 116 | local_irq_restore(flags); \ |
117 | } while(0) | 117 | } while(0) |
118 | 118 | ||
119 | static inline void __raw_write_lock(arch_rwlock_t *rw) | 119 | static inline void arch_write_lock(arch_rwlock_t *rw) |
120 | { | 120 | { |
121 | register arch_rwlock_t *lp asm("g1"); | 121 | register arch_rwlock_t *lp asm("g1"); |
122 | lp = rw; | 122 | lp = rw; |
@@ -130,7 +130,7 @@ static inline void __raw_write_lock(arch_rwlock_t *rw) | |||
130 | *(volatile __u32 *)&lp->lock = ~0U; | 130 | *(volatile __u32 *)&lp->lock = ~0U; |
131 | } | 131 | } |
132 | 132 | ||
133 | static inline int __raw_write_trylock(arch_rwlock_t *rw) | 133 | static inline int arch_write_trylock(arch_rwlock_t *rw) |
134 | { | 134 | { |
135 | unsigned int val; | 135 | unsigned int val; |
136 | 136 | ||
@@ -150,7 +150,7 @@ static inline int __raw_write_trylock(arch_rwlock_t *rw) | |||
150 | return (val == 0); | 150 | return (val == 0); |
151 | } | 151 | } |
152 | 152 | ||
153 | static inline int arch_read_trylock(arch_rwlock_t *rw) | 153 | static inline int __arch_read_trylock(arch_rwlock_t *rw) |
154 | { | 154 | { |
155 | register arch_rwlock_t *lp asm("g1"); | 155 | register arch_rwlock_t *lp asm("g1"); |
156 | register int res asm("o0"); | 156 | register int res asm("o0"); |
@@ -165,27 +165,27 @@ static inline int arch_read_trylock(arch_rwlock_t *rw) | |||
165 | return res; | 165 | return res; |
166 | } | 166 | } |
167 | 167 | ||
168 | #define __raw_read_trylock(lock) \ | 168 | #define arch_read_trylock(lock) \ |
169 | ({ unsigned long flags; \ | 169 | ({ unsigned long flags; \ |
170 | int res; \ | 170 | int res; \ |
171 | local_irq_save(flags); \ | 171 | local_irq_save(flags); \ |
172 | res = arch_read_trylock(lock); \ | 172 | res = __arch_read_trylock(lock); \ |
173 | local_irq_restore(flags); \ | 173 | local_irq_restore(flags); \ |
174 | res; \ | 174 | res; \ |
175 | }) | 175 | }) |
176 | 176 | ||
177 | #define __raw_write_unlock(rw) do { (rw)->lock = 0; } while(0) | 177 | #define arch_write_unlock(rw) do { (rw)->lock = 0; } while(0) |
178 | 178 | ||
179 | #define arch_spin_lock_flags(lock, flags) arch_spin_lock(lock) | 179 | #define arch_spin_lock_flags(lock, flags) arch_spin_lock(lock) |
180 | #define __raw_read_lock_flags(rw, flags) __raw_read_lock(rw) | 180 | #define arch_read_lock_flags(rw, flags) arch_read_lock(rw) |
181 | #define __raw_write_lock_flags(rw, flags) __raw_write_lock(rw) | 181 | #define arch_write_lock_flags(rw, flags) arch_write_lock(rw) |
182 | 182 | ||
183 | #define arch_spin_relax(lock) cpu_relax() | 183 | #define arch_spin_relax(lock) cpu_relax() |
184 | #define arch_read_relax(lock) cpu_relax() | 184 | #define arch_read_relax(lock) cpu_relax() |
185 | #define arch_write_relax(lock) cpu_relax() | 185 | #define arch_write_relax(lock) cpu_relax() |
186 | 186 | ||
187 | #define __raw_read_can_lock(rw) (!((rw)->lock & 0xff)) | 187 | #define arch_read_can_lock(rw) (!((rw)->lock & 0xff)) |
188 | #define __raw_write_can_lock(rw) (!(rw)->lock) | 188 | #define arch_write_can_lock(rw) (!(rw)->lock) |
189 | 189 | ||
190 | #endif /* !(__ASSEMBLY__) */ | 190 | #endif /* !(__ASSEMBLY__) */ |
191 | 191 | ||
diff --git a/arch/sparc/include/asm/spinlock_64.h b/arch/sparc/include/asm/spinlock_64.h index 2b22d7f2c2fb..073936a8b275 100644 --- a/arch/sparc/include/asm/spinlock_64.h +++ b/arch/sparc/include/asm/spinlock_64.h | |||
@@ -210,17 +210,17 @@ static int inline arch_write_trylock(arch_rwlock_t *lock) | |||
210 | return result; | 210 | return result; |
211 | } | 211 | } |
212 | 212 | ||
213 | #define __raw_read_lock(p) arch_read_lock(p) | 213 | #define arch_read_lock(p) arch_read_lock(p) |
214 | #define __raw_read_lock_flags(p, f) arch_read_lock(p) | 214 | #define arch_read_lock_flags(p, f) arch_read_lock(p) |
215 | #define __raw_read_trylock(p) arch_read_trylock(p) | 215 | #define arch_read_trylock(p) arch_read_trylock(p) |
216 | #define __raw_read_unlock(p) arch_read_unlock(p) | 216 | #define arch_read_unlock(p) arch_read_unlock(p) |
217 | #define __raw_write_lock(p) arch_write_lock(p) | 217 | #define arch_write_lock(p) arch_write_lock(p) |
218 | #define __raw_write_lock_flags(p, f) arch_write_lock(p) | 218 | #define arch_write_lock_flags(p, f) arch_write_lock(p) |
219 | #define __raw_write_unlock(p) arch_write_unlock(p) | 219 | #define arch_write_unlock(p) arch_write_unlock(p) |
220 | #define __raw_write_trylock(p) arch_write_trylock(p) | 220 | #define arch_write_trylock(p) arch_write_trylock(p) |
221 | 221 | ||
222 | #define __raw_read_can_lock(rw) (!((rw)->lock & 0x80000000UL)) | 222 | #define arch_read_can_lock(rw) (!((rw)->lock & 0x80000000UL)) |
223 | #define __raw_write_can_lock(rw) (!(rw)->lock) | 223 | #define arch_write_can_lock(rw) (!(rw)->lock) |
224 | 224 | ||
225 | #define arch_spin_relax(lock) cpu_relax() | 225 | #define arch_spin_relax(lock) cpu_relax() |
226 | #define arch_read_relax(lock) cpu_relax() | 226 | #define arch_read_relax(lock) cpu_relax() |