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authorSam Ravnborg <sam@ravnborg.org>2008-07-27 17:00:59 -0400
committerSam Ravnborg <sam@ravnborg.org>2008-07-27 17:00:59 -0400
commita439fe51a1f8eb087c22dd24d69cebae4a3addac (patch)
treee32d1fa97a220ab598d8ab364205817c5bf2bd6f /arch/sparc/include/asm/ide.h
parent837b41b5de356aa67abb2cadb5eef3efc7776f91 (diff)
sparc, sparc64: use arch/sparc/include
The majority of this patch was created by the following script: *** ASM=arch/sparc/include/asm mkdir -p $ASM git mv include/asm-sparc64/ftrace.h $ASM git rm include/asm-sparc64/* git mv include/asm-sparc/* $ASM sed -ie 's/asm-sparc64/asm/g' $ASM/* sed -ie 's/asm-sparc/asm/g' $ASM/* *** The rest was an update of the top-level Makefile to use sparc for header files when sparc64 is being build. And a small fixlet to pick up the correct unistd.h from sparc64 code. Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Diffstat (limited to 'arch/sparc/include/asm/ide.h')
-rw-r--r--arch/sparc/include/asm/ide.h97
1 files changed, 97 insertions, 0 deletions
diff --git a/arch/sparc/include/asm/ide.h b/arch/sparc/include/asm/ide.h
new file mode 100644
index 000000000000..b7af3d658239
--- /dev/null
+++ b/arch/sparc/include/asm/ide.h
@@ -0,0 +1,97 @@
1/* ide.h: SPARC PCI specific IDE glue.
2 *
3 * Copyright (C) 1997 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
5 * Adaptation from sparc64 version to sparc by Pete Zaitcev.
6 */
7
8#ifndef _SPARC_IDE_H
9#define _SPARC_IDE_H
10
11#ifdef __KERNEL__
12
13#include <asm/io.h>
14#ifdef CONFIG_SPARC64
15#include <asm/pgalloc.h>
16#include <asm/spitfire.h>
17#include <asm/cacheflush.h>
18#include <asm/page.h>
19#else
20#include <asm/pgtable.h>
21#include <asm/psr.h>
22#endif
23
24#define __ide_insl(data_reg, buffer, wcount) \
25 __ide_insw(data_reg, buffer, (wcount)<<1)
26#define __ide_outsl(data_reg, buffer, wcount) \
27 __ide_outsw(data_reg, buffer, (wcount)<<1)
28
29/* On sparc, I/O ports and MMIO registers are accessed identically. */
30#define __ide_mm_insw __ide_insw
31#define __ide_mm_insl __ide_insl
32#define __ide_mm_outsw __ide_outsw
33#define __ide_mm_outsl __ide_outsl
34
35static inline void __ide_insw(void __iomem *port, void *dst, u32 count)
36{
37#if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE)
38 unsigned long end = (unsigned long)dst + (count << 1);
39#endif
40 u16 *ps = dst;
41 u32 *pi;
42
43 if(((unsigned long)ps) & 0x2) {
44 *ps++ = __raw_readw(port);
45 count--;
46 }
47 pi = (u32 *)ps;
48 while(count >= 2) {
49 u32 w;
50
51 w = __raw_readw(port) << 16;
52 w |= __raw_readw(port);
53 *pi++ = w;
54 count -= 2;
55 }
56 ps = (u16 *)pi;
57 if(count)
58 *ps++ = __raw_readw(port);
59
60#if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE)
61 __flush_dcache_range((unsigned long)dst, end);
62#endif
63}
64
65static inline void __ide_outsw(void __iomem *port, const void *src, u32 count)
66{
67#if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE)
68 unsigned long end = (unsigned long)src + (count << 1);
69#endif
70 const u16 *ps = src;
71 const u32 *pi;
72
73 if(((unsigned long)src) & 0x2) {
74 __raw_writew(*ps++, port);
75 count--;
76 }
77 pi = (const u32 *)ps;
78 while(count >= 2) {
79 u32 w;
80
81 w = *pi++;
82 __raw_writew((w >> 16), port);
83 __raw_writew(w, port);
84 count -= 2;
85 }
86 ps = (const u16 *)pi;
87 if(count)
88 __raw_writew(*ps, port);
89
90#if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE)
91 __flush_dcache_range((unsigned long)src, end);
92#endif
93}
94
95#endif /* __KERNEL__ */
96
97#endif /* _SPARC_IDE_H */