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authorPaul Mundt <lethal@linux-sh.org>2008-09-05 01:51:28 -0400
committerPaul Mundt <lethal@linux-sh.org>2008-09-05 01:51:28 -0400
commitdbce1f649e3d22aa7ddc0fdbfa6a7470047b61bd (patch)
treedd4e6030a21bf4ae7ab77b9d122410cc566a22c4 /arch/sh
parent323b8c410a2453f15578c22b0eef50456359bbfc (diff)
sh64: resume_kernel fix for kernel oops built with CONFIG_BKL_PREEMPT=y.
Follows the SH change. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh')
-rw-r--r--arch/sh/kernel/cpu/sh5/entry.S14
1 files changed, 4 insertions, 10 deletions
diff --git a/arch/sh/kernel/cpu/sh5/entry.S b/arch/sh/kernel/cpu/sh5/entry.S
index 04c7da968146..e640c63d5811 100644
--- a/arch/sh/kernel/cpu/sh5/entry.S
+++ b/arch/sh/kernel/cpu/sh5/entry.S
@@ -2,7 +2,7 @@
2 * arch/sh/kernel/cpu/sh5/entry.S 2 * arch/sh/kernel/cpu/sh5/entry.S
3 * 3 *
4 * Copyright (C) 2000, 2001 Paolo Alberelli 4 * Copyright (C) 2000, 2001 Paolo Alberelli
5 * Copyright (C) 2004 - 2007 Paul Mundt 5 * Copyright (C) 2004 - 2008 Paul Mundt
6 * Copyright (C) 2003, 2004 Richard Curnow 6 * Copyright (C) 2003, 2004 Richard Curnow
7 * 7 *
8 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
@@ -923,6 +923,8 @@ ret_from_exception:
923 blink tr0, ZERO 923 blink tr0, ZERO
924 924
925resume_kernel: 925resume_kernel:
926 CLI()
927
926 pta restore_all, tr0 928 pta restore_all, tr0
927 929
928 getcon KCR0, r6 930 getcon KCR0, r6
@@ -939,19 +941,11 @@ need_resched:
939 andi r7, 0xf0, r7 941 andi r7, 0xf0, r7
940 bne r7, ZERO, tr0 942 bne r7, ZERO, tr0
941 943
942 movi ((PREEMPT_ACTIVE >> 16) & 65535), r8 944 movi preempt_schedule_irq, r7
943 shori (PREEMPT_ACTIVE & 65535), r8
944 st.l r6, TI_PRE_COUNT, r8
945
946 STI()
947 movi schedule, r7
948 ori r7, 1, r7 945 ori r7, 1, r7
949 ptabs r7, tr1 946 ptabs r7, tr1
950 blink tr1, LINK 947 blink tr1, LINK
951 948
952 st.l r6, TI_PRE_COUNT, ZERO
953 CLI()
954
955 pta need_resched, tr1 949 pta need_resched, tr1
956 blink tr1, ZERO 950 blink tr1, ZERO
957#endif 951#endif