sh: Support I/O space swapping where needed.

This adopts a trimmed down version of the MIPS port mangling interface
limited to the I/O swabbing for platforms that can't use little endian
accessors. For platforms with mixed I/O spaces involving PCI it will
still be necessary to enable byte swapping at the host controller level.
Attention needs to be paid to all of host controller endianness, CPU
endianness, and whether I/O accesses are explicitly swapped or not via
SWAP_IO_SPACE. Fortunately the platforms that need this are in the
minority.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

3 files changed, 62 insertions, 15 deletions

diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 5d1ae854bfda..2d9cd1327a06 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -162,6 +162,9 @@ config NO_IOPORT
 config IO_TRAPPED
         bool
 
+config SWAP_IO_SPACE
+        bool
+
 config DMA_COHERENT
         bool
 
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h
index 28c5aa58bb45..eb76cb32f49f 100644
--- a/arch/sh/include/asm/io.h
+++ b/arch/sh/include/asm/io.h
@@ -24,6 +24,7 @@
 #define __IO_PREFIX     generic
 #include <asm/io_generic.h>
 #include <asm/io_trapped.h>
+#include <mach/mangle-port.h>
 
 #define __raw_writeb(v,a)       (__chk_io_ptr(a), *(volatile u8  __force *)(a) = (v))
 #define __raw_writew(v,a)       (__chk_io_ptr(a), *(volatile u16 __force *)(a) = (v))
@@ -35,21 +36,15 @@
 #define __raw_readl(a)          (__chk_io_ptr(a), *(volatile u32 __force *)(a))
 #define __raw_readq(a)          (__chk_io_ptr(a), *(volatile u64 __force *)(a))
 
-#define readb_relaxed(c)        ({ u8  __v = __raw_readb(c); __v; })
-#define readw_relaxed(c)        ({ u16 __v = le16_to_cpu((__force __le16) \
-                                        __raw_readw(c)); __v; })
-#define readl_relaxed(c)        ({ u32 __v = le32_to_cpu((__force __le32) \
-                                        __raw_readl(c)); __v; })
-#define readq_relaxed(c)        ({ u64 __v = le64_to_cpu((__force __le64) \
-                                        __raw_readq(c)); __v; })
-
-#define writeb_relaxed(v,c)     ((void)__raw_writeb(v,c))
-#define writew_relaxed(v,c)     ((void)__raw_writew((__force u16) \
-                                        cpu_to_le16(v),c))
-#define writel_relaxed(v,c)     ((void)__raw_writel((__force u32) \
-                                        cpu_to_le32(v),c))
-#define writeq_relaxed(v,c)     ((void)__raw_writeq((__force u64) \
-                                        cpu_to_le64(v),c))
+#define readb_relaxed(c)        ({ u8  __v = ioswabb(__raw_readb(c)); __v; })
+#define readw_relaxed(c)        ({ u16 __v = ioswabw(__raw_readw(c)); __v; })
+#define readl_relaxed(c)        ({ u32 __v = ioswabl(__raw_readl(c)); __v; })
+#define readq_relaxed(c)        ({ u64 __v = ioswabq(__raw_readq(c)); __v; })
+
+#define writeb_relaxed(v,c)     ((void)__raw_writeb((__force  u8)ioswabb(v),c))
+#define writew_relaxed(v,c)     ((void)__raw_writew((__force u16)ioswabw(v),c))
+#define writel_relaxed(v,c)     ((void)__raw_writel((__force u32)ioswabl(v),c))
+#define writeq_relaxed(v,c)     ((void)__raw_writeq((__force u64)ioswabq(v),c))
 
 #define readb(a)                ({ u8  r_ = readb_relaxed(a); rmb(); r_; })
 #define readw(a)                ({ u16 r_ = readw_relaxed(a); rmb(); r_; })
diff --git a/arch/sh/include/mach-common/mach/mangle-port.h b/arch/sh/include/mach-common/mach/mangle-port.h
new file mode 100644
index 000000000000..4ca1769a0f12
--- /dev/null
+++ b/arch/sh/include/mach-common/mach/mangle-port.h
@@ -0,0 +1,49 @@
+/*
+ * SH version cribbed from the MIPS copy:
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003, 2004 Ralf Baechle
+ */
+#ifndef __MACH_COMMON_MANGLE_PORT_H
+#define __MACH_COMMON_MANGLE_PORT_H
+
+/*
+ * Sane hardware offers swapping of PCI/ISA I/O space accesses in hardware;
+ * less sane hardware forces software to fiddle with this...
+ *
+ * Regardless, if the host bus endianness mismatches that of PCI/ISA, then
+ * you can't have the numerical value of data and byte addresses within
+ * multibyte quantities both preserved at the same time.  Hence two
+ * variations of functions: non-prefixed ones that preserve the value
+ * and prefixed ones that preserve byte addresses.  The latters are
+ * typically used for moving raw data between a peripheral and memory (cf.
+ * string I/O functions), hence the "__mem_" prefix.
+ */
+#if defined(CONFIG_SWAP_IO_SPACE)
+
+# define ioswabb(x)             (x)
+# define __mem_ioswabb(x)       (x)
+# define ioswabw(x)             le16_to_cpu(x)
+# define __mem_ioswabw(x)       (x)
+# define ioswabl(x)             le32_to_cpu(x)
+# define __mem_ioswabl(x)       (x)
+# define ioswabq(x)             le64_to_cpu(x)
+# define __mem_ioswabq(x)       (x)
+
+#else
+
+# define ioswabb(x)             (x)
+# define __mem_ioswabb(x)       (x)
+# define ioswabw(x)             (x)
+# define __mem_ioswabw(x)       cpu_to_le16(x)
+# define ioswabl(x)             (x)
+# define __mem_ioswabl(x)       cpu_to_le32(x)
+# define ioswabq(x)             (x)
+# define __mem_ioswabq(x)       cpu_to_le32(x)
+
+#endif
+
+#endif /* __MACH_COMMON_MANGLE_PORT_H */