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authorMagnus Damm <damm@opensource.se>2010-05-10 10:02:09 -0400
committerPaul Mundt <lethal@linux-sh.org>2010-05-10 22:48:55 -0400
commit9e1985e13d42b4b66af94637346849565174309d (patch)
tree201338d22f7df6ace14e3f0ee6db475bbd48275e /arch/sh
parent098ec49b684313cbd2ba1e24db61cfda9788ff73 (diff)
sh: get rid of div6 clock names
Get rid of div6 clock names on sh7343/sh7366/sh7722/sh7723/sh7724 Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh')
-rw-r--r--arch/sh/include/asm/clock.h11
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7343.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7366.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7722.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7723.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7724.c13
6 files changed, 14 insertions, 18 deletions
diff --git a/arch/sh/include/asm/clock.h b/arch/sh/include/asm/clock.h
index 4b19179230fe..405a12c09960 100644
--- a/arch/sh/include/asm/clock.h
+++ b/arch/sh/include/asm/clock.h
@@ -151,12 +151,11 @@ int sh_clk_div4_enable_register(struct clk *clks, int nr,
151int sh_clk_div4_reparent_register(struct clk *clks, int nr, 151int sh_clk_div4_reparent_register(struct clk *clks, int nr,
152 struct clk_div4_table *table); 152 struct clk_div4_table *table);
153 153
154#define SH_CLK_DIV6(_name, _parent, _reg, _flags) \ 154#define SH_CLK_DIV6(_parent, _reg, _flags) \
155{ \ 155{ \
156 .name = _name, \ 156 .parent = _parent, \
157 .parent = _parent, \ 157 .enable_reg = (void __iomem *)_reg, \
158 .enable_reg = (void __iomem *)_reg, \ 158 .flags = _flags, \
159 .flags = _flags, \
160} 159}
161 160
162int sh_clk_div6_register(struct clk *clks, int nr); 161int sh_clk_div6_register(struct clk *clks, int nr);
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
index 9e4992a08e51..a066c438b404 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
@@ -139,7 +139,7 @@ struct clk div4_clks[DIV4_NR] = {
139enum { DIV6_V, DIV6_NR }; 139enum { DIV6_V, DIV6_NR };
140 140
141struct clk div6_clks[DIV6_NR] = { 141struct clk div6_clks[DIV6_NR] = {
142 [DIV6_V] = SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0), 142 [DIV6_V] = SH_CLK_DIV6(&pll_clk, VCLKCR, 0),
143}; 143};
144 144
145#define MSTP(_str, _parent, _reg, _bit, _flags) \ 145#define MSTP(_str, _parent, _reg, _bit, _flags) \
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7366.c b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
index 4eeeb240823e..44cc5a0965d9 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
@@ -142,7 +142,7 @@ struct clk div4_clks[DIV4_NR] = {
142enum { DIV6_V, DIV6_NR }; 142enum { DIV6_V, DIV6_NR };
143 143
144struct clk div6_clks[DIV6_NR] = { 144struct clk div6_clks[DIV6_NR] = {
145 [DIV6_V] = SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0), 145 [DIV6_V] = SH_CLK_DIV6(&pll_clk, VCLKCR, 0),
146}; 146};
147 147
148#define MSTP(_str, _parent, _reg, _bit, _flags) \ 148#define MSTP(_str, _parent, _reg, _bit, _flags) \
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
index d8a7ad8a83b3..2798ceaa648f 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
@@ -152,7 +152,7 @@ struct clk div4_reparent_clks[DIV4_REPARENT_NR] = {
152enum { DIV6_V, DIV6_NR }; 152enum { DIV6_V, DIV6_NR };
153 153
154struct clk div6_clks[DIV6_NR] = { 154struct clk div6_clks[DIV6_NR] = {
155 [DIV6_V] = SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0), 155 [DIV6_V] = SH_CLK_DIV6(&pll_clk, VCLKCR, 0),
156}; 156};
157 157
158static struct clk mstp_clks[HWBLK_NR] = { 158static struct clk mstp_clks[HWBLK_NR] = {
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
index edb2414896b1..500715f78142 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
@@ -152,7 +152,7 @@ struct clk div4_reparent_clks[DIV4_REPARENT_NR] = {
152enum { DIV6_V, DIV6_NR }; 152enum { DIV6_V, DIV6_NR };
153 153
154struct clk div6_clks[DIV6_NR] = { 154struct clk div6_clks[DIV6_NR] = {
155 [DIV6_V] = SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0), 155 [DIV6_V] = SH_CLK_DIV6(&pll_clk, VCLKCR, 0),
156}; 156};
157 157
158static struct clk mstp_clks[] = { 158static struct clk mstp_clks[] = {
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
index ad57c007b05c..2bbff53fcd87 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
@@ -166,15 +166,12 @@ struct clk div4_clks[DIV4_NR] = {
166 166
167enum { DIV6_V, DIV6_FA, DIV6_FB, DIV6_I, DIV6_S, DIV6_NR }; 167enum { DIV6_V, DIV6_FA, DIV6_FB, DIV6_I, DIV6_S, DIV6_NR };
168 168
169#define DIV6(_str, _reg, _flags) \
170 SH_CLK_DIV6(_str, &div3_clk, _reg, _flags)
171
172struct clk div6_clks[DIV6_NR] = { 169struct clk div6_clks[DIV6_NR] = {
173 [DIV6_V] = DIV6("video_clk", VCLKCR, 0), 170 [DIV6_V] = SH_CLK_DIV6(&div3_clk, VCLKCR, 0),
174 [DIV6_FA] = DIV6("fsia_clk", FCLKACR, 0), 171 [DIV6_FA] = SH_CLK_DIV6(&div3_clk, FCLKACR, 0),
175 [DIV6_FB] = DIV6("fsib_clk", FCLKBCR, 0), 172 [DIV6_FB] = SH_CLK_DIV6(&div3_clk, FCLKBCR, 0),
176 [DIV6_I] = DIV6("irda_clk", IRDACLKCR, 0), 173 [DIV6_I] = SH_CLK_DIV6(&div3_clk, IRDACLKCR, 0),
177 [DIV6_S] = DIV6("spu_clk", SPUCLKCR, CLK_ENABLE_ON_INIT), 174 [DIV6_S] = SH_CLK_DIV6(&div3_clk, SPUCLKCR, CLK_ENABLE_ON_INIT),
178}; 175};
179 176
180static struct clk mstp_clks[HWBLK_NR] = { 177static struct clk mstp_clks[HWBLK_NR] = {