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authorPaul Mundt <lethal@linux-sh.org>2006-11-05 02:48:42 -0500
committerPaul Mundt <lethal@linux-sh.org>2006-12-05 20:45:37 -0500
commit710ee0cc45d095f7697821b330a3f8280205c2be (patch)
tree8bce794be73a6961d118d485c097232628812e94 /arch/sh
parentf36af3fd377081d3ac2ff6b63a60f8db8b3bf531 (diff)
sh: SE7206 build fixes.
A number of API changes happened underneath the 7206 patches, update for everything that broke. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh')
-rw-r--r--arch/sh/boards/se/7206/irq.c44
-rw-r--r--arch/sh/boards/se/7206/setup.c3
-rw-r--r--arch/sh/kernel/sys_sh.c2
-rw-r--r--arch/sh/kernel/timers/timer-cmt.c63
-rw-r--r--arch/sh/kernel/timers/timer-mtu2.c62
-rw-r--r--arch/sh/kernel/traps.c12
6 files changed, 34 insertions, 152 deletions
diff --git a/arch/sh/boards/se/7206/irq.c b/arch/sh/boards/se/7206/irq.c
index 8d5b278a124d..3fb0c5f5b23a 100644
--- a/arch/sh/boards/se/7206/irq.c
+++ b/arch/sh/boards/se/7206/irq.c
@@ -6,12 +6,10 @@
6 * Hitachi SolutionEngine Support. 6 * Hitachi SolutionEngine Support.
7 * 7 *
8 */ 8 */
9
10#include <linux/config.h>
11#include <linux/init.h> 9#include <linux/init.h>
12#include <linux/irq.h> 10#include <linux/irq.h>
13#include <asm/irq.h> 11#include <linux/io.h>
14#include <asm/io.h> 12#include <linux/irq.h>
15#include <asm/se7206.h> 13#include <asm/se7206.h>
16 14
17#define INTSTS0 0x31800000 15#define INTSTS0 0x31800000
@@ -20,9 +18,6 @@
20#define INTMSK1 0x31800006 18#define INTMSK1 0x31800006
21#define INTSEL 0x31800008 19#define INTSEL 0x31800008
22 20
23/* shutdown is same as "disable" */
24#define shutdown_se7206_irq disable_se7206_irq
25
26static void disable_se7206_irq(unsigned int irq) 21static void disable_se7206_irq(unsigned int irq)
27{ 22{
28 unsigned short val; 23 unsigned short val;
@@ -84,18 +79,7 @@ static void enable_se7206_irq(unsigned int irq)
84 ctrl_outw(msk1, INTMSK1); 79 ctrl_outw(msk1, INTMSK1);
85} 80}
86 81
87static unsigned int startup_se7206_irq(unsigned int irq) 82static void eoi_se7206_irq(unsigned int irq)
88{
89 enable_se7206_irq(irq);
90 return 0; /* never anything pending */
91}
92
93static void ack_se7206_irq(unsigned int irq)
94{
95 disable_se7206_irq(irq);
96}
97
98static void end_se7206_irq(unsigned int irq)
99{ 83{
100 unsigned short sts0,sts1; 84 unsigned short sts0,sts1;
101 85
@@ -121,20 +105,19 @@ static void end_se7206_irq(unsigned int irq)
121 ctrl_outw(sts1, INTSTS1); 105 ctrl_outw(sts1, INTSTS1);
122} 106}
123 107
124static struct hw_interrupt_type se7206_irq_type = { 108static struct irq_chip se7206_irq_chip __read_mostly = {
125 .typename = "SE7206 FPGA-IRQ", 109 .name = "SE7206-FPGA-IRQ",
126 .startup = startup_se7206_irq, 110 .mask = disable_se7206_irq,
127 .shutdown = shutdown_se7206_irq, 111 .unmask = enable_se7206_irq,
128 .enable = enable_se7206_irq, 112 .mask_ack = disable_se7206_irq,
129 .disable = disable_se7206_irq, 113 .eoi = eoi_se7206_irq,
130 .ack = ack_se7206_irq,
131 .end = end_se7206_irq,
132}; 114};
133 115
134static void make_se7206_irq(unsigned int irq) 116static void make_se7206_irq(unsigned int irq)
135{ 117{
136 disable_irq_nosync(irq); 118 disable_irq_nosync(irq);
137 irq_desc[irq].handler = &se7206_irq_type; 119 set_irq_chip_and_handler_name(irq, &se7206_irq_chip,
120 handle_level_irq, "level");
138 disable_se7206_irq(irq); 121 disable_se7206_irq(irq);
139} 122}
140 123
@@ -154,8 +137,3 @@ void __init init_se7206_IRQ(void)
154 /* IRQ0=LAN, IRQ1=ATA, IRQ3=SLT,PCM */ 137 /* IRQ0=LAN, IRQ1=ATA, IRQ3=SLT,PCM */
155 ctrl_outw(0x0001,INTSEL); 138 ctrl_outw(0x0001,INTSEL);
156} 139}
157
158int se7206_irq_demux(int irq)
159{
160 return irq;
161}
diff --git a/arch/sh/boards/se/7206/setup.c b/arch/sh/boards/se/7206/setup.c
index e543e3980c08..0f42e91a3238 100644
--- a/arch/sh/boards/se/7206/setup.c
+++ b/arch/sh/boards/se/7206/setup.c
@@ -10,8 +10,8 @@
10 10
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/platform_device.h> 12#include <linux/platform_device.h>
13#include <asm/io.h>
14#include <asm/se7206.h> 13#include <asm/se7206.h>
14#include <asm/io.h>
15#include <asm/machvec.h> 15#include <asm/machvec.h>
16 16
17static struct resource smc91x_resources[] = { 17static struct resource smc91x_resources[] = {
@@ -72,7 +72,6 @@ struct sh_machine_vector mv_se __initmv = {
72 .mv_outsl = se7206_outsl, 72 .mv_outsl = se7206_outsl,
73 73
74 .mv_init_irq = init_se7206_IRQ, 74 .mv_init_irq = init_se7206_IRQ,
75 .mv_irq_demux = se7206_irq_demux,
76#ifdef CONFIG_HEARTBEAT 75#ifdef CONFIG_HEARTBEAT
77 .mv_heartbeat = heartbeat_se, 76 .mv_heartbeat = heartbeat_se,
78#endif 77#endif
diff --git a/arch/sh/kernel/sys_sh.c b/arch/sh/kernel/sys_sh.c
index 8fde95001c34..07f2b5718938 100644
--- a/arch/sh/kernel/sys_sh.c
+++ b/arch/sh/kernel/sys_sh.c
@@ -50,6 +50,7 @@ unsigned long shm_align_mask = PAGE_SIZE - 1; /* Sane caches */
50 50
51EXPORT_SYMBOL(shm_align_mask); 51EXPORT_SYMBOL(shm_align_mask);
52 52
53#ifdef CONFIG_MMU
53/* 54/*
54 * To avoid cache aliases, we map the shared page with same color. 55 * To avoid cache aliases, we map the shared page with same color.
55 */ 56 */
@@ -135,6 +136,7 @@ full_search:
135 addr = COLOUR_ALIGN(addr, pgoff); 136 addr = COLOUR_ALIGN(addr, pgoff);
136 } 137 }
137} 138}
139#endif /* CONFIG_MMU */
138 140
139static inline long 141static inline long
140do_mmap2(unsigned long addr, unsigned long len, unsigned long prot, 142do_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
diff --git a/arch/sh/kernel/timers/timer-cmt.c b/arch/sh/kernel/timers/timer-cmt.c
index 9eab395cd341..30687383d4b0 100644
--- a/arch/sh/kernel/timers/timer-cmt.c
+++ b/arch/sh/kernel/timers/timer-cmt.c
@@ -96,8 +96,7 @@ static unsigned long cmt_timer_get_offset(void)
96 return count; 96 return count;
97} 97}
98 98
99static irqreturn_t cmt_timer_interrupt(int irq, void *dev_id, 99static irqreturn_t cmt_timer_interrupt(int irq, void *dev_id)
100 struct pt_regs *regs)
101{ 100{
102 unsigned long timer_status; 101 unsigned long timer_status;
103 102
@@ -114,7 +113,7 @@ static irqreturn_t cmt_timer_interrupt(int irq, void *dev_id,
114 * locally disabled. -arca 113 * locally disabled. -arca
115 */ 114 */
116 write_seqlock(&xtime_lock); 115 write_seqlock(&xtime_lock);
117 handle_timer_tick(regs); 116 handle_timer_tick();
118 write_sequnlock(&xtime_lock); 117 write_sequnlock(&xtime_lock);
119 118
120 return IRQ_HANDLED; 119 return IRQ_HANDLED;
@@ -123,62 +122,10 @@ static irqreturn_t cmt_timer_interrupt(int irq, void *dev_id,
123static struct irqaction cmt_irq = { 122static struct irqaction cmt_irq = {
124 .name = "timer", 123 .name = "timer",
125 .handler = cmt_timer_interrupt, 124 .handler = cmt_timer_interrupt,
126 .flags = SA_INTERRUPT, 125 .flags = IRQF_DISABLED,
127 .mask = CPU_MASK_NONE, 126 .mask = CPU_MASK_NONE,
128}; 127};
129 128
130/*
131 * Hah! We'll see if this works (switching from usecs to nsecs).
132 */
133static unsigned long cmt_timer_get_frequency(void)
134{
135 u32 freq;
136 struct timespec ts1, ts2;
137 unsigned long diff_nsec;
138 unsigned long factor;
139
140 /* Setup the timer: We don't want to generate interrupts, just
141 * have it count down at its natural rate.
142 */
143
144 ctrl_outw(ctrl_inw(CMT_CMSTR) & ~0x01, CMT_CMSTR);
145 ctrl_outw(CMT_CMCSR_CALIB, CMT_CMCSR_0);
146 ctrl_outw(0xffff, CMT_CMCOR_0);
147 ctrl_outw(0xffff, CMT_CMCNT_0);
148
149 rtc_sh_get_time(&ts2);
150
151 do {
152 rtc_sh_get_time(&ts1);
153 } while (ts1.tv_nsec == ts2.tv_nsec && ts1.tv_sec == ts2.tv_sec);
154
155 /* actually start the timer */
156 ctrl_outw(ctrl_inw(CMT_CMSTR) | 0x01, CMT_CMSTR);
157
158 do {
159 rtc_sh_get_time(&ts2);
160 } while (ts1.tv_nsec == ts2.tv_nsec && ts1.tv_sec == ts2.tv_sec);
161
162 freq = 0xffff - ctrl_inw(CMT_CMCNT_0);
163 if (ts2.tv_nsec < ts1.tv_nsec) {
164 ts2.tv_nsec += 1000000000;
165 ts2.tv_sec--;
166 }
167
168 diff_nsec = (ts2.tv_sec - ts1.tv_sec) * 1000000000 + (ts2.tv_nsec - ts1.tv_nsec);
169
170 /* this should work well if the RTC has a precision of n Hz, where
171 * n is an integer. I don't think we have to worry about the other
172 * cases. */
173 factor = (1000000000 + diff_nsec/2) / diff_nsec;
174
175 if (factor * diff_nsec > 1100000000 ||
176 factor * diff_nsec < 900000000)
177 panic("weird RTC (diff_nsec %ld)", diff_nsec);
178
179 return freq * factor;
180}
181
182static void cmt_clk_init(struct clk *clk) 129static void cmt_clk_init(struct clk *clk)
183{ 130{
184 u8 divisor = CMT_CMCSR_INIT & 0x3; 131 u8 divisor = CMT_CMCSR_INIT & 0x3;
@@ -245,12 +192,12 @@ struct sys_timer_ops cmt_timer_ops = {
245 .init = cmt_timer_init, 192 .init = cmt_timer_init,
246 .start = cmt_timer_start, 193 .start = cmt_timer_start,
247 .stop = cmt_timer_stop, 194 .stop = cmt_timer_stop,
248 .get_frequency = cmt_timer_get_frequency, 195#ifndef CONFIG_GENERIC_TIME
249 .get_offset = cmt_timer_get_offset, 196 .get_offset = cmt_timer_get_offset,
197#endif
250}; 198};
251 199
252struct sys_timer cmt_timer = { 200struct sys_timer cmt_timer = {
253 .name = "cmt", 201 .name = "cmt",
254 .ops = &cmt_timer_ops, 202 .ops = &cmt_timer_ops,
255}; 203};
256
diff --git a/arch/sh/kernel/timers/timer-mtu2.c b/arch/sh/kernel/timers/timer-mtu2.c
index 73a5ef3c457d..045b2aba13fa 100644
--- a/arch/sh/kernel/timers/timer-mtu2.c
+++ b/arch/sh/kernel/timers/timer-mtu2.c
@@ -98,8 +98,7 @@ static unsigned long mtu2_timer_get_offset(void)
98 return count; 98 return count;
99} 99}
100 100
101static irqreturn_t mtu2_timer_interrupt(int irq, void *dev_id, 101static irqreturn_t mtu2_timer_interrupt(int irq, void *dev_id)
102 struct pt_regs *regs)
103{ 102{
104 unsigned long timer_status; 103 unsigned long timer_status;
105 104
@@ -110,7 +109,7 @@ static irqreturn_t mtu2_timer_interrupt(int irq, void *dev_id,
110 109
111 /* Do timer tick */ 110 /* Do timer tick */
112 write_seqlock(&xtime_lock); 111 write_seqlock(&xtime_lock);
113 handle_timer_tick(regs); 112 handle_timer_tick();
114 write_sequnlock(&xtime_lock); 113 write_sequnlock(&xtime_lock);
115 114
116 return IRQ_HANDLED; 115 return IRQ_HANDLED;
@@ -119,62 +118,10 @@ static irqreturn_t mtu2_timer_interrupt(int irq, void *dev_id,
119static struct irqaction mtu2_irq = { 118static struct irqaction mtu2_irq = {
120 .name = "timer", 119 .name = "timer",
121 .handler = mtu2_timer_interrupt, 120 .handler = mtu2_timer_interrupt,
122 .flags = SA_INTERRUPT, 121 .flags = IRQF_DISABLED,
123 .mask = CPU_MASK_NONE, 122 .mask = CPU_MASK_NONE,
124}; 123};
125 124
126/*
127 * Hah! We'll see if this works (switching from usecs to nsecs).
128 */
129static unsigned long mtu2_timer_get_frequency(void)
130{
131 u32 freq;
132 struct timespec ts1, ts2;
133 unsigned long diff_nsec;
134 unsigned long factor;
135
136 /* Setup the timer: We don't want to generate interrupts, just
137 * have it count down at its natural rate.
138 */
139
140 ctrl_outb(ctrl_inb(MTU2_TSTR) & ~MTU2_TSTR_CST1, MTU2_TSTR);
141 ctrl_outb(MTU2_TCR_CALIB, MTU2_TCR_1);
142 ctrl_outb(ctrl_inb(MTU2_TIER_1) & ~MTU2_TIER_TGIEA, MTU2_TIER_1);
143 ctrl_outw(0, MTU2_TCNT_1);
144
145 rtc_get_time(&ts2);
146
147 do {
148 rtc_get_time(&ts1);
149 } while (ts1.tv_nsec == ts2.tv_nsec && ts1.tv_sec == ts2.tv_sec);
150
151 /* actually start the timer */
152 ctrl_outw(ctrl_inw(CMT_CMSTR) | 0x01, CMT_CMSTR);
153
154 do {
155 rtc_get_time(&ts2);
156 } while (ts1.tv_nsec == ts2.tv_nsec && ts1.tv_sec == ts2.tv_sec);
157
158 freq = ctrl_inw(MTU2_TCNT_0);
159 if (ts2.tv_nsec < ts1.tv_nsec) {
160 ts2.tv_nsec += 1000000000;
161 ts2.tv_sec--;
162 }
163
164 diff_nsec = (ts2.tv_sec - ts1.tv_sec) * 1000000000 + (ts2.tv_nsec - ts1.tv_nsec);
165
166 /* this should work well if the RTC has a precision of n Hz, where
167 * n is an integer. I don't think we have to worry about the other
168 * cases. */
169 factor = (1000000000 + diff_nsec/2) / diff_nsec;
170
171 if (factor * diff_nsec > 1100000000 ||
172 factor * diff_nsec < 900000000)
173 panic("weird RTC (diff_nsec %ld)", diff_nsec);
174
175 return freq * factor;
176}
177
178static unsigned int divisors[] = { 1, 4, 16, 64, 1, 1, 256 }; 125static unsigned int divisors[] = { 1, 4, 16, 64, 1, 1, 256 };
179 126
180static void mtu2_clk_init(struct clk *clk) 127static void mtu2_clk_init(struct clk *clk)
@@ -250,8 +197,9 @@ struct sys_timer_ops mtu2_timer_ops = {
250 .init = mtu2_timer_init, 197 .init = mtu2_timer_init,
251 .start = mtu2_timer_start, 198 .start = mtu2_timer_start,
252 .stop = mtu2_timer_stop, 199 .stop = mtu2_timer_stop,
253 .get_frequency = mtu2_timer_get_frequency, 200#ifndef CONFIG_GENERIC_TIME
254 .get_offset = mtu2_timer_get_offset, 201 .get_offset = mtu2_timer_get_offset,
202#endif
255}; 203};
256 204
257struct sys_timer mtu2_timer = { 205struct sys_timer mtu2_timer = {
diff --git a/arch/sh/kernel/traps.c b/arch/sh/kernel/traps.c
index 1edec2709efe..f558748d7543 100644
--- a/arch/sh/kernel/traps.c
+++ b/arch/sh/kernel/traps.c
@@ -107,8 +107,6 @@ static inline void die_if_kernel(const char *str, struct pt_regs *regs,
107 die(str, regs, err); 107 die(str, regs, err);
108} 108}
109 109
110static int handle_unaligned_notify_count = 10;
111
112/* 110/*
113 * try and fix up kernelspace address errors 111 * try and fix up kernelspace address errors
114 * - userspace errors just cause EFAULT to be returned, resulting in SEGV 112 * - userspace errors just cause EFAULT to be returned, resulting in SEGV
@@ -347,6 +345,13 @@ static inline int handle_unaligned_delayslot(struct pt_regs *regs)
347#define SH_PC_8BIT_OFFSET(instr) ((((signed char)(instr))*2) + 4) 345#define SH_PC_8BIT_OFFSET(instr) ((((signed char)(instr))*2) + 4)
348#define SH_PC_12BIT_OFFSET(instr) ((((signed short)(instr<<4))>>3) + 4) 346#define SH_PC_12BIT_OFFSET(instr) ((((signed short)(instr<<4))>>3) + 4)
349 347
348/*
349 * XXX: SH-2A needs this too, but it needs an overhaul thanks to mixed 32-bit
350 * opcodes..
351 */
352#ifndef CONFIG_CPU_SH2A
353static int handle_unaligned_notify_count = 10;
354
350static int handle_unaligned_access(u16 instruction, struct pt_regs *regs) 355static int handle_unaligned_access(u16 instruction, struct pt_regs *regs)
351{ 356{
352 u_int rm; 357 u_int rm;
@@ -483,6 +488,7 @@ static int handle_unaligned_access(u16 instruction, struct pt_regs *regs)
483 regs->pc += 2; 488 regs->pc += 2;
484 return ret; 489 return ret;
485} 490}
491#endif /* CONFIG_CPU_SH2A */
486 492
487#ifdef CONFIG_CPU_HAS_SR_RB 493#ifdef CONFIG_CPU_HAS_SR_RB
488#define lookup_exception_vector(x) \ 494#define lookup_exception_vector(x) \
@@ -501,8 +507,10 @@ asmlinkage void do_address_error(struct pt_regs *regs,
501{ 507{
502 unsigned long error_code = 0; 508 unsigned long error_code = 0;
503 mm_segment_t oldfs; 509 mm_segment_t oldfs;
510#ifndef CONFIG_CPU_SH2A
504 u16 instruction; 511 u16 instruction;
505 int tmp; 512 int tmp;
513#endif
506 514
507 /* Intentional ifdef */ 515 /* Intentional ifdef */
508#ifdef CONFIG_CPU_HAS_SR_RB 516#ifdef CONFIG_CPU_HAS_SR_RB